Demonstration circuit SCP-LT1956-BEVALZ is a 48V, 1A load current, monolithic step-down DC/DC switching converter with a wide input range for applications which require higher input voltage. Like all boards in the Signal Chain Power series, this board is designed to be easily plugged into other SCP boards to form a complete signal chain power system, enabling fast evaluation of low power signal chains. To evaluate this board, some universal SCP hardware is required, namely: SCP-INPUT-EVALZ SCP-OUTPUT-EVALZ SCP-FILTER-EVALZ SCP-THRUBRD-EVALZ SCP-1X2BKOUT-EVALZ SCP-1X5BKOUT-EVALZ SCP-5X1-EVALZ   To properly evaluate SCP series demo boards, you will need the SCP Configurator companion software. SCP Configurator can help you choose the right board and topology for your design. Note that the Demo Manual does not cover details important to the operation and configuration regarding the LT1956. Please refer to the LT1956 data sheet for a complete description of the part.

The ADAS1000 measures electrocardiac (ECG) signals, thoracic impedance, pacing artifacts,and lead-on/lead-off status and output this information in theform of a data frame supplying either lead/vector or electrodedata at programmable data rates. Its low power and small sizemake it suitable for portable, battery-powered applications.The high performance also makes it suitable for higher enddiagnostic machines. The ADAS1000 is a full-featured, 5-channel ECG includingrespiration and pace detection, while the ADAS1000-1 offersonly ECG channels with no respiration or pace features. Similarly,the ADAS1000-2 is a subset of the main device and is configuredfor gang purposes with only the ECG channels enabled (norespiration, pace, or right leg drive).The ADAS1000/ADAS1000-1/ADAS1000-2 are designed tosimplify the task of acquiring and ensuring quality ECG signals.They provide a low power, small data acquisition system forbiopotential applications. Auxiliary features that aid in betterquality ECG signal acquisition include multichannel averageddriven lead, selectable reference drive, fast overload recovery,flexible respiration circuitry returning magnitude and phaseinformation, internal pace detection algorithm operating onthree leads, and the option of ac or dc lead-off detection. Severaldigital output options ensure flexibility when monitoring andanalyzing signals. Value-added cardiac post processing isexecuted externally on a DSP, microprocessor, or FPGA.Because ECG systems span different applications, theADAS1000/ADAS1000-1/ADAS1000-2 feature a power/noisescaling architecture where the noise can be reduced at theexpense of increasing power consumption. Signal acquisitionchannels can be shut down to save power. Data rates can bereduced to save power.To ease manufacturing tests and development as well as offerholistic power-up testing, the ADAS1000/ADAS1000-1/ADAS1000-2 offer a suite of features, such as dc and ac testexcitation via the calibration DAC and cyclic redundancy check(CRC) redundancy testing, in addition to readback of allrelevant register address space.The input structure is a differential amplifier input, therebyallowing users a variety of configuration options to best suittheir application.The ADAS1000/ADAS1000-1/ADAS1000-2 are available in twopackage options, a 56-lead LFCSP package and a 64-lead LQFPpackage. Both packages are specified over a ?40?C to +85?Ctemperature range. APPLICATIONSECG: Monitor & Diagnostic Bedside Patient Monitoring Portable Telemetry Holter AED Cardiac Defibrillators Ambulatory Monitors Pace Maker Programmer Patient Transport Stress testing

The ADCMP600, ADCMP601, and ADCMP602 are very fast comparators fabricated on Analog Devices? proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from ? 0.5 V to VCC + 0.2 V, low noise TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.The devices offer 5 ns propagation delay with 10 mV overdrive on 3 mA typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.5 V to +2.8 V input signal range up to a +5.5 V positive supply with a ?0.5 V to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions on the ADCMP602 support a wide input signal range while still allowing independent output swing control and power savings.The TTL-/CMOS-compatible output stage is designed to drive up to 5 pF with full timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided with a unique single-pin control option.The ADCMP600 is available in both 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in 8-lead MSOP and LSCFP packages.ApplicationsHigh Speed InstrumentationClock and Data Signal RestorationLogic Level Shifting or TranslationPulse SpectroscopyHigh Speed Line ReceiversThreshold DetectionPeak and Zero-crossing DetectorsHigh Speed Trigger CircuitryPulse-width ModulatorsCurrent-/voltage-controlled OscillatorsAutomatic Test Equipment (ATE)

The ADCMP608 is a fast comparator fabricated on XFCB2, an Analog Devices, Inc. proprietary process. This comparator is exceptionally versatile and easy to use. Features include an input range from VEE ? 0.2 V to VCC + 0.2 V, low noise, TTL-/CMOS-compatible output drivers, and shutdown inputs. The device offers 40 ns propagation delays driving a 15 pF load with 10 mV overdrive on 500 ?A typical supply current.A flexible power supply scheme allows the device to operate with a single +2.5 V positive supply and a ?0.2 V to + 2.7 V input signal range up to a +5.5 V positive supply with a ?0.2 V to +5.7 V input signal range.The TTL-/CMOS-compatible output stage is designed to drive up to 15 pF with full rated timing specifications and to degrade in a graceful and linear fashion as additional capacitance is added. The input stage of the comparator offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded.The ADCMP608 is available in a tiny 6-lead SC70 package with a single-ended output and a shutdown pin.APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators

The ADE9000 is a highly accurate, fully integrated, multiphase energy and power quality monitoring device. Superior analog performance and a digital signal processing (DSP) core enable accurate energy monitoring over a wide dynamic range. An integrated high end reference ensures low drift over temperature with a combined drift of less than ?25 ppm/?C maximum for the entire channel including a programmable gain amplifier (PGA) and an analog-to-digital converter (ADC).The ADE9000 offers complete power monitoring capability by providing total as well as fundamental measurements on rms, active, reactive, and apparent powers and energies. Advanced features such as dip and swell monitoring, frequency, phase angle, voltage total harmonic distortion (VTHD), current total harmonic distortion (ITHD), and power factor measurements enable implementation of power quality measurements. The ? cycle rms and 10 cycle rms/12 cycle rms, calculated according to IEC 61000-4-30 Class S, provide instantaneous rms measurements for real-time monitoring.The ADE9000 offers an integrated flexible waveform buffer that stores samples at a fixed data rate of 32 kSPS or 8 kSPS, or a sampling rate that varies based on line frequency to ensure 128 points per line cycle. Resampling simplifies fast Fourier transform (FFT) calculation of at least 50 harmonics in an external processor.The ADE9000 simplifies the implementation of energy and power quality monitoring systems by providing tight integration of acquisition and calculation engines. The integrated ADCs and DSP engine calculate various parameters and provide data through user accessible registers or indicate events through interrupt pins. With seven dedicated ADC channels, the ADE9000 can be used on a 3-phase system or up to three single-phase systems. It supports current transformers (CTs) or Rogowski coils for current measurements. A digital integrator eliminates a discrete integrator required for Rogowski coils.The ADE9000 absorbs most complexity in calculations for a power monitoring system. With a simple host microcontroller, the ADE9000 enables the design of standalone monitoring or protection systems, or low cost nodes uploading data into the cloud.Note that throughout this data sheet, multifunction pins, such as CF4/EVENT/DREADY, are referred to either by the entire pin name or by a single function of the pin, for example, EVENT, when only that function is relevant.Applications Energy and power monitoring Power quality monitoring Protective devices Machine health Smart power distribution units Polyphase energy meters

The ADF4007 is a high frequency divider/PLL synthesizer that can be used in a variety of communications applications. It can operate to 7.5 GHz on the RF side and to 120 MHz at the PFD. It consists of a low noise digital PFD (phase frequency detec-tor), a precision charge pump, and a divider/prescaler. The divider/prescaler value can be set by two external control pins to one of four values (8, 16, 32, or 64). The reference divider is permanently set to 2, allowing an external REFIN frequency of up to 240 MHz.A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and a VCO (voltage controlled oscillator). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.Applications Satellite communications Broadband wireless access CATV Instrumentation Wireless LANs

The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a ?-?-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment

The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of <1 ppm. Thisfrequency agile PLL allows the ADF7020-1 to be used infrequency-hopping spread spectrum (FHSS) systems. The VCOoperates at twice the fundamental frequency to reduce spuriousemissions and frequency pulling problems.The transmitter output power is programmable in 63 steps from?20 dBm to +13 dBm. The transceiver RF frequency, channelspacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of2.3 V to 3.6 V and can be powered down when not in useA low IF architecture is used in the receiver (200 kHz),minimizing power consumption and the external componentcount and avoiding interference problems at low frequencies.The ADF7020-1 supports a wide variety of programmablefeatures, including Rx linearity, sensitivity, and IF bandwidth,allowing the user to trade off receiver sensitivity and selectivityfor current consumption, depending on the application. Thereceiver also features a patent-pending automatic frequencycontrol (AFC) loop, allowing the PLL to compensate forfrequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperaturesensor, an external analog input, the battery voltage, or theRSSI signal, which provides savings on an ADC in someapplications. The temperature sensor is accurate to ?10?C overthe full operating temperature range of ?40?C to +85?C. Thisaccuracy can be improved by doing a 1-point calibration atroom temperature and storing the result in memory.Applications Low cost wireless data transfer Wireless medical applications Remote control/security systems Wireless metering Keyless entry Home automation Process and building control

The ADF7020 is a low power, low-IF transceiver designed for operation in the license-free ISM bands at 433MHz, 868MHz and 915MHz. It is suitable for circuit applications that meet either the European ETSI EN-300-220 or the North American FCC, Part 15.247 and 15.249 regulatory standards. It operates from a 2.3 V to 3.6V power supply with programmable output power from -16 to +13dBm in 0.3dBm steps. Its receiver sensitivity is -117.5dBm at 1kbits/s in FSK mode or -110.5dBm at 9.6kbits/s. Power consumption is 20mA in receive mode and 30mA in transmit mode (+10dBm output).Other features include on-chip VCO (voltage controlled oscillator), Fractional-N PLL, on-chip 7-bit ADC (analog-to-digital converter), digital received signal strength indication (RSSI), temperature sensor and a patent pending fully automatic AFC loop. This allows the ADF7020 to be used with lower tolerance crystals. Its leakage current is < 1uA in power down mode.This device is suitable for circuit applications that meet the European ETSI-300-220, the North American FCC (Part 15), or the Chinese Short Range Device regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7020 very suitable for price-sensitive and area-sensitive applications. The transmitter block on the ADF7020 contains a VCO and low noise fractional-N PLL with an output resolution of <1 ppm. This frequency agile PLL allows the ADF7020 to be used in frequency-hopping spread spectrum (FHSS) systems. The VCO operates at twice the fundamental frequency to reduce spurious emissions and frequency-pulling problems.The transmitter output power is programmable in 0.3 dB steps from ?16 dBm to +13 dBm. The transceiver RF frequency and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use.A low IF architecture is used in the receiver (200 kHz), minimizing power consumption and the external component count and avoiding interference problems at low frequencies. The ADF7020 supports a wide variety of programmable features, including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop, allowing the PLL to track out the frequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperature sensor, an external analog input, the battery voltage, or the RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ?10?C over the full operating temperature range of ?40?C to +85?C. This accuracy can be improved by doing a 1-point calibration at room temperature and storing the result in memory.APPLICATIONS Low cost wireless data transfer Remote control/security systems Wireless metering Keyless entry Home automation Process and building control Wireless voice

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of <1 ppm. This frequency-agile PLL allows the ADF7021 to be used in frequency hopping spread spectrum (FHSS) systems. The VCO operates at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from ?16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use.A low IF architecture is used in the receiver (100 kHz), minimizing power consumption and the external component count while avoiding interference problems at low frequencies. The IF filter has programmable bandwidths of 12.5 kHz, 18.75 kHz, and 25 kHz. The ADF7021 supports a wide variety of programmable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range, allowing the PLL to track out the frequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperature sensor, an external analog input, the battery voltage, and the RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ?10?C over the full operating temperature range of ?40?C to +85?C. This accuracy can be improved by doing a 1-point calibration at room temperature and storing the result in memory.