The LTC3766 is a PolyPhase-capable secondary-side controller for synchronous forward converters. When used in conjunction with the LTC3765 active-clamp forward controller and gate driver, the part creates a complete isolated power supply that combines the power of multiphase operation with the speed of secondary-side control.The LTC3766 has been designed to simplify the design of active clamp forward converters. Working in concert with the LTC3765, the LTC3766 forms a robust, self-starting converter that eliminates the need for the separate bias regulator that is commonly used in secondary-side control applications. A precision current-limit coupled with clean start-up into a pre-biased load make the LTC3766 an excellent choice for high-power battery charger applications.The LTC3766 provides extensive remote sensing and output protection features, while Direct Flux Limit guarantees no transformer saturation without compromising transient response. A linear regulator controller and internal bypass LDO are also provided to simplify the generation of the secondary-side bias voltage.Applications Isolated 48V Telecommunication Systems Isolated Battery Chargers Automotive and Military Systems Industrial, Avionics and Heavy Equipment

The ADXRS800 is an angular rate sensor (gyroscope) intended for automotive electronic stability control, vehicle rollover detection, and other high performance applications. An advanced, differential, quad-sensor design rejects the influence of linear acceleration, enabling the ADXRS800 to operate in exceedingly harsh environments where shock and vibration are present.The ADXRS800 uses an internal, continuous self-test archi-tecture. The integrity of the electromechanical system is checked by applying a high frequency electrostatic force to the sense structure to generate a rate signal that can be differentiated from the baseband rate data and internally analyzed.The ADXRS800 is capable of sensing an angular rate of up to ?300?/sec. Angular rate data is presented as a 16-bit word, as part of a 32-bit SPI message.The ADXRS800 is available in a cavity plastic SOIC-16 and an SMT-compatible vertical mount package and is capable of operating across both a wide voltage range (3.3 V to 5 V) and temperature range (?40?C to 105?C).APPLICATIONS Electronic stability control High performance platform stabilization

EVAL BOARD FOR TPD1E0B04

TPS2060 Evaluation Module

TARGET BOARD ZIF SKT MSP430F5XX

TPS22920EVM-002 Evaluation Module for Ultra-Low rON; 4A Single Ch Load Sw w/Turn On

The LTC1772 is a constant frequency current mode step-down DC/DC controller providing excellent AC and DC load and line regulation. The device incorporates an accurate undervoltage lockout feature that shuts down the LTC1772 when the input voltage falls below 2.0V.The LTC1772 provides a ?2.5% output voltage accuracy and consumes only 270?A of quiescent current. For applications where efficiency is a prime consideration, the LTC1772 is configured for Burst Mode operation, which enhances efficiency at low output current. To further maximize the life of a battery source, the external P-channel MOSFET is turned on continuously in dropout (100% duty cycle).In shutdown, the device draws a mere 8?A. High constant operating frequency of 550kHz allows the use of a small external inductor.The LTC1772 is available in a small footprint 6-lead SOT-23. Burst Mode LTC1772 Yes LTC1772B No Applications One or Two Lithium-Ion-Powered Applications Cellular Telephones Wireless Modems Portable Computers Distributed 3.3V, 2.5V or 1.8V Power Systems Scanners

ADS127L01 Evaluation Module

The AD91661 is a high performance, wideband, on-chip vector signal generator composed of a high speed JESD204B serializer/deserializer (SERDES) interface, a flexible 16-bit digital datapath, a inphase/quadrature (I/Q) digital-to-analog converter (DAC) core, and an integrated differential to single-ended outputbuffer amplifier, matched to a 50 ? load up to 10 GHz.The DAC core is based on a quad-switch architecture, which is configurable to increase the effective DAC core update rate of up to 12.8 GSPS from a 6.4 GHz DAC sampling clock, with an analog output bandwidth of true dc to 9.0 GHz, typically. The digital datapath includes multiple interpolation filter stages, a direct digital synthesizer (DDS) block with multiple numerically controlled oscillators (NCOs) supporting fast frequency hopping (FFH), and additional FIR85 and inverse sinc filter stages to allow flexible spectrum planning.The differential to single-ended buffer eliminates the need for a wideband balun, and supports the full analog output bandwidth of the DAC core. DC coupling the output allows baseband waveform generation without the need for external bias tees or similar circuitry, which makes the AD9166 uniquely suited for the mostdemanding high speed ultrawideband RF transmit applications. The various filter stages enable the AD9166 to be configured for lower data rates, while maintaining higher DAC clock rates to ease the filtering requirements and reduce the overall system size, weight, and power.The data interface receiver consists of up to eight JESD204B SERDES lanes, each capable of carrying up to 12.5 Gbps. To enable maximum flexibility, the receiver is fully configurable according to the data rate, number of SERDES lanes, and lane mapping required by the JESD204B transmitter.In 2? nonreturn-to-zero (NRZ) mode of operation (with FIR85 enabled), the AD9166 can reconstruct RF carriers from true dc to the edge of the third Nyquist zone, or an analog bandwidth of true dc up to 9 GHz.In mix mode, the AD9166 can reconstruct RF carriers in the second and third Nyquist zones while consuming lower power and maintaining a performance comparable to 2? NRZ mode.In baseband modes, such as return-to-zero (RZ) and 1? NRZ, the AD9166 is ideal to reconstruct RF carriers from true dc to the edge of the first Nyquist zone while consuming lower power compared to 2? NRZ mode.The quadrature DDS block can be configured as a digital upconverter to upconvert I/Q data samples to the desired location across the spectrum, in all three Nyquist zones.The DDS also consists of a bank of 32 numerically controlled oscillators (NCOs), each with its own 32-bit phase accumulator. When combined with a 100 MHz serial peripheral interface (SPI), the DDS allows a phase coherent FFH, with a phase settling time as low as 300 ns.The AD9166 is configured using a common SPI interface that monitors the status of all registers. The AD9166 is offered in a 324-ball, 15 mm ? 15 mm, 0.8 mm pitch BGA_ED package.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 9 GHz. Fully supports zero IF and other dc-coupled applications. Up to an eight-lane JESD204B SERDES interface, with various features to allow flexibility when interfacing to a JESD204B transmitter.Applications Instrumentation: automated test equipment, electronic test and measurement, arbitrary waveform generators Electronic warfare: radars, jammers Broadband communications systems Local oscillator drivers1 Protected by U.S. Patents 6,842,132 and 7,796,971.

DC817A: Demo Board for the LTC2927 Single Power Supply Tracking Controller.