The ADL5569 is a high performance, dual, differential amplifier with 20 dB of voltage gain, optimized for applications spanning from dc to 6.5 GHz. The amplifier is available in a dual format, and it offers a low referred to input (RTI) noise spectral density (NSD) of 1.0 nV/?Hz (at 100 MHz) and excellent distortion performance over a wide frequency range, making it an ideal driver for high speed 12-bit to 16-bit analog-to-digital converters (ADCs). The ADL5569 is ideally suited for use in high performance zero intermediate frequency (IF) and complex IF receiver designs. In addition, this device has excellent low distortion for single-ended input driver applications.Using two external series resistors for each amplifier expands the gain flexibility of the amplifier and allows any gain selection from 6 dB to 20 dB for a differential input. For a single-ended input, the gain can be adjusted from 6 dB to 17 dB with the addition of some external resistors. This device maintains low distortion through its output common-mode range of 2.0 V to 3.0 V, providing a flexible capability for driving ADCs with ac levels up to 2 VP-P.Operating from a single 5 V supply, the quiescent current of the ADL5569 is typically 86 mA per amplifier. When disabled, the amplifiers consume only 8 mA per amplifier.The device is optimized for wideband, low distortion, and low noise operation, giving it unprecedented second harmonic distortion (HD2) and third harmonic distortion (HD3) from dc to 4 GHz. These attributes, together with its adjustable gain capability, make this device the amplifier of choice for driving a wide variety of ADCs, mixers, pin diode attenuators, surface acoustic wave (SAW) filters, and a multitude of discrete radio frequency (RF) devices.Fabricated on an Analog Devices, Inc., high speed silicon germanium (SiGe) process, the ADL5569 is supplied in a compact 2.5 mm ? 3 mm, 16-lead LFCSP package and operates over the ?40?C to +85?C temperature range.APPLICATIONS Differential ADC drivers for GSPS ADCs High speed data acquisition Single-ended to differential conversion DAC buffering DC coupling and level shifting RF/IF gain blocks Balun alternative from dc to 4 GHz SAW filter interfacing

The ADG1421 / ADG1422?/ ADG1423?contain two independent single-pole/single-throw (SPST) switches. The ADG1421 and ADG1422 differ only in that the digital control logic is inverted. The ADG1421 switches are turned on with Logic 1 on the appropriate control input, and Logic 0 is required for the ADG1422. The ADG1423 has one switch with digital control logic similar to that of the ADG1421; the logic is inverted on the other switch. The ADG1423 exhibits break-before-make switching action for use in multiplexer applications. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.The iCMOS? (industrial CMOS) modular manufacturing process combines high voltage, complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has achieved. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size.The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. The iCMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments.PRODUCT HIGHLIGHTS 2.4 ? maximum on resistance at 25?C. Minimum distortion. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. 10-lead MSOP and 10-lead, 3 mm ? 3 mm LFCSP packages.APPLICATIONS Automatic test equipment Data acquisition systems Relay replacements Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

DC1850A-A: Demo Board for the LTC4366-1/LTC4366-2 High Voltage Surge Stopper.

The HMC6832 is an input selectable, 2:8 differential fanoutbuffer designed for low noise clock distribution. The IN_SELcontrol pin selects one of the two differential inputs. This inputis then buffered to all eight differential outputs. The low jitteroutputs of the HMC6832 lead to synchronized low noiseswitching of downstream circuits, such as mixers, analog-todigitalconverters (ADCs)/digital-to-analog converters (DACs),or serializer/deserializer (SERDES) devices. The device is capableof low voltage, positive emitter-coupled logic (LVPECL) or lowvoltage differential signaling (LVDS) configurations by pullingthe CONFIG pin low for LVPECL or high or open (internallypulled high) for pseudo LVDS.Product Highlights Multiple Output Configurations. The CONFIG pin allows the user to select LVPECL or LVDS output termination. Multiple Supply Voltage Operation. The HMC6832 operates at 2.5 V or 3.3 V for LVPECL terminations (2.5 V only for LVDS). Low Noise. The HMC6832 noise is low, typically from ?168 dBc/Hz to ?162 dBc/Hz up to 3000 MHz. Low Propagation Delay. The HMC6832 displays a low delay, less than 207 ps, typical. Channel skew is also low, ?5 ps, typical. Low Core Current. The HMC6832 has a low core current of 56 mA, typical. Applications SONET, Fibre Channel, GigE clock distribution ADC/DAC clock distribution Low skew and jitter clocks Wireless/wired communications Level translation High performance instrumentation Medical imaging Single-ended to differential conversions

Demonstration circuit 2362A is an adjustable 3A linear regulator featuring the LT3033. The LT3033 is a very low dropout voltage (VLDO™) linear regulator that operates from a single input supply down to 0.95V. The device supplies 3A output current with 95mV typical dropout voltage. The LT3033 is ideal for low input voltage to low output voltage applications, providing comparable electrical efficiency to a switching regulator. The LT3033 optimizes stability and transient response with low ESR ceramic output capacitors as small as 10µF. A 10nF bypass capacitor at REF/BYP pin typically reduces output voltage noise to 60µVRMS in a 10Hz to 100kHz bandwidth. Soft-start time is directly proportional to the REF/BYP capacitor value. The LT3033’s current limit, accurate to ±12% over a wide input voltage and temperature range, can be programmed by a single resistor. When the input-to-output differential voltage exceeds 5V, foldback current limit lowers the internal current limit level, which may override the external programmable current limit. LT3033 has a PWRGD pin which indicates when the ADJ pin is within 8% of its nominal value. By connecting an external pull-up resistor from PWRGD to either the IN or OUT pin, PWRGD is pulled low when the output falls below 90.1% of the regulated voltage. As the output voltage rises above 92% of its regulated voltage, the PWRGD pin voltage is pulled up. The LT3033 features output current monitoring by connecting a resistor from the IMON pin to GND. The IMON pin is the collector of a PNP current mirror that outputs 1/2650th of the power PNP current. This circuitry is active for VIMON ≤ (VOUT – 400mV). The LT3033 also features shutdown, reverse-battery protection, thermal limiting with hysteresis and reverse current protection. The LT3033 is available as an adjustable device with an output voltage down to the 200mV reference. The device is available in a thermally enhanced, low profile 3mm × 4mm × 0.75mm QFN package. The LT3033 data sheet gives a complete description of the part, operation and application information. The data sheet must be read in conjunction with this quick start guide for demo circuit 2362A.

The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.Applications Smartphones/Multimedia phones Digital Still Cameras/Digital Video Cameras Portable Media Players/Portable Audio Players Phone accessories products

The AD5371 contains 40 14-bit DACs in a single 80-lead LQFP or 100-ball CSP_BGA. The device provides buffered voltage outputs with a span of 4? the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into five groups of eight DACs. Three offset DACs allow the output range of the groups to be adjusted. Group 0 can be adjusted by Offset DAC 0, Group 1 can be adjusted by Offset DAC 1, and Group 2 to Group 4 can be adjusted by Offset DAC 2.The AD5371 offers guaranteed operation over a wide supply range, with VSS from ?16.5 V to ?4.5 V and VDD from 9 V to 16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The AD5371 has a high speed serial interface that is compatible with SPI, QSPI?, MICROWIRE?, and DSP interface standards and can handle clock speeds of up to 50 MHz. It also has a 100 MHz low voltage differential signaling (LVDS) serial interface.The DAC registers are updated on reception of new data. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register to allow removal of gain and offset errors.Each DAC output is gained and buffered on chip with respect to an external SIGGNDx input. The DAC outputs can also be switched to SIGGNDx via the CLR pin.APPLICATIONS Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical switches Industrial control systems Instrumentation

The AD7785 is a low power, low noise, complete analog front ends for high precision measurement applications. It contains a low noise 20-bit ?-? ADC with three differential analog inputs. The on-chip, low noise instrumentation amplifier means that signals of small amplitude can be interfaced directly to the ADC. With a gain setting of 64, the rms noise is 40 nV when the update rate equals 4.17 Hz.The device contains a precision low noise, low drift internal band gap reference and can also accept an external differential reference. Other on-chip features include programmable excitation current sources, burnout currents, and a bias voltage generator, the bias voltage generator being used to set the common-mode voltage of a channel to AVDD/2.The device can be operated with either the internal clock or an external clock. The output data rate from the part is software-programmable and can be varied from 4.17 Hz to 470 Hz.The part operates with a power supply from 2.7 V to 5.25 V. It consumes a current of 400 ?A typical and is housed in 16-lead TSSOP packages.APPLICATIONS Thermocouple measurements RTD measurements Thermistor measurements Gas analysis Industrial process control Instrumentation Portable instrumentation Blood analysis Smart transmitters Liquid/gas chromatography 6-digit DVM

The ADXL1001/ADXL1002 deliver ultralow noise density over an extended frequency range with two full-scale range options, and are optimized for industrial condition monitoring. The ADXL1001 (?100 g) and the ADXL1002 (?50 g) have typical noise densities of 30 ?g/?Hz and 25 ?g/?Hz, respectively. Both accelerometer devices have stable and repeatable sensitivity, which is immune to external shocks up to 10,000 g.The ADXL1001/ADXL1002 have an integrated full electrostatic self test (ST) function and an overrange (OR) indicator that allow advanced system level features and are useful for embedded applications. With low power and single-supply operation of 3.3 V to 5.25 V, the ADXL1001/ADXL1002 also enable wireless sensing product design. The ADXL1001/ ADXL1002 are available in a 5 mm ? 5 mm ? 1.80 mm LFCSP package, and are rated for operation over a ?40?C to +125?C temperature range.Applications Condition monitoring Predictive maintenance Asset health Test and measurement Health usage monitoring sytems (HUMS)

The AD5753 is a single-channel, voltage and current outputdigital-to-analog converter (DAC) that operates with a powersupply range from a minimum of ?33 V on AVSS to a maximum of+33 V on AVDD1 with a maximum operating voltage of 60 Vbetween the two rails. On-chip dynamic power control (DPC)minimizes package power dissipation. This minimization isachieved by using buck dc-to-dc converters optimized forminimum on-chip power dissipation to regulate the voltage(VDPC+ and VDPC?) that is sent to the VIOUT output driver circuitryfrom the ?5 V to ?27 V supply voltage. The CHART pin enables aHighway Addressable Remote Transducer? (HART) signal to becoupled on the current output. The AD5753 uses a versatile, 4-wire, serial peripheral interface (SPI) that operates at clock rates of up to 50 MHz and is compatible with standard SPI, QSPI?, MICROWIRE?, digital signal processor (DSP), and microcontroller interface standards. The interface features an optional SPI cyclic redundancy check (CRC) and a watchdog timer (WDT). The AD5753 offers improved diagnostic features from earlier versions of similar DACs, such as output current monitoring and an integrated, 12-bit diagnostic analog-to-digital converter (ADC). The inclusion of a line protector on the VIOUT, +VSENSE, and ?VSENSE pins provides additional robustness. Product Highlights Range of advanced diagnostic features, including integrated ADC with two external input pins. DPC, using integrated buck dc-to-dc converters for thermal management, which enables higher channel count in small size module housing. Programmable power control (PPC) mode to enable faster than DPC settling time (15 ?s typical). Highly robust with output protection from miswire events (?38 V). HART compliant.Applications Process control Actuator control Channel isolated analog outputs Programmable logic controller (PLC) and distributed control systems (DCS) applications HART network connectivity