The HMC727 is a D-type Flip Flop designed to support data transmission rates of up to 13 Gbps, and clock frequencies as high as 13 GHz. During normal operation, data is transferred to the outputs on the positive edge of the clock. Reversing the clock inputs allows for negative-edge triggered applications. All input signals to the HMC727 are terminated with 50 Ohms to ground on-chip, and maybe either AC or DC coupled.The differential outputs of the HMC727 may be either AC or DC coupled. Outputs can be connected directly to a 50 Ohm to ground terminated system, while DC blocking capacitors may be used if the terminating system is 50 Ohms to a nonground DC voltage. The HMC727 operates from a single -3.3V DC supply and is available in a ceramic RoHS compliant 3x3 mm SMT package.APPLICATIONS RF ATE Applications Broadband Test & Measurement Serial Data Transmission?up to 13 Gbps Digital Logic Systems up to 13 GHz

The HMC737 is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO. The HMC737 integrate a resonator, negative resistance device, varactor diode and feature half frequency output. The VCO's phase noise performance is excellent over temperature, shock, and process due to the oscillator's monolithic structure. Power output is +9 dBm typical from a +4.2V supply voltage. The voltage controlled oscillator is packaged in a leadless QFN 4x4 mm surface mount package, and requires no external matching components.APPLICATIONS Point-to-Multi-Point Radios Test Equipment & Industrial Controls SATCOM Military End-Use

The HMC740 is an InGaP Heterojunction Bipolar Transistor (HBT) Gain Block MMIC SMT amplifier covering 0.05 to 3 GHz. Packaged in an industry standard SOT89, the amplifier can be used as a cascadable 50 Ohm RF or IF gain stage as well as a PA or LO driver with up to +18 dBm output power. The HMC740 offers 15 dB of gain with a +40 dBm output IP3 at 100 MHz, and can operate directly from a +5V supply. The HMC740 exhibits excellent gain and output power stability over temperature, while requiring a minimal number of external bias components.Applications Cellular/3G & WiMAX/4G Fixed Wireless & WLAN CATV, Cable Modem & DBS Microwave Radio & Test Equipment IF & RF Applications

The HMC686LP4(E) is a high dynamic range passive MMIC mixer with integrated LO amplifier in a 4x4 SMT QFN package covering 0.7 to 1.1 GHz. Excellent input IP3 performance of +34 dBm for down conversion is provided for 3G & 4G GSM/CDMA applications at an LO drive of 0 dBm. With an input 1 dB compression of +25 dBm, the RF port will accept a wide range of input signal levels. Conversion loss is 7.5 dB typical. The DC to 500 MHz IF frequency response will satisfy GSM/CDMA transmit or receive frequency plans.The HMC686LP4(E) is optimized to high side LO frequency plans for 0.7 - 1.1 GHz RF Band and is pin for pin compatible with the?HMC684LP4(E)?which is a 0.7 - 1.0 GHz converter optimized for low side LO. The HMC686LP4(E) is optimized to low side LO frequency plans for 1.4 - 1.5 GHz RF LTE band applications.APPLICATIONS Cellular/3G & LTE/WiMAX/4G Basestations & Repeaters GSM, CDMA & OFDM Transmitters and Receivers

Phase Locked Loops - PLL WBand RF PLL VCO, 25-3000MHz

The AD5371 contains 40 14-bit DACs in a single 80-lead LQFP or 100-ball CSP_BGA. The device provides buffered voltage outputs with a span of 4? the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into five groups of eight DACs. Three offset DACs allow the output range of the groups to be adjusted. Group 0 can be adjusted by Offset DAC 0, Group 1 can be adjusted by Offset DAC 1, and Group 2 to Group 4 can be adjusted by Offset DAC 2.The AD5371 offers guaranteed operation over a wide supply range, with VSS from ?16.5 V to ?4.5 V and VDD from 9 V to 16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The AD5371 has a high speed serial interface that is compatible with SPI, QSPI?, MICROWIRE?, and DSP interface standards and can handle clock speeds of up to 50 MHz. It also has a 100 MHz low voltage differential signaling (LVDS) serial interface.The DAC registers are updated on reception of new data. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register to allow removal of gain and offset errors.Each DAC output is gained and buffered on chip with respect to an external SIGGNDx input. The DAC outputs can also be switched to SIGGNDx via the CLR pin.APPLICATIONS Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical switches Industrial control systems Instrumentation

The ADA4941-1 is a low power, low noise differential driver foranalog-to-digital converters (ADCs) up to 18 bits in systemsthat are sensitive to power. The ADA4941-1 is configured in aneasy-to-use, single-ended-to-differential configuration andrequires no external components for a gain of 2 configuration.A resistive feedback network can be added to achieve gains greaterthan 2. The ADA4941-1 provides essential benefits, such as lowdistortion and high SNR that are required for driving highresolution ADCs.With a wide input voltage range (0 V to 3.9 V on a single 5 Vsupply), rail-to-rail output, high input impedance, and a user-adjustablegain, the ADA4941-1 is designed to drive single-supplyADCs with differential inputs found in a variety of low powerapplications, including battery-operated devices and singlesupplydata acquisition systems.The ADA4941-1 is ideal for driving the 16-bit and 18-bitPulSAR? ADCs, such as the AD7687, AD7690, and AD7691.The ADA4941-1 is manufactured on Analog Devices, Inc.,proprietary, second-generation, eXtra fast complementarybipolar (XFCB) process, which enables the amplifier to achieve18-bit performance on low supply currents.The ADA4941-1 is available in a small 8-lead LFCSP as well as astandard 8-lead SOIC and is rated to work over the extendedindustrial temperature range, ?40?C to +125?C. Applications Single-supply data acquisition systems Instrumentation Process control Battery-power systems Medical instrumentation

The ADA8282 is designed for applications that require low cost, low power, compact size, and flexibility. The ADA8282 has four parallel channels, each including a low noise preamplifier (LNA) and a programmable gain amplifier (PGA). The LNA and PGA combine to form a signal chain that features a gain range of 18 dB to 36 dB in 6 dB increments with a guaranteed minimum bandwidth of 5 MHz.Using the highest power settings, the combined input referred voltage noise of the combined LNA and PGA channel is 3.4 nV/?Hz at maximum gain. The ADA8282 can be configured in four power modes that trade off power and noise performance to optimize the performance according to the end application. Fabricated in an advanced complementary metal-oxide semiconductor (CMOS) process, the ADA8282 is available in a 5 mm ? 5 mm, RoHS-compliant, 32-lead LFCSP. It is specified over the automotive temperature range of ?40?C to +125?C. Applications Automotive radar Adaptive cruise control Collision avoidance Blind spot detection Self parking Electronic bumper

The ADCLK905 (one input, one output), ADCLK907 (dual oneinput, one output), and ADCLK925 (one input, two outputs) areultrafast clock/data buffers fabricated on the Analog Devices, Inc.,proprietary XFCB3 silicon germanium (SiGe) bipolar process.The ADCLK905/ADCLK907/ADCLK925 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For NECL (negative ECL) operation, bias VCC to ground and VEE to the negative supply.The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate, 10 Gbps data rate, and 60 fs random jitter (RJ).The inputs have center tapped, 100 ?, on-chip termination resistors. A VREF pin is available for biasing ac-coupled inputs.The ECL output stages are designed to directly drive 800 mV each side into 50 ? terminated to VCC ? 2 V for a total differential output swing of 1.6 V.The ADCLK905/ADCLK907/ADCLK925 are available in 16-lead LFCSP packages.Applications Clock and data signal restoration and level shifting Automated test equipment (ATE) High speed instrumentation High speed line receivers Threshold detection Converter clocking

The ADCLK946 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.The device has a differential input equipped with center-tapped, differential, 100 ? on-chip termination resistors. The input accepts dc-coupled LVPECL, CML, 3.3 V CMOS (single ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREF pin is available for biasing ac-coupled inputs.The ADCLK946 features six full-swing emitter-coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply.The ECL output stages are designed to directly drive 800 mV each side into 50 ? terminated to VCC ? 2 V for a total differen-tial output swing of 1.6 V.The ADCLK946 is available in a 24-lead LFCSP and is specified for operation over the standard industrial temperature range of ?40?C to +85?C.ApplicationsLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation