The AD9736, AD9735, and AD9734 are high performance, high frequency DACs that provide sample rates of up to 1200 MSPS, permitting multicarrier generation up to their Nyquist frequency. The AD9736 is the 14-bit member of the family, while the AD9735 and the AD9734 are the 12-bit and 10-bit members, respectively. They include a serial peripheral interface (SPI) port that provides for programming of many internal parameters and enables readback of status registers.A reduced-specification LVDS interface is utilized to achieve the high sample rate. The output current can be programmed over a range of 8.66 mA to 31.66 mA. The AD973x family is manufactured on a 0.18 ?m CMOS process and operates from 1.8 V and 3.3 V supplies for a total power consumption of 380 mW in bypass mode. It is supplied in a 160-lead chip scale ball grid array for reduced package parasitics.Product Highlights Low noise and intermodulation distortion (IMD) features enable high quality synthesis of wideband signals at intermediate frequencies up to 600 MHz. Double data rate (DDR) LVDS data receivers support the maximum conversion rate of 1200 MSPS. Direct pin programmability of basic functions or SPI port access offers complete control of all AD973x family functions. Manufactured on a CMOS process, the AD973x family uses a proprietary switching technique that enhances dynamic performance. The current output(s) of the AD9736 family are easily configured for single-ended or differential circuit topologies.Applications Broadband communications systems Cellular infrastructure(digital predistortion) Point-to-point wireless CMTS/VOD Instrumentation, automatic test equipment Radar, avionics

The AD97481 is an 8-bit resolution, wideband, third generation member of the TxDAC series of high performance, low power CMOS digital-to-analog converters (DACs). The TxDAC family, consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface options, small outline package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost. The AD9748 offers exceptional ac and dc performance while supporting update rates up to 210 MSPS. The AD9748?s low power dissipation makes it well suited for portable and low power applications. Its power dissipation can be further reduced to 60 mW with a slight degradation in performance by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 15 mW. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a 1.2 V temperature-compensated band gap reference have been integrated to provide a complete monolithic DAC solution. The digital inputs support 3 V CMOS logic families. PRODUCT HIGHLIGHTS 32-lead LFCSP. The AD9748 is the 8-bit member of the pin-compatible TxDAC family, which offers excellent INL and DNL performance. Differential or single-ended clock input (LVPECL or CMOS), supports 210 MSPS conversion rate. Data input supports twos complement or straight binary data coding. Low power: Complete CMOS DAC function operates on 135 mW from a 2.7 V to 3.6 V single supply. The DAC full-scale current can be reduced for lower power operation, and a sleep mode is provided for low power idle periods. On-chip voltage reference: The AD9748 includes a 1.2 V temperature-compensated band gap voltage reference.?APPLICATIONS Communications Direct digital synthesis (DSS) Instrumentation

The AD9761 is a complete dual channel, high speed, 10-bitCMOS DAC. The AD9761 has been developed specifically foruse in wide bandwidth communication applications (e.g., spreadspectrum) where digital I and Q information is being processedduring transmit operations. It integrates two 10-bit, 40 MSPSDACs, dual 2x interpolation filters, a voltage reference, anddigital input interface circuitry. The AD9761 supports a20 MSPS per channel input data rate that is then interpolatedby 2x up to 40 MSPS before simultaneously updating eachDAC.The interleaved I and Q input data stream is presented to thedigital interface circuitry, which consists of I and Q latches as wellas some additional control logic. The data is de-interleaved backinto its original I and Q data. An on-chip state machine ensures theproper pairing of I and Q data. The data output from each latch isthen processed by a 2x digital interpolation filter that eases thereconstruction filter requirements. The interpolated output of eachfilter serves as the input of their respective 10-bit DAC.The DACs utilize a segmented current source architecture combinedwith a proprietary switching technique to reduce glitchenergy and to maximize dynamic accuracy. Each DAC providesdifferential current output thus supporting single-ended ordifferential applications. Both DACs are simultaneously updatedand provide a nominal full-scale current of 10 mA. Also,the full-scale currents between each DAC are matched to within0.07 dB (i.e., 0.75%), thus eliminating the need for additionalgain calibration circuitry.The AD9761 is manufactured on an advanced low cost CMOSprocess. It operates from a single supply of 2.7 V to 5.5 V andconsumes 200 mW of power. To make the AD9761 complete italso offers an internal 1.20 V temperature-compensated bandgapreference.PRODUCT HIGHLIGHTS Dual 10-Bit, 40 MSPS DACs A pair of high performance 40 MSPS DACs optimized for low distortion performance provide for flexible transmission of I and Q information. 2x Digital Interpolation Filters Dual matching FIR interpolation filters with 62.5 dB stopband rejection precede each DAC input, thus reducing the DACs? reconstruction filter requirements. Low Power Complete CMOS dual DAC function operates on a low 200 mW on a single supply from 3 V to 5.5 V. The DAC full-scale current can be reduced for lower power operation, and a sleep mode is provided for power reduction during idle periods. On-Chip Voltage Reference The AD9761 includes a 1.20 V temperature-compensated band gap voltage reference. Single 10-Bit Digital Input Bus The AD9761 features a flexible digital interface that allows each DAC to be addressed in a variety of ways including different update rates. Small Package The AD9761 offers the complete integrated function in a compact 28-lead SSOP package. Product Family The AD9761 Dual Transmit DAC has a pair of Dual Receive ADC companion products, the AD9281 (8 bits) and AD9201 (10 bits).

The AD9763/AD9765/AD9767 are dual-port, high speed, 2-channel, 10-/12-/14-bit CMOS DACs. Each part integratestwo high quality TxDAC+? cores, a voltage reference, and digital interface circuitry into a small 48-lead LQFP. The AD9763/AD9765/AD9767 offer exceptional ac and dc performancewhile supporting update rates of up to 125 MSPS.The AD9763/AD9765/AD9767 have been optimized forprocessing I and Q data in communications applications. Thedigital interface consists of two double-buffered latches as well as control logic. Separate write inputs allow data to be written to the two DAC ports independent of one another. Separate clocks control the update rate of the DACs.A mode control pin allows the AD9763/AD9765/AD9767 to interface to two separate data ports, or to a single interleavedhigh speed data port. In interleaving mode, the input datastream is demuxed into its original I and Q data and then latched. The I and Q data is then converted by the two DACsand updated at half the input data rate.The GAINCTRL pin allows two modes for setting the full-scale current (IOUTFS) of the two DACs. IOUTFS for each DAC can be set independently using two external resistors, or IOUTFS for both DACs can be set by using a single external resistor. See theGain Control Mode section for important date codeinformation on this feature.The DACs utilize a segmented current source architecturecombined with a proprietary switching technique to reduce glitch energy and maximize dynamic accuracy. Each DAC providesdifferential current output, thus supporting single-ended or differential applications. Both DACs of the AD9763, AD9765, or AD9767 can be simultaneously updated and can provide anominal full-scale current of 20 mA. The full-scale currentsbetween each DAC are matched to within 0.1%.The AD9763/AD9765/AD9767 are manufactured on anadvanced, low cost CMOS process. They operate from a singlesupply of 3.3 V to 5 V and consume 380 mW of power.Product HighlightsThe AD9763/AD9765/AD9767 are members of a pin-compatible family of dual TxDACs providing 8-, 10-, 12-, and 14-bit resolution.Dual 10-/12-/14-Bit, 125 MSPS DACs. A pair of high performance DACs for each part is optimized for low distortion performance and provides flexible transmission of I and Q information.Matching. Gain matching is typically 0.1% of full scale, and offset error is better than 0.02%.Low Power. Complete CMOS dual DAC function operates on 380 mW from a 3.3 V to 5 V single supply. The DAC full-scalecurrent can be reduced for lower power operation, and a sleepmode is provided for low power idle periods.On-Chip Voltage Reference. The AD9763/AD9765/AD9767each include a 1.20 V temperature-compensated band gapvoltage reference.Dual 10-/12-/14-Bit Inputs. The AD9763/AD9765/AD9767each feature a flexible dual-port interface, allowing dual orinterleaved input data.ApplicationsCommunicationsBase stationsDigital synthesisQuadrature modulation3D ultrasound

Demonstration circuit 2374A is a multi-chemistry battery charger with optional maximum power point tracking (MPPT) featuring the LTC4013. The LTC4013 has configurable 3 stage and 4 stage lead acid and Li-Ion battery algorithms in addition to 2 stage CC/CV charge cycles. The DC2374A is set up to operate from a 21.5V to 35V supply or from a solar panel and charges a six cell lead acid battery at 5A. It also can be configured to operate down to 5V. There are optional input and output capacitors plus large inductor pads and parallel top and bottom FET pads to allow high power charging. The operating frequency, charge voltage, low battery (LB) voltage setting and timing are configurable with external resistors and a capacitor. The different charging algorithms are jumper-selectable, set by two tri-state mode pins and the TIMER pin.

Demonstration Circuit 2375A is a dual output 350mA step down charge pump with a post-regulator LDO and watchdog timer featuring the LTC3256EMSE. The LTC3256 operates with a wide input voltage range from 5.5V to 38V and is engineered for diagnostic coverage in ISO262262 systems. The LTC3256 can provide up to 350mA of output current from a 12V battery with 2W less power dissipation than 2 ideal linear regulators. The DC2375A was populated with automotive grade components for evaluation. Because of the wide input operating range it is possible to exceed the specified operating junction temperature and even reach thermal shutdown with heavy loads. Please refer to the data sheet for additional information on the thermal limitations of the device.

The LTC2664 is a family of four-channel, 16-/12-bit ?10V digital-to-analog converters with integrated precision references. They are guaranteed monotonic and have built-in rail-to-rail output buffers. These SoftSpan? DACs offer five output ranges up to ?10V. The range of each channel is independently programmable, or the part can be hardware-configured for operation in a fixed range.The integrated 2.5V reference is buffered separately to each channel; an external reference can be used for additional range options. The LTC2664 also includes A/B toggle capability via a dedicated pin or software toggle command.The SPI/Microwire-compatible 3-wire serial interface operates on logic levels as low as 1.71V at clock rates up to 50MHz.Applications Optical Networking Instrumentation Data Acquisition Automatic Test Equipment Process Control and Industrial Automation

The LTC2325-16 is a low noise, high speed quad 16?bit successive approximation register (SAR) ADC with differential inputs and wide input common mode range. Operating from a single 3.3V or 5V supply, the LTC2325-16 has an 8VP-P differential input range, making it ideal for applications which require a wide dynamic range with high common mode rejection. The LTC2325-16 achieves ?2LSB INL typical, no missing codes at 16 bits and 82dB SNR.The LTC2325-16 has an onboard low drift (20ppm/?C max) 2.048V or 4.096V temperature-compensated reference. The LTC2325-16 also has a high speed SPI-compatible serial interface that supports CMOS or LVDS. The fast 5Msps per channel throughput with one cycle latency makes the LTC2325-16 ideally suited for a wide variety of high speed applications. The LTC2325-16 dissipates only 40mW per channel and offers nap and sleep modes to reduce the power consumption to 90?W for further power savings during inactive periods.Applications High Speed Data Acquisition Systems Communications Optical Networking Multiphase Motor Control

The LTC2324-12 is a low noise, high speed quad 12-bit + sign successive approximation register (SAR) ADC with differential inputs and wide input common mode range. Operating from a single 3.3V or 5V supply, the LTC2324- 12 has an 8VP-P differential input range, making it ideal for applications which require a wide dynamic range with high common mode rejection. The LTC2324-12 achieves ?0.5LSB INL typical, no missing codes at 12 bits and 78dB SNR.The LTC2324-12 has an onboard low drift (20ppm/?C max) 2.048V or 4.096V temperature-compensated reference. The LTC2324-12 also has a high speed SPI-compatible serial interface that supports CMOS or LVDS. The fast 2Msps per channel throughput with no latency makes the LTC2324-12 ideally suited for a wide variety of high speed applications. The LTC2324-12 dissipates only 40mW per channel and offers nap and sleep modes to reduce the power consumption to 26?W for further power savings during inactive periods.Applications High Speed Data Acquisition Systems Communications Optical Networking Multiphase Motor Control

Demonstration circuit 2397A features the LTC3130-1, a wide input voltage, wide output voltage operating range, high efficiency, low noise monolithic DC/DC buck-boost converter that provides 600mA of output current when in buck mode. The LTC3130-1 has 4-pin selectable output voltages (1.8V, 3.3V, 5V and 12V) and operates from input voltages of 2.4V to 25V. The LTC3130-1 incorporates a proprietary low noise switching algorithm which optimizes efficiency with input voltages above, below, or equal to the output voltage and ensures seamless transitions between operating modes.