SmartMesh WirelessHART networks are populated by motes, the nodes on the network. Based on the Dust® break-through Eterna® technology, the motes are ultralow power, extending battery life to years and many times that of alternative products. In addition to extra long battery life, the motes feature an advanced array of features. DC9018A-C Evaluation/Development Mote incorporates the RF-Certified LTP5901-WHM SmartMesh WirelessHART Mote PCB Module (including chip antenna) and a CR2032 coin cell. The DC9018A-C is also available as part of the DC9022A SmartMesh WirelessHART RF Certified Starter Kit. SmartMesh WirelessHART Starter Kit Software Software Utility Description Download Link SmartMesh SDK (optional) Software development kit used to interact with the devices’ Application Programming Interface (API) GitHub Repository

SmartMesh IP wireless sensor networks are self managing, low power internet protocol (IP) networks built from wireless nodes called motes. The LTC5800-IPM is the SmartMesh IP integrated circuit in the Eterna? family of IEEE 802.15.4e System-on-Chip (SoC) solutions, featuring a highly integrated, low power radio design as well as an ARM Cortex-M3 32-bit microprocessor running SmartMesh IP embedded networking software.With SmartMesh IP time-synchronized networks, all motes in the network may route, source or terminate data, while providing many years of battery powered operation. SmartMesh IP is a highly flexible network with proven reliability and low power performance in an easy-to-integrate platform.The LTC5800-IPM?s behavior in a SmartMesh IP network is determined by the choice of SmartMesh IP network software loaded: Wireless Mote, EManager, or Access Point Mote in a SmartMesh IP network. The SmartMesh IP software provided with the LTC5800-IPM is fully tested and validated, and is readily configured via a software Application Programming Interface. Once you have purchased SmartMesh IP products, the SmartMesh IP stack binaries may be downloaded via your myAnalog account.The pin signaling behavior of the LTC5800*WR-IPMA hardware is determined by the software loaded and is described in detail in the following product datasheets: LTC5800-IPM = LTC5800*WR-IPMA hardware + SmartMesh IP ?Mote? Software ? LTC5800-IPM Datasheet LTC5800-IPR = LTC5800*WR-IPMA hardware + SmartMesh IP EManager Software ? LTC5800-IPR Datasheet LTC5800-IPA = LTC5800*WR-IPMA hardware + SmartMesh IP Access Point Software ? LTC5800-IPA Datasheet Network Features Feature Benefit >99.999% Network Reliability Avoids communications dropouts common with other wireless networks NIST-certified AES-128 bit Encryption Data protected by end-to-end encryption, message integrity checking and device authentication Scalable Uses time-slotted channel-hopping protocol to avoid in-network collisions to maximize scale while minimizing power and latency-hungry transmission retries due to congestion Bidirectional Communications Ideal for both monitoring and control applications Up to 10 messages/second/node Time-slotted communications avoids contention. This data rate includes built-in margin for packet retries. Device Features Feature Benefit Industry-Leading Low Power Radio Technology ? 4.5mA to Receive a Packet ? 5.4mA to Transmit at 0dBm ? 9.7mA to Transmit at 8dBm Pre-engineered RF RF elements include an on-chip power amplifier and are pre-tuned for optimized performance, including temperature compensation, saving development time. Energy Harvesting Support Very low power design enables motes to be powered by a wide variety of energy harvesters. Click here to see a demonstration circuit of a SmartMesh IP mote powered by indoor light. Integrated Temperature Sensor Precise temperature sensor is integrated directly into the mote. ApplicationsSmartMesh IP is ideally suited for wireless Industrial Internet of Things (IoT) applications. Learn more about SmartMesh applications.?

The receive path consists of two independent, wide bandwidth (BW), direct conversion receivers with state-of-the-art dynamic range. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. RF front-end control and several auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) for the power amplifier (PA) are also integrated.In addition to automatic gain control (AGC), the ADRV9008-1 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time, sigma-delta (?-?) ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing relaxes the requirements of the RF filters compared to traditional intermediate frequency (IF) receivers.The fully integrated phase-locked loop (PLL) provides high per-formance, low power, fractional-N, RF synthesis for the receiver signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multi-chip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9008-1 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9008-1 can be powered directly from 1.3 V and 1.8 V regulators and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to mini-mize power consumption during normal use. The ADRV9008-1 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G FDD, macrocell base stations Wide band active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment

DC1066A: Demo Board for the LTC4355 Positive High Voltage Ideal Diode-OR with Input Supply and Fuse Monitors.

The LTC3889 is a dual PolyPhase DC/DC synchronous step-down switching regulator controller with I2C-based PMBus compliant serial interface. This controller employs a constant-frequency, current-mode architecture, with high voltage input and output capability along with programmable loop compensation. The LTC3889 is supported by the LTpowerPlay? software development tool with graphical user interface (GUI).The EXTVCC pin supports voltages up to 14V allowing for optimized circuit efficiency and die temperature, and for the controller output to supply the chip power. Switching frequency, output voltage, and device address can be programmed both by digital interface as well as external configuration resistors. Parameters can be set via the digital interface or stored in EEPROM. Both outputs have an independent power good indicator and FAULT function.The LTC3889 can be configured for discontinuous (pulse-skipping) mode or continuous inductor current mode.APPLICATIONS Telecom, Datacom, and Storage Systems Industrial and Point of Load Applications

The ADG918/ADG919 are wideband switches using a CMOSprocess to provide high isolation and low insertion loss to1 GHz. The ADG918 is an absorptive (matched) switch having50 ? terminated shunt legs, whereas the ADG919 is a reflectiveswitch. These devices are designed such that the isolation ishigh over the dc to 1 GHz frequency range. They have on-boardCMOS control logic, thus eliminating the need for externalcontrolling circuitry. The control inputs are both CMOS andLVTTL compatible. The low power consumption of theseCMOS devices makes them ideally suited to wireless andgeneral-purpose high frequency switching applications.Product Highlights ?43 dB off isolation at 1 GHz. 0.8 dB insertion loss at 1 GHz. Tiny 8-lead MSOP/LFCSP.Applications Wireless communications General-purpose RF switching Dual-band applications High speed filter selection Digital transceiver front end switch IF switching Tuner modules Antenna diversity switching

The ADGM1004 is a wideband, single-pole, four-throw (SP4T)?switch fabricated using Analog Devices, Inc., microelectro-mechanical system (MEMS) switch technology. This technology enables a small form factor, wide RF bandwidth, highly linear, low insertion loss switch that is operational from 0 Hz/dc to 13 GHz, making it an ideal solution for a wide range of RF and precision?equipment switching needs.An integrated driver chip generates a high voltage to electrostatically actuate switch that can be controlled by a parallel interface and a serial peripheral interface (SPI). All four switches are independently controllable.The device is packaged in a 24-lead, 5 mm ? 4 mm ? 1.45 mm, lead frame chip-scale package (LFCSP).To ensure optimum operation of the ADGM1004, follow the?Critical Operational Requirements section exactly. The on resistance (RON) performance of the ADGM1004 is?affected by part to part variation, channel to channel variation,?cycle actuations, settling time post turn on, bias voltage, and?temperature changes. Note that throughout this data sheet, multifunction pins, such?as IN1/SDI, are referred to either by the entire pin name or by a?single function of the pin, for example, SDI, when only that function is relevant.Applications Relay replacements Automatic test equipment (ATE): RF, digital, and mixed signals Load and probe boards: RF, digital, and mixed signals RF test instrumentation Reconfigurable filters and attenuators High performance RF switching

The ADGS1412 contains four independent single-pole/single-throw(SPST) switches. A serial peripheral interface (SPI)controls the switches. The SPI interface has robust error detectionfeatures such as cyclic redundancy check (CRC) error detection,invalid read/write address detection, and SCLK count errordetection.It is possible to daisy-chain multiple ADGS1412 devices together.Daisy-chain mode enables the configuration of multiple deviceswith a minimal amount of digital lines. The ADGS1412 can alsooperate in burst mode to decrease the time between SPIcommands.iCMOS construction ensures ultralow power dissipation, makingthe device ideally suited for portable and battery-poweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked.The on-resistance profile is flat over the full analog input range,which ensures good linearity and low distortion when switchingaudio signals.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces general-purpose input/output (GPIO) channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and error detection capabilities allow the use of the ADGS1412 in safety critical systems. Guaranteed break-before-make switching allows the use of the ADGS1412 in multiplexer configurations with external wiring. Minimum distortion.Applications Automated test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communications systems Relay replacement

The ADIN1100 is a low power, single port, 10BASE-T1L transceiver designed for industrial Ethernet applications and is compliant with the IEEE? 802.3cg-2019? Ethernet standard for long reach 10 Mbps single pair Ethernet (SPE). The ADIN1100 integrates an Ethernet PHY core with all the associated analog circuitry, input and output clock buffering, the management interface control register and subsystem registers, as well as the MAC interface and control logic to manage the reset, clock control, and pin configuration.The ADIN1100 supports cable reach of up to 1700 meters with autonegotiation enabled and has ultra low power consumption of 39 mW.The PHY core supports the 1.0 V p-p operating mode and the 2.4 V p-p operating mode defined in the IEEE 802.3cg standard and can operate from a single power supply rail of 1.8 V or 3.3 V, with the lower voltage option supporting the 1.0 V p-p transmit voltage level.The ADIN1100 has an integrated voltage supply monitoring circuit and power-on reset (POR) circuitry to improve system level robustness.The MDIO interface is a 2-wire serial interface for communication between a host processor or MAC and the ADIN1100, thereby allowing access to control and status information in the PHY core management registers. This interface is compatible with both the IEEE 802.3 Standard Clause 22 and Clause 45 management frame structures.APPLICATIONS Process Control Factory Automation Building Automation Field instruments and switches

The ADIN1110 is an ultra low power, single port, 10BASE-T1L transceiver design for industrial Ethernet applications and is com-pliant with the IEEE? 802.3cg-2019? Ethernet standard for long reach, 10 Mbps single pair Ethernet (SPE). Featuring an integrated media access control (MAC) interface, the ADIN1110 enables direct connectivity with a variety of host controllers via a serial peripheral interface (SPI). This SPI enables the use of lower power processors without an integrated MAC, which provides for the lowest overall system level power consumption. The ADIN1110 is designed for edge node sensors and field instruments deployed in building, factor, and process automation.The device operates from a single power supply rail of 1.8 V or 3.3 V. Supporting both 1.0 V and 2.4 V amplitude modes of operations and external termination resistors, the ADIN1110 supports use within intrinsically safe environments. The programmable transmit levels, external termination resistors, and independent receive and transmit pins make the ADIN1110 suited to intrinsic safety applications.The ADIN1110 has an integrated voltage supply monitoring and power-on reset (POR) circuitry to improve system level robustness, and has a 4-wire SPI for communication between the MAC inter-face and host processor.The ADIN1110 is available in a 40-lead, 6 mm ? 6 mm lead frame chip scale package (LFCSP).APPLICATIONSField instruments Flow meters Pressure and temperature transducers Building automation Actuators Fire panels Elevators Edge node sensors Factory automation