The AD5544/AD5554 quad, 16-/14-bit, current output, digital-to-analog converters (DACs) are designed to operate from 2.7 V to 5.5 V supply range.The applied external reference input voltage (VREFX) determines the full-scale output current. Integrated feedback resistors (RFB) provide temperature-tracking, full-scale voltage outputs when combined with an external I-to-V precision amplifier.A double-buffered serial data interface offers high speed, 3-wire, SPI- and microcontroller-compatible inputs using serial data in (SDI), a chip select (CS), and clock (CLK) signals. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. A common, level-sensitive, load DAC strobe (LDAC) input allows the simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to 0 at system turn-on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.The AD5544 is packaged in the compact 28-lead SSOP and 32-lead LFCSP. ?The AD5554 is ?packaged in the compact 28-lead SSOP.Applications Automatic test equipment Instrumentation Digitally controlled calibration

The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ?-? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase- locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A simple 3-wire interface controls all on-chip registers. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.Applications CATV equipment Base stations for mobile radio (GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA, W-CDMA) Wireless handsets (GSM, PCS, DCS, CDMA, W-CDMA) Wireless LANs, PMR Communications test equipment

The ADF4155 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter, external voltage controlled oscillator (VCO), and external reference frequency.The ADF4155 is for use with external VCO parts up to an 8 GHz operating frequency. The high resolution programmable modulus allows synthesis of exact frequencies with 0 Hz error.The VCO frequency can be divided by 1, 2, 4, 8, 16, 32, or 64 to allow the user to generate RF output frequencies as low as 7.8125 MHz.Control of all on-chip registers is through a simple 3-wire interface. The device operates with a nominal power supply of 3.3 V ? 5% and can be powered down when not in use.The ADF4155 is available in a 24-lead, 4 mm ? 4 mm LFCSP package.APPLICATIONS Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Test equipment Wireless LANs, CATV equipment Clock generation

The ADF4159 is a 13 GHz, fractional-N frequency synthesizer with modulation and both fast and slow waveform generation capability. The part uses a 25-bit fixed modulus, allowing subhertz frequency resolution.The ADF4159 consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. The ?-?-based fractional interpolator allows programmable fractional-N division. The INT and FRAC registers define an overall N divider as N = INT + (FRAC/225).The ADF4159 can be used to implement frequency shift keying (FSK) and phase shift keying (PSK) modulation. Frequency sweep modes are also available to generate various waveforms in the frequency domain, for example, sawtooth and triangular waveforms. Sweeps can be set to run automatically, or each step manually triggered by an external pulse. The ADF4159 features cycle slip reduction circuitry, which enables faster lock times without the need for modifications to the loop filter.Control of all on-chip registers is via a simple 3-wire interface. The ADF4159 operates with an analog power supply in the range of 2.7 V to 3.45 V and a digital power supply in the range of 1.62 V to 1.98 V. The device can be powered down when not in use.ApplicationsCommunications infrastructureCommunications test equipmentInstrumentationFMCW radars

The ADF4360-1 is a fully integrated integer-N synthesizer andvoltage controlled oscillator (VCO). The ADF4360-1 is designed for a center frequency of 2250 MHz. In addition, there is a divide-by-2 option available, whereby the user gets an RF output of between 1025 MHz and 1225 MHz. Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V and can be powered down when not in use.?

The ADF4377 is a high performance, ultralow jitter, dual output integer-N phased locked loop (PLL) with integrated voltage controlled oscillator (VCO) ideally suited for data converter and mixed signal front end (MxFE) clock applications. The high performance PLL has a figure of merit of -239 dBc/Hz, ultralow 1/f Noise and a high phase frequency detector (PFD) frequency that can achieve ultralow in-band noise and integrated jitter. The ADF4377?s fundamental VCO and output divider generate frequencies from 800 MHz to 12.8 GHz. The ADF4377 integrates all necessary power supply bypass capacitors, saving board space on compact boards.For multiple data converter and MxFE clock applications, the ADF4377 simplifies clock alignment and calibration routines required with other clock solutions, by implementing:automatic reference to output synchronization,extremely well match reference to output delays across process, voltage, and temperature, andsub-ps, jitter free reference to output delay adjustment capability.These features allow for predictable and precise multi-chip clock and SYSREF alignment. JESD204B and JESD204C subclass 1 solutions are supported by pairing the ADF4377 with an integrated circuit(IC) that distributes pairs of reference and SYSREF signals.APPLICATIONSHigh Performance Data Converter and MxFE ClockingWireless infrastructure (MC-GSM, 5G)Test and Measurement

The ADGS1414D contains eight independent SPST switches. A serial peripheral interface (SPI) controls the switches. The SPI has robust error detection features, such as cyclic redundancy check (CRC) error detection, invalid read and write address detection, and SCLK count error detection. It is possible to daisy-chain multiple ADGS1414D devices together. Daisy-chain mode enables the configuration of multiple devices with a minimal amount of digital lines. The route of digital signals and supplies through the ADGS1414D allows for a further increase in channel density. Integrated passive components eliminate the need for external passive components. FUNCTIONAL BLOCK DIAGRAM Figure 1. The ADGS1414D is suited to high density switching applications, such as large switching matrices and fanout applications. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. Multifunction pin names may be referenced by their relevant function only.Applications? Automated test equipment Data acquisition systems Sample-and-hold systems Audio and video signal routing Communications systems Relay replacement

The ADuCM350 is a configurable Impedance Converter and Potentiostat with current and voltage measurement capability for both Electrochemical sensors and Biosensors. It is a complete, coin cell powered, high precision, MCU integrated solution for portable device applications such as point-of-care diagnostics and body-worn devices for monitoring vital signs.The ADuCM350 analog front end (AFE) features a 16-bit, precision, 160 kSPS analog-to-digital converter (ADC); 0.17% precision voltage reference; 12-bit, no missing codes digital-to-analog converter (DAC); and a reconfigurable ultralow leakage switch matrix. It has 4 voltage measurement channels, up to 8 current measurement channels and an impedance measurement DFT engine. The ADuCM350 also includes an ARM Cortex-M3-based processor, memory, and all I/O connectivity to support portable meters with display, USB communication, and active sensors. The ADuCM350 is available in a 120-lead, 8 mm ? 8 mm CSP_BGA and operates from ?40?C to +85?C. To support extremely low dynamic and hibernate power management, the ADuCM350 provides a collection of power modes and features, such as dynamic and software controlled clock gating and power gating.The AFE is connected to the ARM Cortex-M3 via an advanced high performance bus (AHPB) slave interface on the advanced microcontroller bus architecture (AMBA) matrix, as well as direct memory access (DMA) and interrupt connections.APPLICATIONS Point-of-care diagnostics Body-worn devices for monitoring vital signs Amperometric, voltametric, and impedometric measurements

The HMC1086F10 is a 25W Gallium Nitride (GaN)MMI C Power Amplifier which operates between2 and 6 GHz, and is provided in a 10-lead flangemount package. The amplifier typically provides23 dB of small signal gain, +44.5 dBm saturatedoutput power, and delivers +46 dBm output IP 3 at+33 dBm output power per tone. The amplifier draws1100 mA quiescent current from a +28V DC supply.The RF I/Os are DC blocked and matched to 50 Ohmsfor ease of use.Applications Test Instrumentation General Communications Radar EW /ECM

The AD1938 is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with input and eight digital-to-analog converters (DACs) with single-ended output using the Analog Devices, Inc., patented multibit sigma-delta (?-?) architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters.The AD1938 operates from 3.3 V digital and analog supplies. The AD1938 is available in a 48-lead (single-ended output) LQFP package. Other members of this family include a differential DAC output and I2C? control port version.The AD1938 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR clock or from an external crystal, the AD1938 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The DACs and ADCs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 3.3 V supplies, power consumption is minimized, further reducing emissions.APPLICATIONS Automotive audio systems Home Theater Systems Set-top boxes Digital audio effects processors