The AD4115 is a low power, low noise, 24-bit, sigma-delta (?-?) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for eight fully differential or 16 single-ended, high impedance (?1 M?), bipolar, ?10 V voltage inputs. The AD4115 integrates key analog and digital signal conditioning blocks to configure eight individual setups for each analog input channel in use. The AD4115 features a maximum channel scan rate of 24,845 kSPS (40.25 ?s) for fully settled data. The embedded 2.5 V, low drift (?5 ppm/?C), band gap internal reference (with output reference buffer) reduces the external component count. The digital filter allows flexible settings, including simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can select different filter settings depending on the requirements of each channel in the application. The automatic channel sequencer enables the ADC to switch through each enabled channel. The precision performance of the AD4115 is achieved by integrating the proprietary iPassives? technology from Analog Devices, Inc. The AD4115 is factory calibrated to achieve a high degree of specified accuracy. The AD4115 operates with a single power supply that allows simplified use in galvanically isolated applications. The specified operating temperature range is ?40?C to +105?C. The AD4115 is housed in a 40-lead, 6 mm ? 6 mm LFCSP. APPLICATIONSProcess controlProgrammable logic controller (PLC) and distributed control system (DCS) modulesInstrumentation and measurement

The AD4134 is a quad channel, low noise, simultaneous sampling, precision analog-to-digital converter (ADC) that delivers on functionality, performance, and ease of use. Based on the continuous time sigma-delta (CTSD) modulation scheme, the AD4134 removes the traditionally required switched capacitor circuitry sampling preceding the ?-? modulator, which leads to a relaxation of the ADC input driving requirement. The CTSD architecture also inherently rejects signals around the ADC aliasing frequency band, giving the device its inherent antialiasing capability, and removes the need for a complex external antialiasing filter. The AD4134 has four independent converter channels in parallel, each with a CTSD modulator and a digital decimation and filtering path. The AD4134 enables simultaneous sampling of four separate signal sources, each supporting a maximum input bandwidth of 391.5 kHz and achieving tight phase matching between these four signal measurements. The high level of channel integration, together with its simplified analog front-end requirement, enables the AD4134 to provide a high density multichannel data acquisition solution in a small form factor. The signal chain simplification property of the AD4134 also improves the system level performance through the reduction of noise, error, mismatch, and distortion that is normally introduced by the analog front-end circuitry. The AD4134 offers excellent dc and ac performance. The bandwidth of each ADC channel ranges from dc to 391.5 kHz, making the device an ideal candidate for universal precision data acquisition solutions supporting a breadth of sensor types, from temperature and pressure to vibration and shock. The AD4134 offers a large number of features and configuration options, giving the user the flexibility to achieve the optimal balance between bandwidth, noise, accuracy, and power for a given application. An integrated asynchronous sample rate converter (ASRC) allows the AD4134 to precisely control the decimation ratio and, in turn, the output data rate (ODR) using interpolation and resampling techniques. The AD4134 supports a wide range of ODR frequencies, from 0.01 kSPS to 1496 kSPS with less than 0.01 SPS adjustment resolution, allowing the user to granularly vary sampling speed to achieve coherent sampling. The ODR value can be controlled through the ODR_VAL_INT_? and ODR_VAL_FLT_? registers (Register 0?16 to Register 0?1C, ASRC master mode), or using an external clock source (ASRC slave mode). The ASRC slave mode operation enables synchronous sampling between multiple AD4134 devices to a single system clock. The ASRC simplifies the clock distribution requirement within a medium bandwidth data acquisition system because it no longer requires a high frequency, low jitter master clock from the digital back end to be routed to each ADC. The ASRC acts as a digital filter and decimates the oversampled data from the ?-? modulator to a lower rate to favor higher precision. The ADC data is then further processed by one of the AD4134 user-selectable digital filter profiles to further reject the out of band signals and noises, and reduce the data rate to the final desired ODR value. The AD4134 offers three main digital filter profile options: a wideband low ripple filter with a brick wall frequency profile and an ODR range from 2.5 kSPS to 374 kSPS that is suitable for frequency domain analysis, a fast responding sinc3 filter with an ODR range from 0.01 kSPS to 1496 kSPS that is suitable for low latency time domain analysis and low frequency high dynamic range input types, and a balanced sinc6 filter with an ODR range from 2.5 kSPS to 1.496 MSPS, offering optimal noise performance and response time. The AD4134 is also capable of performing on-board averaging between two or four of its input channels. The result is a near 3 dB, if two channels are combined, or 6 dB, if all four channels are combined, improvement in dynamic range while maintaining the bandwidth. The AD4134 supports two device configuration schemes: serial peripheral interface (SPI) and hardware pin configuration (pin control mode). The SPI control mode offers access to all the features and configuration options available on the AD4134. SPI control mode also enables access to the on-board diagnostic features designed to enable a robust system design. Pin control mode offers the benefit of simplifying the device configuration, enabling the device to operate autonomously after power-up operating in a standalone mode. In addition to the optional SPI, the AD4134 has a flexible and independent data interface for transmitting the ADC output data. The data interface can act as either a bus master or a slave with various clocking options to support multiple communication bus protocols. The data interface also supports daisy-chaining and an optional minimum input/output (I/O) mode designed to minimize the number of digital isolator channels required in isolated applications. The AD4134 has an operating ambient temperature range from -40?C to 105?C. The device is housed in an 8 mm ? 8 mm, 56-lead lead frame chip scale package (LFCSP).APPLICATIONSElectrical test and measurement Audio test 3-phase power quality analysis Control and hardware in loop verification Sonars Condition monitoring for predictive maintenance Acoustic and material science research and development

The AD4630-16 is a two-channel, simultaneous sampling, Easy Drive?, 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC). With a guaranteed maximum ?3 ppm integral nonlinearity (INL) and no missing codes at 16-bits, the AD4630-16 achieves excellent precision from ?40?C to +125?C. Figure 1 in the data sheet shows the functional architecture of the AD4630-16.A low-drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4630-16 offers a typical dynamic range of 97.4 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio is available and can reduce noise for low bandwidth signals, improving accuracy. The wide differential input and common-mode ranges allow inputs to use the full (?VREF range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4630-16. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. A wide data clocking window, multiple serial data output (SDO) lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode can relax the timing requirements and simplify the use of digital isolators.The ball grid array (BGA) package of the AD4630-16 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout.APPLICATIONS Automatic test equipment Digital control loops Medical instrumentation Seismology Semiconductor manufacturing Scientific instrumentation

The AD8479 is a difference amplifier with a very high inputcommon-mode voltage range. The AD8479 is a precision devicethat allows the user to accurately measure differential signals inthe presence of high common-mode voltages up to ?600 V.The AD8479 can replace costly isolation amplifiers in applicationsthat do not require galvanic isolation. The device operates overa ?600 V common-mode voltage range and has inputs that areprotected from common-mode or differential mode transientsup to ?600 V.The AD8479 has low offset voltage, low offset voltage drift, low gain drift, low common-mode rejection drift, and excellent common-mode rejection ratio (CMRR) over a wide frequency range.The AD8479 is available in a space-saving 8-lead SOIC package and is operational over the ?40?C to +125?C temperature range.Applications High voltage current sensing Battery cell voltage monitors Power supply current monitors Motor controls Isolation

The AD8556 is a zero-drift, sensor signal amplifier withdigitally programmable gain and output offset. Designed toeasily and accurately convert variable pressure sensor andstrain bridge outputsto a well-defined output voltage range,the AD8556 accurately amplifies many other differential orsingle-ended sensor outputs. The AD8556 uses the ADIpatented low noise auto-zero and DigiTrim? technologies tocreate an incredibly accurate and flexible signal processingsolution in a very compact footprint.Gain is digitally programmable in a wide range from 70 to1,280 through a serial data interface. Gain adjustment canbe fully simulated in-circuit and then permanently programmedwith reliable polyfuse technology. Output offsetvoltage is also digitally programmable and is ratiometric to thesupply voltage. AD8556 also features internal EMI filters on theVNEG, VPOS, FILT and VCLAMP pins.In addition to extremely low input offset voltage, low inputoffset voltage drift, and very high dc and ac CMRR, the AD8556 also includes a pull-up current source at the input pinsand a pull-down current source at the VCLAMP pin. Thisallows open wire and shorted wire fault detection. A low-passfilter function is implemented via a single low cost externalcapacitor. Output clamping set via an external reference voltageallows the AD8556 to drive lower voltage ADCs safely andaccurately.When used in conjunction with an ADC referenced to the samesupply, the system accuracy becomes immune to normal supplyvoltage variations. Output offset voltage can be adjusted with aresolution of better than 0.4% of the difference between VDDand VSS. A lockout trim after gain and offset adjustmentfurther ensures field reliability.The AD8556 is fully specified from ?40?C to +140?C.Operating from single-supply voltages of 2.7 V to 5.5 V, theAD8556 is offered in the 8-lead SOIC_N, and 4 mm ? 4 mm16-lead LFCSP_VQ.ApplicationsAutomotive SensorsPressure and Position SensorsPrecision Current SensingStrain Gages

The AD9081 mixed signal front end (MxFE?) is a highly integrated device with four 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores, and four 12-bit, 4 GSPS rate, RF analog-to-digital converter (ADC) cores. The AD9081 is well suited for applications requiring both wideband ADCs and DACs to process signal(s) that have wide instantaneous bandwidth. The device features eight transmit and eight receive lanes that support 24.75 Gbps/lane JESD204C or 15.5 Gbps/lane JESD204B standards. The device also has an on-chip clock multiplier, and a digital signal processing (DSP) capability targeted at either wideband or multiband direct to RF applications. The DSP datapaths can be bypassed to allow a direct connection between the converter cores and the JESD204 data transceiver port. The device also features low latency loopback and frequency hopping modes targeted at phase array radar system and electronic warfare applications. Two models for the AD9081 are offered. The 4D4AC model supports the full instantaneous channel bandwidth, whereas the 4D4AB model supports a maximum instantaneous bandwidth of 600 MHz per channel by automatically configuring the DSP to limit the instantaneous bandwidth at startup.APPLICATIONS Wireless communications infrastructure Microwave point-to-point, E-band and 5G mmWave Broadband communications systems DOCSIS 3.1 and 4.0 CMTS Phased array radar and electronic warfare Electronic test and measurement systems

The AD9094 is an 8-bit, 1 GSPS, quad analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. The device is designed to sample wide bandwidth analog signals up to 1.4 GHz. The AD9094 is optimized for wide input bandwidth, a high sampling rate, high works linearity, and low power in a small package. The quad-ADC cores feature multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs that support a variety of user-selectable input ranges. An integrated voltage reference facilitates design considerations. The analog inputs and clock signals are differential inputs. Users can configure each pair of intermediate frequency (IF) receiver outputs onto either one or two lanes of JESD204B Subclass 1 or Subclass 0, high speed, serialized outputs, depending on the sample rate and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, SYNCINB?AB, and SYNCINB?CD input pins. The AD9094 has flexible power-down options that allow significant power savings when desired. To program the power down options, use the 1.8 V capable, serial port interface (SPI). The AD9094 is available in a Pb-free, 72-lead, lead frame chip scale package (LFCSP) and is specified over a junction temperature range of ?40?C to +105?C. This product may be protected by one or more U.S. or international patents. Note that throughout the data sheet, multifunction pins, such as PDWN/STBY, are referred to either by the entire pin name or by a single function of the pin, for example, PDWN, when only that function is relevant. PRODUCT HIGHLIGHTS Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide, full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.APPLICATIONSLaser imaging, detection, and ranging (LIDAR)CommunicationsDigital oscilloscope (DSO)Ultrawideband satellite receiversInstrumentation

The AD9106 TxDAC? and waveform generator is a high performance, quad digital-to-analog converter (DAC) integrating on-chip pattern memory for complex waveform generation with a direct digital synthesizer (DDS). The DDS is a 12-bit output, up to 180 MHz master clock sinewave generator with a 24-bit tuning word allowing 10.8 Hz/LSB frequency resolution. The DDS has a single frequency output for all four DACs and independent programmable phase shift outputs for each of the four DACs.SRAM data can include directly generated stored waveforms, amplitude modulation patterns applied to DDS outputs, or DDS frequency tuning words.An internal pattern control state machine allows the user to program the pattern period for all four DACs as well as the start delay within the pattern period for the signal output on each DAC channel.Registers accessed using the serial peripheral interface (SPI) configure the digital waveform generator and load patterns into the SRAM.There are gain adjustment factors and offset adjustments applied to the digital signals on their way into the four DACs.The AD9106 offers exceptional ac and dc performance and supports DAC sampling rates up to 180 MSPS. The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9106 make it well suited for portable and low power applications.Applications Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD9114/AD9115/AD9116/AD9117 are pin-compatible dual, 8-/10-/12-/14-bit, low power digital-to-analog converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC? converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.The AD9114/AD9115/AD9116/AD9117 offer exceptional ac and dc performance and support update rates up to 125 MSPS.The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9114/AD9115/AD9116/AD9117 make them well suited for portable and low power applications.PRODUCT HIGHLIGHTS Low Power. DACs operate on a single 1.8 V to 3.3 V supply; total power consumption reduces to 225 mW at 100 MSPS. Sleep and power-down modes are provided for low power idle periods. CMOS Clock Input. High speed, single-ended CMOS clock input supports a 125 MSPS conversion rate. Easy Interfacing to Other Components. Adjustable output common mode from 0 V to 1.2 V allows for easy interfacing to other components that accept common-mode levels greater than 0 V.?APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD9121 is a dual, 14-bit, high dynamic range digital-to-analog converter (DAC) that provides a sample rate of 1230 MSPS, permitting multicarrier generation up to the Nyquist frequency.The AD9121 TxDAC+? includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL537x F-MOD series from Analog Devices, Inc. A 4-wire serial port interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 8.7 mA to 31.7 mA. The AD9121 comes in a 72-lead LFCSP.PRODUCT HIGHLIGHTS Ultralow noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies (IF). Proprietary DAC output switching technique enhances dynamic performance. Current outputs are easily configured for various single-ended or differential circuit topologies. Flexible LVDS digital interface allows the standard 28-wire bus to be reduced to one-half of the width.APPLICATIONS Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM, LTE Digital high or low IF synthesis Transmit diversity Wideband communications: LMDS/MMDS, point-to-point