The ADCMP580/ADCMP581/ADCMP582 are ultrafast voltagecomparators fabricated on the Analog Devices, Inc. proprietaryXFCB3 Silicon Germanium (SiGe) bipolar process. TheADCMP580 features CML output drivers, the ADCMP581features reduced swing ECL (negative ECL) output drivers, andthe ADCMP582 features reduced swing PECL (positive ECL)output drivers.All three comparators offer 180 ps propagation delay and 100 psminimum pulse width for 10 Gbps operation with 200 fs randomjitter (RJ). Overdrive and slew rate dispersion are typically lessthan 15 ps.The ?5 V power supplies enable a wide ?2 V to +3 V inputrange with logic levels referenced to the CML/NECL/PECLoutputs. The inputs have 50 ? on-chip termination resistorswith the optional capability to be left open (on an individualpin basis) for applications requiring high impedance input. The CML output stage is designed to directly drive 400 mV into50 ? transmission lines terminated to ground. The NECL outputstages are designed to directly drive 400 mV into 50 ? terminatedto ?2 V. The PECL output stages are designed to directly drive400 mV into 50 ? terminated to VCCO ? 2 V. High speed latchand programmable hysteresis are also provided. The differentiallatch input controls are also 50 ? terminated to an independentVTT pin to interface to either CML or ECL or to PECL logic.The ADCMP580/ADCMP581/ADCMP582 are available in a16-lead LFCSP.Applications Automatic test equipment (ATE) High speed instrumentation Pulse spectroscopy Medical imaging and diagnostics High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Clock and data signal restoration

The ADCMP600, ADCMP601, and ADCMP602 are very fast comparators fabricated on Analog Devices? proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from ? 0.5 V to VCC + 0.2 V, low noise TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.The devices offer 5 ns propagation delay with 10 mV overdrive on 3 mA typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.5 V to +2.8 V input signal range up to a +5.5 V positive supply with a ?0.5 V to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions on the ADCMP602 support a wide input signal range while still allowing independent output swing control and power savings.The TTL-/CMOS-compatible output stage is designed to drive up to 5 pF with full timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided with a unique single-pin control option.The ADCMP600 is available in both 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in 8-lead MSOP and LSCFP packages.Applications High Speed Instrumentation Clock and Data Signal Restoration Logic Level Shifting or Translation Pulse Spectroscopy High Speed Line Receivers Threshold Detection Peak and Zero-crossing Detectors High Speed Trigger Circuitry Pulse-width Modulators Current-/voltage-controlled Oscillators Automatic Test Equipment (ATE)

The ADCMP600, ADCMP601, and ADCMP602 are very fast comparators fabricated on Analog Devices? proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from ? 0.5 V to VCC + 0.2 V, low noise TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.The devices offer 5 ns propagation delay with 10 mV overdrive on 3 mA typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.5 V to +2.8 V input signal range up to a +5.5 V positive supply with a ?0.5 V to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions on the ADCMP602 support a wide input signal range while still allowing independent output swing control and power savings.The TTL-/CMOS-compatible output stage is designed to drive up to 5 pF with full timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided with a unique single-pin control option.The ADCMP600 is available in both 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in 8-lead MSOP and LSCFP packages.Applications High Speed Instrumentation Clock and Data Signal Restoration Logic Level Shifting or Translation Pulse Spectroscopy High Speed Line Receivers Threshold Detection Peak and Zero-crossing Detectors High Speed Trigger Circuitry Pulse-width Modulators Current-/voltage-controlled Oscillators Automatic Test Equipment (ATE)

The ADCMP604 / ADCMP605?are very fast comparators fabricated on the Analog Devices, Inc. proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE ? 0.5 V to VCCI + 0.2 V, low noise, LVDS-compatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shut-down inputs.The devices offer 1.5 ns propagation delays with 1 ps rms random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps.A flexible power supply scheme allows the devices to operate with a single 2.5 V positive supply and a ?0.5 V to +2.7 V input signal range up to a 5.5 V positive supply with a ?0.5 V to +5.7 V input signal range. Split input/output supplies, with no sequencing restrictions on the ADCMP605, support a wide input signal range with greatly reduced power consumption.The LVDS-compatible output stage is designed to drive any standard LVDS input. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option.The ADCMP604 is available in a 6-lead SC70 package, and the ADCMP605 is available in a 12-lead LFCSP.APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE)

The ADE12011 is a single channel, configurable, isolated?digital input monitoring solution for energy transmission and?distribution applications. The ADE1201 is configured through?the serial port interface (SPI) to perform an isolated measurement?of the digital input that is also called binary input or contact?input. The ADE1201 digital output signal on the DOUT1 pin?reflects the state of the input signal after user configurable?signal conditioning. The SPI protocol supports addressing to?allow up to eight devices sharing one 4-wire SPI port.The ADE1201 application circuit accepts a wide range of input?voltages from ?10 V dc to ?300 V dc, or 8 V rms to 240 V rms.?The programmable wetting current and robust application?circuit enable the device to meet stringent, system level?electromagnetic capability (EMC) requirements.The ADE1201 includes an isoPower? integrated, isolated dc-to-dc?converter that eliminates the need for an external isolated power?supply. The iCoupler? chip scale transformer technology is?used to isolate the logic signals between the high voltage,?isolated side and the low voltage, nonisolated side of the?digital input monitor. This technology creates a small form?factor design that includes data and power isolation.An integrated successive approximation register (SAR)?analog-to-digital converter (ADC) and a programmable gain?amplifier (PGA) from 1? to 10? measure the analog inputs.?The ADC waveforms are available through the SPI port to?allow system level diagnostics.Product Highlights Single channel, configurable, isolated digital input. Single hardware design supports 24 V to 300 V systems. Robust architecture. Enables system level diagnostics.Applications Energy transmission and distribution Multifunction relay protection Substation battery monitoring Bay or substation interlocking Merge unit Circuit breaker status indication Remote terminal unit Building automation1 Protected by U.S. Patent Number 2017/0250043. Other patents pending.

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