The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1192 is an integrated current sense amplifier that offers digital current and voltage monitoring via an on-chip, 12-bit analog-to-digital converter (ADC), communicated through an I2C interface.An internal current sense amplifier senses voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.A 12-bit ADC can measure the current seen in the sense resistor and in the supply voltage on the VCC pin. An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on the way the ADR pin is connected.A SETV pin is also included. A voltage applied to this pin is internally compared to the output voltage on the current sense amplifier. The output of the SETV comparator asserts when the current sense amplifier output exceeds the SETV voltage. This event is detected at the ALERT block. The ALERT block then charges up the external TIMER capacitor with a fixed current. When this timing cycle is complete, the ALERT output asserts.The ALERT output can be used as a flag to warn a micro-controller or field programmable gate array (FPGA) of an overcurrent condition. ALERT outputs of multiple ADM1192 devices can be tied together and used as a combined alert.A basic P-channel FET hot swap circuit can be implemented with the ALERT output. The value of the TIMER capacitor should be set so that the charging time of this capacitor is much longer than the period where a higher than nominal inrush current may be flowing.The ADM1192 is packaged in a 10-lead MSOP.APPLICATIONS Power monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

The ADM1293 and ADM1294 are high accuracy integrated digital power monitors that offer digital current, voltage, and power monitoring using an on-chip, 12-bit analog-to-digital converter (ADC), communicated through a PMBus? compliant I2C interface.These devices acquire the current by measuring the voltage difference across the external sense resistor. This voltage is amplified and digitized by an internal 12-bit ADC. The same ADC can also sample the primary input voltage and an auxiliary input voltage. The internal digital block can perform multiplication of the current and primary input voltage for power calculation. The ADM1293/ADM1294 also feature a power accumulator for energy metering. An industry-standard PMBus interface allows a master controller to read back these data from the device. The master controller can then combine this information with a known sense resistor value to calculate the current, voltage, power, and energy consumption over time on the monitored rail.In conditions such as overcurrent, overvoltage, undervoltage, and overpower, the ADM1293/ADM1294 devices can generate an interrupt signal to the microprocessor through the GPOx/ALERTx outputs. The threshold for these conditions is digitally programmed via PMBus.The ADM1293 is designed for high-side supply monitoring with a voltage monitoring range from 0 V to 20 V. The ADM1294 is designed for low-side supply monitoring. Its integrated shunt regulator allows it to be powered and to monitor supply in wide voltage ranges.The ADM1293/ADM1294 are available in 4 mm ? 4 mm 16-lead LFCSP and 14-lead TSSOP packages with a specified operating ambient temperature range from ?40?C to +105?C for the ADM1293 and an operating junction temperature range from ?40?C to +105?C for the ADM1294.Applications Power monitoring/power budgeting Central office equipment Telecommunications and data communications equipment PCs/servers

The ADM2461E/ADM2463E are 500 kbps, 5.7 kV rms, signal isolated RS-485 transceivers that pass radiated emissions testing to the EN55032 Class B standard with margin on a 2-layer printed circuit board (PCB). The ADM2461E/ADM2463E isolation barrier provides robust immunity to noise and system level EMC events. The devices are protected against ??12 kV contact and ? ?15 kV air IEC61000-4-2 electrostatic discharge (ESD) events on the RS-485 A, B, Y, and Z pins. The devices feature cable invert pins to allow quick correction of the reversed cable connection on the A, B, Y, and Z bus pins while maintaining full receiver fail-safe performance.?These devices are optimized for low speed over long cable runs and have a maximum data rate of 500 kbps. The high differential output voltage makes these devices suitable for Profibus nodes when powered with 5 V on the VDD2 supply. The VDD1 primary supply and VDD2 isolated supply both support a wide range of voltages (1.7 V to 5.5 V and 3 V to 5.5 V, respectively). Half-duplex and full duplex device options are available in the industry standard 16-lead, wide-body, standard SOIC_W package with >8.0 mm creepage and clearance.?Applications Heating, ventilation, and air conditioning (HVAC) networks Industrial field buses Building automation Utility networks

The ADM2484E is an isolated data transceiver with ?15 kVESD protection suitable for high speed, half- or full-duplex communication on multipoint transmission lines. For half-duplex operation, the transmitter outputs and receiver inputs share the same transmission line. Transmitter Output Pin Y links externally to Receiver Input Pin A, and Transmitter Output Pin Z links externally to Receiver Input Pin B.Designed for balanced transmission lines, the ADM2484Ecomplies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E). The device employs Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package.The differential transmitter outputs and receiver inputs featureelectrostatic discharge circuitry that provides protection up to ?15 kV using the human body model (HBM). The logic side of the device can be powered with either a 5 V or a 3.3 V supply, whereas the bus side requires an isolated 3.3 V supply.The device has current-limiting and thermal shutdown featuresto protect against output short circuits and situations where buscontention causes excessive power dissipation.Applications Isolated RS-485/RS-422 interfaces Industrial field networks INTERBUS Multipoint data transmission systems

Demonstration circuit 1852A is a combined step-up and step-down DC/DC converter, using the LTC3536 monolithic synchronous buck-boost regulator in the MSOP package. The DC1852A has wide input voltage range of 1.8V to 5.5V and is capable of delivering up to 1A of output current. The output voltage of the DC1852A can be set as low as 1.8V and can go as high as 5.5V. DC1852A supports two operation modes: fixed-frequency pulse-width modulation (PWM) and Burst Mode® operation.

The LTM4649 is a complete 10A high efficiency switching mode step-down DC/DC ?Module? regulator in a 9mm ? 15mm ? 4.92 BGA package. Included in the package are the switching controller, power FETs, inductor, and all support components. Operating over an input voltage range of 4.5V to 16V, the LTM4649 supports an output voltage range of 0.6V to 3.3V, set by a single external resistor. This high efficiency design delivers 10A continuous current. Only bulk input and output capacitors are needed.High switching frequency and a current mode architecture enable a very fast transient response to line and load changes without sacrificing stability. The device supports frequency synchronization, programmable multiphase operation, and output voltage tracking for supply rail sequencing.Fault protection features include output overvoltage and overcurrent protection. The LTM4649 is offered in a small 9mm ? 15mm ? 4.92mm BGA package available with SnPb or RoHS compliant terminal finish.Applications Telecom, Networking and Industrial Equipment Point of Load Regulation

The LTC3621/LTC3621-2 is a high efficiency 17V, 1A synchronous monolithic step-down regulator. The switching frequency is fixed to 1MHz or 2.25MHz with a ?40% synchronizing range. The regulator features ultralow quiescent current and high efficiencies over a wide VOUT range.The step-down regulator operates from an input voltage range of 2.7V to 17V and provides an adjustable output range from 0.6V to VIN while delivering up to 1A of output current. A user-selectable mode input is provided to allow the user to trade off ripple noise for light load efficiency; Burst Mode operation provides the highest efficiency at light loads, while pulse-skipping mode provides the lowest voltage ripple. The MODE pin can also be used to allow the user to sync the switching frequency to an external clock. LTC3621 Options Part Name Frequency VOUT LTC3621 1.00MHz Adjustable LTC3621-3.3 1.00MHz 3.3V LTC3621-5 1.00MHz 5V LTC3621-2 2.25MHz Adjustable LTC3621-23.3 2.25MHz 3.3 LTC3621-25 2.25MHz 5V APPLICATIONS Portable-Handheld Scanners Industrial and Embedded Computing Automotive Applications Emergency Radio

DC187A-A: Demo Board for the LT1374 4.5A, 500kHz Step-Down Switching Regulator.

The LTM9011-14/LTM9010-14/LTM9009-14 are 8-channel, simultaneous sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. AC performance includes 73.1dB SNR and 88dB spurious free dynamic range (SFDR). Low power consumption per channel reduces heat in high channel count applications. Integrated bypass capacitance and flow-through pinout reduces overall board space requirements.DC specs include ?1LSB INL (typ), ?0.3LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode).The ENC+ and ENC? inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing