The ADM8611 /?ADM8612?/?ADM8613?/?ADM8614?/?ADM8615?are voltage supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. Apart from providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external push-button through a manual reset input.The ultralow power consumption of these devices makes them suitable for power efficiency sensitive systems, such as battery-powered portable devices and energy meters.The features of each member of the device family are shown in Table 9 in the data sheet. Each device subdivides into submodels with differences in factory preset voltage monitoring threshold options. In the range of 2 V to 4.63 V, 10 options are available for the ADM8611. In the range of 2.32 V to 4.63 V, five options are available for both the ADM8613 and ADM8614. A separate supply input allows the ADM8612 and ADM8615 to monitor 20 different low voltage levels from 0.5 V to 1.9 V. Not all device options are available as standard models.The ADM8611, ADM8612, ADM8613, and ADM8615 can reset on demand through the manual reset input. The watchdog function on the ADM8613, ADM8614, and ADM8615 monitors the heartbeat of the microprocessor through the WDI pin. The ADM8613 and ADM8614 have a watchdog disable input, which allows the user to disable the watchdog function, if required. The ADM8614 also has a watchdog timeout extension input, allowing the watchdog timeout to be extended from 1.6 sec to 100 sec.The ADM8611/ADM8612/ADM8613/ADM8614/ADM8615 are available in a 6-ball, 1.46 mm ? 0.96 mm WLCSP. These devices are specified over the temperature range of ?40?C to +85?C.??APPLICATIONS Portable/battery-operated equipment Microprocessor systems Energy metering Energy harvesting

The ADCMP600, ADCMP601, and ADCMP602 are very fast comparators fabricated on Analog Devices? proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from ? 0.5 V to VCC + 0.2 V, low noise TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.The devices offer 5 ns propagation delay with 10 mV overdrive on 3 mA typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.5 V to +2.8 V input signal range up to a +5.5 V positive supply with a ?0.5 V to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions on the ADCMP602 support a wide input signal range while still allowing independent output swing control and power savings.The TTL-/CMOS-compatible output stage is designed to drive up to 5 pF with full timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided with a unique single-pin control option.The ADCMP600 is available in both 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in 8-lead MSOP and LSCFP packages.ApplicationsHigh Speed InstrumentationClock and Data Signal RestorationLogic Level Shifting or TranslationPulse SpectroscopyHigh Speed Line ReceiversThreshold DetectionPeak and Zero-crossing DetectorsHigh Speed Trigger CircuitryPulse-width ModulatorsCurrent-/voltage-controlled OscillatorsAutomatic Test Equipment (ATE)

The ADM8611/ADM8612/ADM8613/ADM8614/ADM8615?are voltage supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. Apart from providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external push-button through a manual reset input.The ultralow power consumption of these devices makes them suitable for power efficiency sensitive systems, such as battery-powered portable devices and energy meters.The features of each member of the device family are shown in Table 9 in the data sheet. Each device subdivides into submodels with differences in factory preset voltage monitoring threshold options. In the range of 2 V to 4.63 V, 10 options are available for the ADM8611. In the range of 2.32 V to 4.63 V, five options are available for both the ADM8613 and ADM8614. A separate supply input allows the ADM8612 and ADM8615 to monitor 20 different low voltage levels from 0.5 V to 1.9 V. Not all device options are available as standard models.The ADM8611, ADM8612, ADM8613, and ADM8615 can reset on demand through the manual reset input. The watchdog function on the ADM8613, ADM8614, and ADM8615 monitors the heartbeat of the microprocessor through the WDI pin. The ADM8613 and ADM8614 have a watchdog disable input, which allows the user to disable the watchdog function, if required. The ADM8614 also has a watchdog timeout extension input, allowing the watchdog timeout to be extended from 1.6 sec to 100 sec.The ADM8611/ADM8612/ADM8613/ADM8614/ADM8615 are available in a 6-ball, 1.46 mm ? 0.96 mm WLCSP. These devices are specified over the temperature range of ?40?C to +85?C.??Applications Portable/battery-operated equipment Microprocessor systems Energy metering Energy harvesting

The AD6684 is a 135 MHz bandwidth, quad intermediate frequency (IF) receiver. It consists of four 14-bit, 500 MSPS ADCs and various digital processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed to support communications applications. The analog full power bandwidth of the device is 1.4 GHz.?The quad ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The AD6684 is optimized for wide input bandwidth, excellent linearity, and low power in a small package.?The analog inputs and clock signal input are differential. Each pair of ADC data outputs are internally connected to two DDCs through a crossbar mux. Each DDC consists of up to five cascaded signal processing stages: a 48-bit frequency translator, NCO, and up to four half-band decimation filters.?Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6684 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining a 9-bit output resolution.?Each ADC output is also connected internally to a VDR block. This optional mode allows full dynamic range for defined input signals. Inputs that are within a defined mask (based on DPD applications) are passed unaltered. Inputs that violate this defined mask result in the reduction of the output resolution.?With VDR, the dynamic range of the observation receiver is determined by a defined input frequency mask. For signals falling within the mask, the outputs are presented at the maximum resolution allowed. For signals exceeding defined power levels within this frequency mask, the output resolution is truncated. This mask is based on DPD applications andsupports tunable real IF sampling, and zero IF or complex IF receive architectures.?Operation of the AD6684 in the DDC, NSR, and VDR modes is selectable via SPI-programmable profiles (the default mode is NSR at startup).In addition to the DDC blocks, the AD6684 has several functions that simplify the AGC function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.?Users can configure each pair of IF receiver outputs onto either one or two lanes of Subclass 1 JESD204B-based high speed serialized outputs, depending on the decimation ratio and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, SYNCINB?AB, and SYNCINB?CD input pins.?The AD6684 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using the 1.8 V capable, 3-wire SPI.?The AD6684 is available in a Pb-free, 72-lead LFCSP and is specified over the ?40?C to +105?C junction temperature range. Product Highlights Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.Applications Communications Diversity multiband, multimode digital receivers?3G/4G, W-CDMA, GSM, LTE, LTE-A HFC digital reverse path receivers Digital predistortion observation paths General-purpose software radios

DC1699A-A: Demo Board for the LT6108 High Side Current Sense Amplifier with Reference and Comparator.

The ADP1882?/ ADP1883 are versatile current-mode, synchronous step-down controllers that provide superior transient response, optimal stability, and current-limit protection by using a constant on-time, pseudo-fixed frequency with a programmable current-limit, current-control scheme. In addition, these devices offer optimum performance at low duty cycles by using valley current-mode control architecture. This allows the ADP1882 / ADP1883 to drive all N-channel power stages to regulate output voltages as low as 0.8 V.The ADP1883 is the power saving mode (PSM) version of the device and is capable of pulse skipping to maintain output regulation while achieving improved system efficiency at light loads (see the Power Saving Mode (PSM) Version (ADP1883) section for more information).Available in three frequency options (300 kHz, 600 kHz, and 1.0 MHz, plus the PSM option), the ADP1882/ADP1883 are well suited for a wide range of applications. These ICs not only operate from a 2.75 V to 5.5 V bias supply, but they also can accept a power input as high as 20 V.In addition, an internally fixed soft start period is included to limit input in-rush current from the input supply during startup and to provide reverse current protection during soft start for a pre-charged output. The low-side current-sense, current-gain scheme and integration of a boost diode, along with the PSM/forced pulse-width modulation (PWM) option, reduce the external part count and improve efficiency.The ADP1882 / ADP1883 operate over the -40?C to +125?C junction temperature range and are available in a 10-lead MSOP.

The ADT74701 controller is a multichannel temperature sensor and PWM fan controller and fan speed monitor for systems requiring active cooling. It is designed to interface directly to an I2C? bus. The ADT7470 can monitor up to 10 daisy-chained TMP05?temperature sensors. It can also monitor and control the speed of four fans, in automatic or in manual control loops.A FULL_SPEED input is provided to allow the fans to be blasted to maximum speed, via external hardware control, under extreme thermal conditions or on system startup. An SMBALERT interrupt communicates error conditions such as fan under speed and over temperature measurements to the system service processor. Individual error conditions can then be read from status registers over the I2C bus.APPLICATIONS Servers Networking and telecommunications equipment Desktops

The ADMV1012 is a compact, gallium arsenide (GaAs) design, monolithic microwave integrated circuit (MMIC) double sideband (DSB) downconverter in a RoHS compliant package optimized for point to point microwave radio designs that operate in the 17.5 GHz to 24 GHz input frequency range. The ADMV1012 provides 15 dB of conversion gain with 25 dB of image rejection, and 2.5 dB noise figure. The ADMV1012 uses a radio frequency (RF) low noise amplifier (LNA) followed by an in phase/quadrature (I/Q), double balanced mixer, where a driver amplifier drives the local oscillator (LO) with a ?2 multiplier. IF1 and IF2 mixer quadrature outputs are provided, and an external 90? hybrid is required to select the required sideband.The I/Q mixer topology reduces the need for filtering of unwanted sideband. The ADMV1012 is a much smaller alternative to hybrid style DSB downconverter assemblies and eliminates the need for wire bonding by allowing the use of surface-mount manufacturing assemblies.The ADMV1012 downconverter comes in a compact, thermally enhanced, 4.9 mm ? 4.9 mm, 32-terminal LCC. The ADMV1012 operates over the ?40?C to +85?C temperature range.Applications Point to point microwave radios Radars and electronic warfare systems Instrumentation, automatic test equipment (ATE)Satellite communications

The LTC2995 is a high accuracy temperature sensor and dual supply monitor. It converts the temperature of an external diode sensor and/or its own die temperature to an analog output voltage while rejecting errors due to noise and series resistance. Two supply voltages and the measured temperature are compared against upper and lower limits set with resistive dividers. If a threshold is exceeded, the device communicates an alert by pulling low the correspondent open drain logic output.The LTC2995 gives ?1?C accurate temperature results using commonly available NPN or PNP transistors or temperature diodes built into modern digital devices. Voltages are monitored with 1.5% accuracy. A 1.8V reference output simplifies threshold programming and can be used as an ADC reference input.The LTC2995 provides an accurate, low power solution for temperature and voltage monitoring in a compact 3mm ? 3mm QFN package.Applications Network Servers Core, I/O Voltage Monitors Desktop and Notebook Computers Environmental Monitoring

The receive path consists of two independent, wide bandwidth (BW), direct conversion receivers with state-of-the-art dynamic range. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. RF front-end control and several auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) for the power amplifier (PA) are also integrated.In addition to automatic gain control (AGC), the ADRV9008-1 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time, sigma-delta (?-?) ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing relaxes the requirements of the RF filters compared to traditional intermediate frequency (IF) receivers.The fully integrated phase-locked loop (PLL) provides high per-formance, low power, fractional-N, RF synthesis for the receiver signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multi-chip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9008-1 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9008-1 can be powered directly from 1.3 V and 1.8 V regulators and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to mini-mize power consumption during normal use. The ADRV9008-1 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G FDD, macrocell base stations Wide band active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment