The LTC2382-16 is a low noise, low power, high speed 16-bit successive approximation register (SAR) ADC. Operating from a 2.5V supply, the LTC2382-16 has a ?2.5V fully differential input range. The LTC2382-16 consumes only 6.5mW and achieves ?2LSB INL max, no missing codes at 16-bits and 92dB SNR. The LTC2382-16 has a high speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring a daisychain mode. The fast 500ksps throughput with no cycle latency makes the LTC2382-16 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2382-16 automatically powers down between conversions, leading to reduced power dissipation that scales with the sampling rate. The LTC2382-16 features a proprietary sampling architecture that enables the ADC to begin acquiring the next sample during the current conversion. The resulting extended acquisition time of 1.25?s allows the use of extremely low power ADC drivers.Applications Medical Imaging High Speed Data Acquisition Portable or Compact Instrumentation Industrial Process Control Low Power Battery-Operated Instrumentation ATE?

Demonstration circuit 1576 is high efficiency non-isolated SEPIC (Single Ended Primary Inductor Converter) converter featuring the LTC3805-5 switching controller. The DC1576 converts a 5V to 30V input to 12V at 3A of output current. The DC1576 can be easily modified to generate output voltages in the range from 0.8V to 48V.

DC1582B-B: Demo Board for the LTC3108-1 Ultralow Voltage Step-Up Converter and Power Manager.

Demonstration circuit 1587A is a boost converter optimized for relatively high impedance, very low voltage input power sources. It allows a user to quickly evaluate the LTC3105 boost converter and LDO regulator. Capable of operating with an input voltage as low as 250mV and as high as 5V, the circuit features maximum power point control (MPPC). Jumpers on the circuit board allow the user to select several MPPC voltages, three boost output voltages and three LDO regulator output voltages. Also included are jumpers for shutdown and for selecting an external pull-up voltage for the power good status output. Terminals are provided for input and output connections, power good output and external power good supply input, shutdown input, and provisions for external MPPC resistor and MPPC diode input. This demonstration board is especially designed for low power solar cell applications.

Demonstration circuit 1590B is a dual output synchronous buck converter featuring the LTC3880EUJ, a dual output peak current mode controller with digital power system management. There are two versions of the board available: DC1590B-A senses the output current across a sense resistor and has a default switching frequency of 350kHz, and DC1590B-B senses output current with the inductor DCR and has a default switching frequency of 425kHz. Either version can be populated with the LTC3880EUJ-1 (which allows the user to provide bias power to the IC from an external power supply) instead of the LTC3880EUJ. These boards provide two programmable outputs of 20A each. The factory default settings are 1.8V for each output.

DC1593A-A: Demo Board for the LTC2635-12 Quad 12-Bit I2C VOUT DACs with 10ppm/°C Reference.

The LTC4219 is an integrated solution for Hot Swap applications that allows a board to be safely inserted and removed from a live backplane. The part integrates a Hot Swap controller, power MOSFET and current sense resistor in a single package for small form factor applications. The LTC4219 provides separate inrush current control and a 10% accurate 5.6A current limit with foldback current limiting. The current limit threshold can be adjusted dynamically using an external pin. Additional features include a current monitor output that amplifies the sense resistor voltage for ground referenced current sensing and a MOSFET temperature monitor output. Thermal limit and power good monitoring are also provided. The power good detection level and foldback current limit profile are internally preset for 5V (LTC4219-5) and 12V (LTC4219-12) applications.Applications RAID Systems Server I/O Cards Industrial

The AD9576 provides a multiple output clock generator function comprising two dedicated phase-locked loop (PLL) cores with flexible frequency translation capability, optimized to serve as a robust source of asynchronous clocks for an entire system, providing extended operating life within frequency tolerance through monitoring of and automatic switchover between redundant crystal (XTAL) inputs with minimized switching, induced transients. The fractional-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequency synthesizers to maximize network performance, whereas the integer-N PLL provides general-purpose clocks for use as CPU and field-programmable gate array (FPGA) reference clocks.The AD9576 uses pin strapping to select among a multitude of power-on ready configurations for its 11 output clocks, which require only the connection of external pull-up or pull-down resistors to the appropriate pin program reader pins (PPRx). These pins provide control of the internal dividers for establishing the desired frequency translations, clock output functionality, and input reference functionality. These parameters can also be manually configured through a serial port interface (SPI).The AD9576 is packaged in a 64-lead, 9 mm ? 9 mm LFCSP, requiring only a single 2.5 V or 3.3 V supply. The operating temperature range is ?40?C to +85?C.Each OUTx output is differential and contains two pins: OUTx and OUTx. For simplicity, the term OUTx refers to the functional output block containing these two pins..Applications Ethernet line cards, switches, and routers Baseband units SATA and PCI express Low jitter, low phase noise clock generation Asynchronous clock generation

The AD9625 is a 12-bit monolithic sampling analog-to-digital converter (ADC) that operates at conversion rates of up to 2.6 giga samples per second (GSPS). This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9625 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/antijamming measures.The analog input, clock, and SYSREF? signals are differential inputs. The JESD204B-based high speed serialized output is configurable in a variety of one-, two-, four-, six-, or eight-lane configurations. The product is specified over the industrial temperature range of ?40?C to +85?C.PRODUCT HIGHLIGHTS High performance: exceptional SFDR in high sample rate applications, direct RF sampling, and on-chip reference. Flexible digital data output formats based on the JESD204B specification. Control path SPI interface port that supports various product features and functions, such as data formatting, gain, and offset calibration values.APPLICATIONS Spectrum analyzers Military communications Radar High performance digital storage oscilloscopes Active jamming/antijamming Electronic surveillance and countermeasures

The AD9629 is a monolithic, single channel 1.8 V supply, 12-bit, 20 MSPS/40 MSPS/65MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input with optional 1, 2, or 4 divide ratios controls all internal conversion cycles.The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported.The AD9629 is available in a 32-lead RoHS compliant LFCSP and is specified over the industrial temperature range (?40?C to +85?C).Applications Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA Smart antenna systems Battery-powered instruments Hand held scope meters Portable medical imaging Ultrasound Radar/LIDAR PET/SPECT imagingProduct Highlights1. The AD9629 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.2. The sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.3. A standard serial port interface (SPI) supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO and data output (D11 to D0) timing and offset adjustments, and voltage reference modes.4. The AD9629 is packaged in a 32-lead RoHS compliant LFCSP that is pin compatible with the AD9609 10-bit ADC and the AD9649 14-bit ADC, enabling a simple migration path between 10-bit and 14-bit converters sampling from 20 MSPS to 80 MSPS.