The HMC911 is a broadband time delay with 62 ps to 75 pscontinuously adjustable delay range to 24 GHz. The delay controlis linearly monotonic with respect to the differential delay controlvoltage (VDCP and VDCN), and the control input has a modulationbandwidth of 1.6 Hz. The HMC911 provides a differentialoutput voltage with constant amplitude for single-ended ordifferential input voltages above the input sensitivity level, andthe output voltage swing can be adjusted using the VAC control pin.The HMC911 features internal temperature compensation andbias circuitry to minimize delay variations with temperature. AllRF inputs and outputs of the HMC911 are internally terminatedwith 50 ? to VCC and can be ac-coupled or dc-coupled. Outputpins connect directly to a 50 ? to VCC terminated system.However, use dc blocking capacitors if the terminated systeminput is 50 ? to a dc voltage other than VCC.The HMC911 is available in a RoHS-compliant, 24-terminal,ceramic, leadless chip carrier. Applications Synchronization of clock and data Transponder design Serial data transmissions up to 32 Gbps Broadband test and measurement RF ATE applications

The ADG1421 / ADG1422?/ ADG1423?contain two independent single-pole/single-throw (SPST) switches. The ADG1421 and ADG1422 differ only in that the digital control logic is inverted. The ADG1421 switches are turned on with Logic 1 on the appropriate control input, and Logic 0 is required for the ADG1422. The ADG1423 has one switch with digital control logic similar to that of the ADG1421; the logic is inverted on the other switch. The ADG1423 exhibits break-before-make switching action for use in multiplexer applications. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.The iCMOS? (industrial CMOS) modular manufacturing process combines high voltage, complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has achieved. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size.The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. The iCMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments.PRODUCT HIGHLIGHTS 2.4 ? maximum on resistance at 25?C. Minimum distortion. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. 10-lead MSOP and 10-lead, 3 mm ? 3 mm LFCSP packages.APPLICATIONS Automatic test equipment Data acquisition systems Relay replacements Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

The AD1938 is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with input and eight digital-to-analog converters (DACs) with single-ended output using the Analog Devices, Inc., patented multibit sigma-delta (?-?) architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters.The AD1938 operates from 3.3 V digital and analog supplies. The AD1938 is available in a 48-lead (single-ended output) LQFP package. Other members of this family include a differential DAC output and I2C? control port version.The AD1938 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR clock or from an external crystal, the AD1938 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The DACs and ADCs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 3.3 V supplies, power consumption is minimized, further reducing emissions.APPLICATIONS Automotive audio systems Home Theater Systems Set-top boxes Digital audio effects processors

The AD4003/AD4007/AD4011 are high accuracy, high speed, low power, 18-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4003/AD4007/AD4011 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD4030-24 is a 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC) with Easy Drive?. With a guaranteed maximum ?0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24 achieves unparalleled precision from ?40?C to +125?C. Figure 1 in the data sheet shows the functional architecture of the AD4030-24.A low-drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4030-24 offers a typical dynamic range of 109 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio can increase dynamic range up to 155.5 dB. The wide differential input and common mode ranges allow inputs to use the full ?VREF range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4030-24. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. A wide data clocking window, multiple SDO lanes, and optional DDR data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode and ADC host clock mode relax the timing requirements and simplify the use of digital isolators.The BGA package of the AD4030-24 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout.APPLICATIONS Automatic test equipment Digital control loops Medical instrumentation Seismology Semiconductor manufacturing Scientific instrumentation

The AD4112 is a low power, low noise, 24-bit, sigma-delta (?-?) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for fully differential or single-ended, high impedance (?1 M?) bipolar, ?10 V voltage inputs, and 0 mA to 20 mA current inputs.The AD4112 also integrates key analog and digital signal conditioning blocks to configure eight individual setups for each analog input channel in use. The AD4112 features a maximum channel scan rate of 6.21 kSPS (161 ?s) for fully settled data.The embedded 2.5 V, low drift (5 ppm/?C), band gap internal reference (with output reference buffer) reduces the external component count.The digital filter allows flexible settings, including simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can select between the different filter settings depending on the demands of each channel in the application. The automatic channel sequencer enables the ADC to switch through each enabled channel.The precision performance of the AD4112 is achieved by integrating the proprietary iPassives? technology from Analog Devices, Inc. The AD4112 is factory calibrated to achieve a high degree of specified accuracy.The AD4112 operates with a single power supply, making it easy to use in galvanically isolated applications. The specified operating temperature range is ?40?C to +105?C. The AD4112 is housed in a 40-lead, 6 mm ? 6 mm LFCSP package.APPLICATIONS Process control PLC and DCS modules Instrumentation and measurement

The AD4114 is a low power, low noise, 24-bit, sigma-delta (?-?) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for eight fully differential or 16 single-ended, high impedance (?1 M?), bipolar, ?10 V voltage inputs.The AD4114 integrates key analog and digital signal conditioning blocks to configure eight individual setups for each analog input channel in use. The AD4114 features a maximum channel scan rate of 6.21 kSPS (161 ?s) for fully settled data.The embedded 2.5 V, low drift (?5 ppm/?C), band gap internal reference (with output reference buffer) reduces the external component count.The digital filter allows flexible settings, including simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can select different filter settings depending on the requirements of each channel in the application. The automatic channel sequencer enables the ADC to switch through each enabled channel.The precision performance of the AD4114 is achieved by integrating the proprietary iPassives? technology from Analog Devices, Inc. The AD4114 is factory calibrated to achieve a high degree of specified accuracy.The AD4114 operates with a single power supply that allows simplified use in galvanically isolated applications. The specified operating temperature range is ?40?C to +105?C. The AD4114 is housed in a 40-lead, 6 mm ? 6 mm LFCSP.ApplicationsProgrammable logic controller (PLC) and distributed control system (DCS) modules Instrumentation and measurement

The AD4115 is a low power, low noise, 24-bit, sigma-delta (?-?) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for eight fully differential or 16 single-ended, high impedance (?1 M?), bipolar, ?10 V voltage inputs. The AD4115 integrates key analog and digital signal conditioning blocks to configure eight individual setups for each analog input channel in use. The AD4115 features a maximum channel scan rate of 24,845 kSPS (40.25 ?s) for fully settled data. The embedded 2.5 V, low drift (?5 ppm/?C), band gap internal reference (with output reference buffer) reduces the external component count. The digital filter allows flexible settings, including simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can select different filter settings depending on the requirements of each channel in the application. The automatic channel sequencer enables the ADC to switch through each enabled channel. The precision performance of the AD4115 is achieved by integrating the proprietary iPassives? technology from Analog Devices, Inc. The AD4115 is factory calibrated to achieve a high degree of specified accuracy. The AD4115 operates with a single power supply that allows simplified use in galvanically isolated applications. The specified operating temperature range is ?40?C to +105?C. The AD4115 is housed in a 40-lead, 6 mm ? 6 mm LFCSP. APPLICATIONSProcess controlProgrammable logic controller (PLC) and distributed control system (DCS) modulesInstrumentation and measurement

The AD4134 is a quad channel, low noise, simultaneous sampling, precision analog-to-digital converter (ADC) that delivers on functionality, performance, and ease of use. Based on the continuous time sigma-delta (CTSD) modulation scheme, the AD4134 removes the traditionally required switched capacitor circuitry sampling preceding the ?-? modulator, which leads to a relaxation of the ADC input driving requirement. The CTSD architecture also inherently rejects signals around the ADC aliasing frequency band, giving the device its inherent antialiasing capability, and removes the need for a complex external antialiasing filter. The AD4134 has four independent converter channels in parallel, each with a CTSD modulator and a digital decimation and filtering path. The AD4134 enables simultaneous sampling of four separate signal sources, each supporting a maximum input bandwidth of 391.5 kHz and achieving tight phase matching between these four signal measurements. The high level of channel integration, together with its simplified analog front-end requirement, enables the AD4134 to provide a high density multichannel data acquisition solution in a small form factor. The signal chain simplification property of the AD4134 also improves the system level performance through the reduction of noise, error, mismatch, and distortion that is normally introduced by the analog front-end circuitry. The AD4134 offers excellent dc and ac performance. The bandwidth of each ADC channel ranges from dc to 391.5 kHz, making the device an ideal candidate for universal precision data acquisition solutions supporting a breadth of sensor types, from temperature and pressure to vibration and shock. The AD4134 offers a large number of features and configuration options, giving the user the flexibility to achieve the optimal balance between bandwidth, noise, accuracy, and power for a given application. An integrated asynchronous sample rate converter (ASRC) allows the AD4134 to precisely control the decimation ratio and, in turn, the output data rate (ODR) using interpolation and resampling techniques. The AD4134 supports a wide range of ODR frequencies, from 0.01 kSPS to 1496 kSPS with less than 0.01 SPS adjustment resolution, allowing the user to granularly vary sampling speed to achieve coherent sampling. The ODR value can be controlled through the ODR_VAL_INT_? and ODR_VAL_FLT_? registers (Register 0?16 to Register 0?1C, ASRC master mode), or using an external clock source (ASRC slave mode). The ASRC slave mode operation enables synchronous sampling between multiple AD4134 devices to a single system clock. The ASRC simplifies the clock distribution requirement within a medium bandwidth data acquisition system because it no longer requires a high frequency, low jitter master clock from the digital back end to be routed to each ADC. The ASRC acts as a digital filter and decimates the oversampled data from the ?-? modulator to a lower rate to favor higher precision. The ADC data is then further processed by one of the AD4134 user-selectable digital filter profiles to further reject the out of band signals and noises, and reduce the data rate to the final desired ODR value. The AD4134 offers three main digital filter profile options: a wideband low ripple filter with a brick wall frequency profile and an ODR range from 2.5 kSPS to 374 kSPS that is suitable for frequency domain analysis, a fast responding sinc3 filter with an ODR range from 0.01 kSPS to 1496 kSPS that is suitable for low latency time domain analysis and low frequency high dynamic range input types, and a balanced sinc6 filter with an ODR range from 2.5 kSPS to 1.496 MSPS, offering optimal noise performance and response time. The AD4134 is also capable of performing on-board averaging between two or four of its input channels. The result is a near 3 dB, if two channels are combined, or 6 dB, if all four channels are combined, improvement in dynamic range while maintaining the bandwidth. The AD4134 supports two device configuration schemes: serial peripheral interface (SPI) and hardware pin configuration (pin control mode). The SPI control mode offers access to all the features and configuration options available on the AD4134. SPI control mode also enables access to the on-board diagnostic features designed to enable a robust system design. Pin control mode offers the benefit of simplifying the device configuration, enabling the device to operate autonomously after power-up operating in a standalone mode. In addition to the optional SPI, the AD4134 has a flexible and independent data interface for transmitting the ADC output data. The data interface can act as either a bus master or a slave with various clocking options to support multiple communication bus protocols. The data interface also supports daisy-chaining and an optional minimum input/output (I/O) mode designed to minimize the number of digital isolator channels required in isolated applications. The AD4134 has an operating ambient temperature range from -40?C to 105?C. The device is housed in an 8 mm ? 8 mm, 56-lead lead frame chip scale package (LFCSP).APPLICATIONSElectrical test and measurement Audio test 3-phase power quality analysis Control and hardware in loop verification Sonars Condition monitoring for predictive maintenance Acoustic and material science research and development

The AD4630-16 is a two-channel, simultaneous sampling, Easy Drive?, 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC). With a guaranteed maximum ?3 ppm integral nonlinearity (INL) and no missing codes at 16-bits, the AD4630-16 achieves excellent precision from ?40?C to +125?C. Figure 1 in the data sheet shows the functional architecture of the AD4630-16.A low-drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4630-16 offers a typical dynamic range of 97.4 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio is available and can reduce noise for low bandwidth signals, improving accuracy. The wide differential input and common-mode ranges allow inputs to use the full (?VREF range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4630-16. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. A wide data clocking window, multiple serial data output (SDO) lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode can relax the timing requirements and simplify the use of digital isolators.The ball grid array (BGA) package of the AD4630-16 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout.APPLICATIONS Automatic test equipment Digital control loops Medical instrumentation Seismology Semiconductor manufacturing Scientific instrumentation