The LTC2486 is a 4-channel (2-channel differential), 16-bit, No Latency ??? ADC with Easy Drive? technology. The patented sampling scheme eliminates dynamic input current errors and the shortcomings of on-chip buffering through automatic cancellation of differential input current. This allows large external source impedances and rail-to-rail input signals to be directly digitized while maintaining exceptional DC accuracy. The LTC2486 includes programmable gain, a high accuracy temperature sensor, and an integrated oscillator. This device can be configured to measure an external signal (from combinations of 4 analog input channels operating in single ended or differential modes) or its internal temperature sensor. It can be programmed to reject line frequencies of 50Hz, 60Hz, or simultaneous 50Hz/60Hz, provide a programmable gain from 1 to 256 in 8 steps, and configured to double its output rate. The integrated temperature sensor offers 1/2?C resolution and 2?C absolute accuracy. The LTC2486 allows a wide common mode input range (0V to VCC), independent of the reference voltage. Any combination of single-ended or differential inputs can be selected and the first conversion after a new channel selection is valid.Applications Direct Sensor Digitizer Direct Temperature Measurement Instrumentation Industrial Process Control

The LTC2382-16 is a low noise, low power, high speed 16-bit successive approximation register (SAR) ADC. Operating from a 2.5V supply, the LTC2382-16 has a ?2.5V fully differential input range. The LTC2382-16 consumes only 6.5mW and achieves ?2LSB INL max, no missing codes at 16-bits and 92dB SNR. The LTC2382-16 has a high speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring a daisychain mode. The fast 500ksps throughput with no cycle latency makes the LTC2382-16 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2382-16 automatically powers down between conversions, leading to reduced power dissipation that scales with the sampling rate. The LTC2382-16 features a proprietary sampling architecture that enables the ADC to begin acquiring the next sample during the current conversion. The resulting extended acquisition time of 1.25?s allows the use of extremely low power ADC drivers.Applications Medical Imaging High Speed Data Acquisition Portable or Compact Instrumentation Industrial Process Control Low Power Battery-Operated Instrumentation ATE?

DC1620A-N: Demo Board for LTC2144-12 12-Bit, 105Msps Low Power Dual ADCs.

The LTC2655 is a family of Quad I2C 16-/12-Bit Rail-to-Rail DACs with integrated 10ppm/?C max reference. The DACs have built-in high performance, rail-to-rail, output buffers and are guaranteed monotonic. The LTC2655-L has a full-scale output of 2.5V with the integrated reference and operates from a single 2.7V to 5.5V supply. The LTC2655-H has a full-scale output of 4.096V with the integrated reference and operates from a 4.5V to 5.5V supply. Each DAC can also operate with an external reference, which sets the full-scale output to 2 times the external reference voltage.The parts use the 2-wire I2C compatible serial interface. The LTC2655 operates in both the standard mode (maximum clock rate of 100kHz) and the fast mode (maximum clock rate of 400kHz). The LTC2655 incorporates a power-on reset circuit that is controlled by the PORSEL pin. If PORSEL is tied to GND the DACs power-on reset to zero-scale. If PORSEL is tied to VCC, the DACs power-on reset to mid-scale.Applications Mobile Communications Process Control and Industrial Automation Instrumentation Automatic Test Equipment Automotive

The AD97481 is an 8-bit resolution, wideband, third generation member of the TxDAC series of high performance, low power CMOS digital-to-analog converters (DACs). The TxDAC family, consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface options, small outline package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost. The AD9748 offers exceptional ac and dc performance while supporting update rates up to 210 MSPS. The AD9748?s low power dissipation makes it well suited for portable and low power applications. Its power dissipation can be further reduced to 60 mW with a slight degradation in performance by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 15 mW. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a 1.2 V temperature-compensated band gap reference have been integrated to provide a complete monolithic DAC solution. The digital inputs support 3 V CMOS logic families. PRODUCT HIGHLIGHTS 32-lead LFCSP. The AD9748 is the 8-bit member of the pin-compatible TxDAC family, which offers excellent INL and DNL performance. Differential or single-ended clock input (LVPECL or CMOS), supports 210 MSPS conversion rate. Data input supports twos complement or straight binary data coding. Low power: Complete CMOS DAC function operates on 135 mW from a 2.7 V to 3.6 V single supply. The DAC full-scale current can be reduced for lower power operation, and a sleep mode is provided for low power idle periods. On-chip voltage reference: The AD9748 includes a 1.2 V temperature-compensated band gap voltage reference.?APPLICATIONS Communications Direct digital synthesis (DSS) Instrumentation

The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The part operates at up to a 500 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a sample-and-hold and voltagereference, are included on the chip to provide a complete signal conversion solution. The VREF pin can be used to monitor the internal reference or provide an external voltage reference (external reference mode must be enabled through the SPI port). The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced BiCMOS process, the AD9434 isavailable in a 56-lead LFCSP, specified over the industrial temperature range (?40?C to +85?C). This part is protected under a U.S. patent.APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearizationPRODUCT HIGHLIGHTS High Performance. Maintains 65 dBFS SNR at 500 MSPS with a 250 MHz input. Low Power. Consumes only 660 mW at 500 MSPS. Ease of Use. LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample and hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design. Serial Port Control. Standard serial port interface supports various product functions, such as data formatting, power-down, gain adjust, and output test pattern generation. The AD9434 is pin compatible with the AD9230, and can be substituted in many applications with minimal design changes.

The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator.When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2? interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in a 165-ball, 8 mm ? 8 mm, 0.5 mm pitch CSP_BGA package, and a 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin.?Applications Broadband communications systems DOCSIS 3.1 CMTS/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point

The AD9204 is a monolithic, dual-channel, 1.8 V supply, 10-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 10-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported and output data can be multiplexed onto a single output bus.The AD9204 is available in a 64-lead RoHS compliant LFCSP and is specified over the industrial temperature range (?40?C to +85?C).PRODUCT HIGHLIGHTS The AD9204 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/DATA timing and offset adjustments, and voltage reference modes. The AD9204 is packaged in a 64-lead RoHS compliant LFCSP that is pin compatible with the AD9268 16-bit ADC, the AD9251 and AD9258 14-bit ADCs, and the AD9231 12-bit ADC, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Battery-powered instruments Handheld scope meters Ultrasound Radar/LIDAR PET/SPECT imaging

The AD9761 is a complete dual channel, high speed, 10-bitCMOS DAC. The AD9761 has been developed specifically foruse in wide bandwidth communication applications (e.g., spreadspectrum) where digital I and Q information is being processedduring transmit operations. It integrates two 10-bit, 40 MSPSDACs, dual 2x interpolation filters, a voltage reference, anddigital input interface circuitry. The AD9761 supports a20 MSPS per channel input data rate that is then interpolatedby 2x up to 40 MSPS before simultaneously updating eachDAC.The interleaved I and Q input data stream is presented to thedigital interface circuitry, which consists of I and Q latches as wellas some additional control logic. The data is de-interleaved backinto its original I and Q data. An on-chip state machine ensures theproper pairing of I and Q data. The data output from each latch isthen processed by a 2x digital interpolation filter that eases thereconstruction filter requirements. The interpolated output of eachfilter serves as the input of their respective 10-bit DAC.The DACs utilize a segmented current source architecture combinedwith a proprietary switching technique to reduce glitchenergy and to maximize dynamic accuracy. Each DAC providesdifferential current output thus supporting single-ended ordifferential applications. Both DACs are simultaneously updatedand provide a nominal full-scale current of 10 mA. Also,the full-scale currents between each DAC are matched to within0.07 dB (i.e., 0.75%), thus eliminating the need for additionalgain calibration circuitry.The AD9761 is manufactured on an advanced low cost CMOSprocess. It operates from a single supply of 2.7 V to 5.5 V andconsumes 200 mW of power. To make the AD9761 complete italso offers an internal 1.20 V temperature-compensated bandgapreference.PRODUCT HIGHLIGHTS Dual 10-Bit, 40 MSPS DACs A pair of high performance 40 MSPS DACs optimized for low distortion performance provide for flexible transmission of I and Q information. 2x Digital Interpolation Filters Dual matching FIR interpolation filters with 62.5 dB stopband rejection precede each DAC input, thus reducing the DACs? reconstruction filter requirements. Low Power Complete CMOS dual DAC function operates on a low 200 mW on a single supply from 3 V to 5.5 V. The DAC full-scale current can be reduced for lower power operation, and a sleep mode is provided for power reduction during idle periods. On-Chip Voltage Reference The AD9761 includes a 1.20 V temperature-compensated band gap voltage reference. Single 10-Bit Digital Input Bus The AD9761 features a flexible digital interface that allows each DAC to be addressed in a variety of ways including different update rates. Small Package The AD9761 offers the complete integrated function in a compact 28-lead SSOP package. Product Family The AD9761 Dual Transmit DAC has a pair of Dual Receive ADC companion products, the AD9281 (8 bits) and AD9201 (10 bits).

The LTC6655 is a complete family of precision bandgap voltage references, offering exceptional noise and drift performance. This low noise and drift is ideally suited for the high resolution measurements required by instrumentation and test equipment. In addition, the LTC6655 is fully specified over the temperature range of ?40?C to 125?C, ensuring its suitability for demanding automotive and industrial applications. Advanced curvature compensation allows this bandgap reference to achieve a drift of less than 2ppm/?C with a predictable temperature characteristic and an output voltage accurate to ?0.025%, reducing or eliminating the need for calibration.The LTC6655LN Low Noise comes with a noise reduction pin that enables reduction of wideband noise with the addition of a single capacitor.The LTC6655 can be powered from as little as 500mV above the output voltage to as much as 13.2V. Superior load regulation with source and sink capability, coupled with exceptional line rejection, ensures consistent performance over a wide range of operating conditions. A shutdown mode is provided for low power applications.The LTC6655 references are offered in an 8-lead MSOP package and an 8-lead LS8 package. The LS8 is a 5mm ? 5mm surface mount hermetic package that provides outstanding stability.APPLICATIONS Instrumentation and Test Equipment High Resolution Data Acquisition Systems Weigh Scales Precision Battery Monitors Precision Regulators Medical Equipment