TPS61020 Evaluation Module

The AD9635 is a dual, 12-bit, 80 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) forsignaling a new output byte are provided. Individual channelpower-down is supported; the AD9635 typically consumes lessthan 2 mW in the full power-down state. The ADC providesseveral features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9635 is available in a RoHS-compliant, 32-lead LFCSP. It is specified over the industrial temperature range of ?40?Cto +85?C. PRODUCT HIGHLIGHTS Small Footprint. Two ADCs are contained in a small, spacesaving package. Low Power. The AD9635 uses 115 mW/channel at 125 MSPS with scalable power options. Pin Compatibility with the AD9645, a 14-Bit Dual ADC. Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Broadband data applications Battery-powered instruments Hand held scope meters Portable medical imaging and ultrasound Radar/LIDAR

Demonstration circuit SCP-ADP5070-EVALZ is a dual out-put DC-DC converter designed to create a dual polarity regulated voltage for powering several signal chains. The positive regulator provides 15V/1A of output while the negative regulator delivers –15V/300mA. Like all boards in the Signal Chain Power series, this board is designed to be easily plugged into other SCP boards to form a complete signal chain power system, enabling fast evaluation of low power signal chains. To evaluate this board, some universal SCP hardware is required, namely: SCP-INPUT-EVALZ SCP-OUTPUT-EVALZ SCP-1X5BKOUT-EVALZ SCP-THRUBRD-EVALZ SCP-FILTER-EVALZ SCP-1X2BKOUT-EVALZ SCP-5X1-EVALZ   To properly evaluate SCP series demo boards, you will need the SCP Configurator companion software. SCP Configurator can help you choose the right board and topology for your design. Note that the Demo Manual does not cover details important to the operation and configuration regarding the ADP5070. Please refer to the ADP5070 datasheet for a complete description of the part.

The ADCMP563/ADCMP564 are high speed comparatorsfabricated on Analog Devices? proprietary XFCB process. Thedevices feature a 700 ps propagation delay with less than 75 psoverdrive dispersion. Dispersion, a measure of the difference inpropagation delay under differing overdrive conditions, is a particularlyimportant characteristic of high speed comparators. A separateprogrammable hysteresis pin is available on the ADCMP564.A differential input stage permits consistent propagation delaywith a wide variety of signals in the common-mode range from?2.0 V to +3.0 V. Outputs are complementary digital signals thatare fully compatible with ECL 10 K and 10 KH logic families.The outputs provide sufficient drive current to directly drivetransmission lines terminated in 50 ? to ?2 V. A latch input,which is included, permits tracking, track-and-hold, or sample-and-holdmodes of operation. The latch input pins contain internalpull-ups that set the latch in tracking mode when left open.The ADCMP563/ADCMP564 are specified over the industrialtemperature range (?40?C to +85?C).Applications Automatic test equipment High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers Threshold detection Peak detection High speed triggers Patient diagnostics Hand-held test instruments Zero crossing detectors Line receivers and signal restoration Clock drivers

The ADP2138 and ADP2139 are high efficiency, low quiescent current, synchronous step-down dc-to-dc converters. The ADP2139 has the additional feature of an internal discharge switch. The total solution requires only three tiny external components. When the MODE pin is set high, the buck regulator operates in forced PWM mode, which provides low peak-to-peak ripple for power supply noise sensitive loads at the expense of light load efficiency. When the MODE pin is set low, the buck regulator automatically switches operating modes, depending on the load current level. At higher output loads, the buck regulator operates in PWM mode. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving light load efficiency.The ADP2138/ADP2139 operate on input voltages of 2.3 V to 5.5 V, which allows for single lithium or lithium polymer cell, multiple alkaline or NiMH cell, PCMCIA, USB, and other standard power sources. The maximum load current of 800 mA is achievable across the input voltage range.The ADP2138/ADP2139 are available in fixed output voltages of 3.3 V, 3.0 V, 2.8 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, and 0.8 V. All versions include an internal power switch and synchronous rectifier for minimal external part count and high efficiency. The ADP2138/ADP2139 have internal soft start and they are internally compensated. During logic controlled shutdown, the input is disconnected from the output and the ADP2138/ADP2139 draw 0.2 ?A (typical) from the input source.Other key features include undervoltage lockout to prevent deep battery discharge, and soft start to prevent input current overshoot at startup. The ADP2138/ADP2139 are available in a 6-ball wafer level chip scale package (WLCSP).Applications PDAs and palmtop computers Wireless handsets Digital audio, portable media players Digital cameras, GPS navigation units

MSP430F5438 Experimenter Board

Evaluation Module for TPS53311 Synchronous Step Down DCDC Converter

The LTC4365 protects applications where power supply input voltages may be too high, too low or even negative. It does this by controlling the gate voltages of a pair of external N-channel MOSFETs to ensure that the output stays within a safe operating range.The LTC4365 can withstand voltages between ?40V and 60V and has an operating range of 2.5V to 34V, while consuming only 125?A in normal operation.Two comparator inputs allow configuration of the overvoltage (OV) and undervoltage (UV) set points using an external resistive divider. A shutdown pin provides external control for enabling and disabling the MOSFETs as well as placing the device in a low current shutdown state. A fault output provides status of the gate pin pulling low. A fault is indicated when the part is in shutdown or the input voltage is outside the UV and OV set points.The LTC4365 has a 36ms turn-on delay that debounces live connections and blocks 50Hz to 60Hz AC power. For fast recovery after faults, the LTC4365-1 has a reduced 1ms turn-on delay.Applications Portable Instrumentation Industrial Automation Laptops Automotive Surge Protection

MSP432 ADAPTER FOR MSP-FET

The ADP1870?/ ADP1871 are versatile current-mode, synchronous step-down controllers that provide superior transient response, optimal stability, and current-limit protection by using a constant on-time, pseudo-fixed frequency with a programmable current-limit, current-control scheme. In addition, these devices offer optimum performance at low duty cycles by utilizing valley current-mode control architecture. This allows the ADP1870 / ADP1871 to drive all N-channel power stages to regulate output voltages as low as 0.6 V.The ADP1871 is the power saving mode (PSM) version of the device and is capable of pulse skipping to maintain output regulation while achieving improved system efficiency at light loads (see the Power Saving Mode (PSM) Version (ADP1871) section for more information).Available in three frequency options (300 kHz, 600 kHz, and 1.0 MHz, plus the PSM option), the ADP1870 / ADP1871 are well suited for a wide range of applications that require a single-input power supply range from 2.95 V to 20 V. Low voltage biasing is supplied via a 5 V internal LDO.In addition, an internally fixed soft start period is included to limit input in-rush current from the input supply during startup and to provide reverse current protection during soft start for a precharged output. The low-side current-sense, current-gain scheme and integration of a boost diode, along with the PSM/forced pulse-width modulation (PWM) option, reduce the external part count and improve efficiency.The ADP1870/ADP1871 operate over the -40?C to +125?C junction temperature range and are available in 10-lead MSOP package.APPLICATIONS Telecom and networking systems Mid to high end servers Set-top boxes DSP core power supplies 12 V input POL supplies