Demonstration circuit 1568A is a 2A monolithic multichemistry battery charger for solar power applications featuring the LT3652EDD. The LT3652 is a complete mid-power Li-Ion battery charger that can operate over a wide input voltage range. The charger employs a 3.3V float voltage feedback reference that allows the battery float voltage to be adjusted up to 14.4V. The LT3652 has an input voltage regulation loop which reduces charge current if the input falls below a programmed level, set with a resistor divider. The circuit provides CC/CV charging with a 2A maximum charge current that is programmed by a sense resistor.

Demonstration circuit 1231A is a Dual Output, Dual Phase 5A Synchronous Buck Converter featuring the LTC3850EGN. The entire circuit, including the bulk output capacitors, fit within a 1.04” × 0.94” area on all layers. The package style for the LTC3850EGN is a 28-lead narrow plastic SSOP. The main features of the board include rail tracking, an internal 5V linear regulator for bias, RUN pins for each output and a PGOOD signal and a Mode selector that allow the converter to run in CCM, pulse skip or Burst Mode operation. Synchronization to an external clock is also possible through some minor component changes. Two versions of the board are available. DC-1231A-A has an on-board sense resistor for current feedback, while the DC1231A-B is configured with a DCR sense circuit that allows the converter to use the inductor’s DCR as the sense element instead of the on-board sense resistors to save cost and board space and improves efficiency.

The SSM2603 is a low power, high quality stereo audio codec for portable digital audio applications with one set of stereo programmable gain amplifier (PGA) line inputs and one monaural microphone input. It features two 24-bit analog-to-digital converter (ADC) channels and two 24-bit digital-to-analog (DAC) converter channels.The SSM2603 can operate as a master or a slave. It supports various master clock frequencies, including 12 MHz or 24 MHz for USB devices; standard 256 fS or 384 fS based rates, such as 12.288 MHz and 24.576 MHz; and many common audio sampling rates, such as 96 kHz, 88.2 kHz, 48 kHz, 44.1 kHz, 32 kHz, 24 kHz, 22.05 kHz, 16 kHz, 12 kHz, 11.025 kHz, and 8 kHz.The SSM2603 can operate at power supplies as low as 1.8 V for the analog circuitry and as low as 1.5 V for the digital circuitry. The maximum voltage supply is 3.6 V for all supplies.The SSM2603 software-programmable stereo output options provide the user with many application possibilities. Its volume control functions provide a large range of gain control of the audio signal.The SSM2603 is specified over the industrial temperature range of ?40?C to +85?C. It is available in a 28-lead, 5 mm ? 5 mm lead frame chip scale package (LFCSP).Applications Mobile phones MP3 players Portable gaming Portable electronics Educational toys

The ADMV1128 is a silicon on isolator (SOI), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 24 GHz to 29.5 GHz frequency range.Both upconverters and downconverters offer two modes of frequency translation. One mode is conversion from and/or to single-ended or complex intermediate frequency (IF) signals, which then pass through an on-chip 90? IF hybrid, known as IF mode.The other mode is a direct conversion from and/or to differential baseband inphase/quadrature (I/Q) inputs and outputs, known as baseband mode. The I/Q baseband output common-mode voltage is programmable between 0 V and 1.5 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance.When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to 24 dBc, before calibration. The ADMV1128 offers a square law power detector to allow monitoring of the power levels at the mixer inputs of the downconverter.The RF receive input, RF transmit output, and local oscillator (LO) interface are all single-ended and matched to 50 ?. The on-chip RF switch provides the option to combine the transmit and receive RF ports together for time division duplex (TDD) applications. The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.The ADMV1128 upconverter and downconverter is housed in a compact, thermally enhanced, 6 mm ? 6.5 mm, ball grid array (BGA) package. This BGA package enables the ability to heat sink the ADMV1128 from the top of the package for the most efficient thermal heat sinking. The ADMV1128 operates over the ?40?C to +95?C TC range.APPLICATIONS Millimeter-wave 5G applications Point to point microwave radios Radar and electronic warfare systems Instrumentation and automatic test equipment (ATE)

The ADM1278 is a hot swap controller that allows a circuit board to be removed from or inserted into a live backplane. It also features current, voltage, power, and temperature readback via an integrated 12-bit analog-to-digital converter (ADC), accessed using a PMBus? interface. The load current is measured using an internal current sense amplifier that measures the voltage across a sense resistor in the power path via the HS+ and HS? pins. A default current limit of 20 mV is set, but this limit can be adjusted, if required.The ADM1278 limits the current through the sense resistor by controlling the gate voltage of an external N-channel FET in the power path, via the GATE pin. The sense voltage, and therefore the load current, is maintained below the preset maximum. The ADM1278 protects the external FET by limiting the time that the FET remains on while the current is at its maximum value.This current-limit time is set by the choice of capacitor connected to the TIMER pin. In addition, a constant power foldback scheme is used to control the power dissipation in the MOSFET during power-up and fault conditions. The level of this power, along with the TIMER regulation time, can be set to ensure that the MOSFET remains within safe operating area (SOA) limits.In case of a short-circuit event, a fast internal overcurrent detector responds within 320 ns and signals the gate to shut down. A 1500 mA pull-down device ensures a fast FET response.The ADM1278 features overvoltage (OV) and undervoltage (UV) protection, programmed using external resistor dividers on the UV and OV pins. A PWRGD signal can be used to detect when the output supply is valid, using the PWGIN pin to accurately monitor the output.The ADM1278 is available in a 32-lead LFCSP with a RETRY pin that can be configured for automatic retry or latch-off when an overcurrent fault occurs.Applications Servers Power monitoring and control/power budgeting Telecommunication and data communication equipment?

Demonstration circuit SCP-LT8609S-IEVALZ is a 42V, 2A/3A peak micropower synchronous step-down regulator featuring the LT8609S. The demo board is designed for –5V output from a 5.5V to 42V input. Like all boards in the Signal Chain Power series, this board is designed to be easily plugged into other SCP boards to form a complete signal chain power system, enabling fast evaluation of low power signal chains. To evaluate this board, some universal SCP hardware is required, namely: SCP-INPUT-EVALZ SCP-OUTPUT-EVALZ SCP-FILTER-EVALZ SCP-THRUBRD-EVALZ SCP-1X2BKOUT-EVALZ SCP-1X5BKOUT-EVALZ SCP-5X1-EVALZ   To properly evaluate SCP series demo boards, you will need the SCP Configurator companion software. SCP Configurator can help you choose the right board and topology for your design. Note that the Demo Manual does not cover details important to the operation and configuration regarding the LT8609S. Please refer to the LT8609S datasheet for a complete description of the part.

DC1620A-M: Demo Board for LTC2145-12 12-Bit, 125Msps Low Power Dual ADCs.

The HMC974LC3C is a silicon germanium (SiGe) monolithic, ultra fast window comparator that features reduced swing positive emitter-coupled logic (RSPECL) output drivers that are level latched. Three output ports detect whether an analog input signal is above, below, or between two reference levels supplied at the input.The outputs are single-ended negative logic. Incorporating two proven comparators at the input provides good dc and dynamic matching and reduces the input capacitance. The reduced swingoutput stages are designed to directly drive 400 mV into 50 ? terminated to a voltage (VTERM = VCCO ? 2 V).HMC974LC3C features high speed latches that can either be enabled to latch the output data or left in the track mode toimplement a tracking window comparator.Applications Automatic test equipment (ATE) High speed instrumentation Clock and data restoration Semiconductor test systems Threshold detection in electronic warfare systems

The HMC822LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The synthesizer consists of an integrated low noise VCO with a triband output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.The fractional synthesizer features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.For theory of operation and register map refer to the 'PLLs with Integrated VCO - RF VCOs' Operating Guide.Applications Cellular/4G Infrastructure Repeaters and Femtocells Communications Test Equipment CATV Equipment Phased Array Applications DDS Replacement? Very High Data Rate Radios

DC1620A-J: Demo Board for LTC2142-14 14-Bit, 65Msps Low Power Dual ADCs.