The AD9530 is a fully integrated PLL and distribution supporting, clock cleanup, and frequency translation device for 40 Gbps/ 100 Gbps OTN applications. The internal PLL can lock to one of two reference frequencies to generate four discrete output frequencies up to 2.7 GHz.The AD9530 features an internal 5.11 GHz to 5.4 GHz, ultralow noise voltage controlled oscillator (VCO). All four outputs are individually divided down from the internal VCO using two high speed VCO dividers (the Mx dividers) and four individual 8-bit channel dividers (the Dx dividers). The high speed VCO dividers offer fixed divisions of 2, 2.5, 3, and 3.5 for wide coverage of possible output frequencies. The AD9530 is configurable for loop bandwidths <15 kHz to attenuate reference noise.The AD9530 is available in a 48-lead LFCSP and operates from a single 2.5 V typical supply voltage.The AD9530 operates over the extended industrial temperature range of ?40?C to +85?C.?Applications 40 Gbps/100 Gbps optical transport network (OTN) line side clocking Clocking of high speed analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) Data communications

The ADP121 is a quiescent current, low dropout, linear regulator that operates from 2.3 V to 5.5 V and provides up to 150 mA of output current. The low 135 mV dropout voltage at 150 mA load improves efficiency and allows operation over a wide input voltage range. The low 30 ?A of quiescent current at full load makes the ADP121 ideal for battery-operated portable equipment.The ADP121 is available in output voltages ranging from 1.2 V to 3.3 V. The parts are optimized for stable operation with small 1 ?F ceramic output capacitors. The ADP121 delivers good transient performance with minimal board area.Short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. The ADP121 is available in a tiny 5-lead TSOT and 4-ball 0.4 mm pitch WLCSP pack-ages and utilizes the smallest footprint solution to meet a variety of portable applications.

Demonstration Circuit 1598A is a fixed frequency synchronous buck-boost converter with an extended input and output range. The unique 4-switch, single inductor architecture provides low noise and seamless operation from input voltages above, below, or equal to the output voltage. The LTC3112 features selectable PWM or Burst Mode operation, and an easily synchronizable oscillator. An output current monitor allows the load current to be controlled or monitored. The LTC3112 operates with a 2.7V to 15V input voltage range and a VOUT range from 2.5V to 14V. The demonstration board has been designed to operate with VIN from 2.7V to 15V and an output current up to 2.5A. For VIN < 5V, IOUT capability is reduced. VOUT is set to 5.0V.

Demonstration circuit DC3016A is a buck-boost power supply featuring the LTM4693, ultrathin, highly efficient, 2A buck-boost μModule® regulator. The LTM4693 regulates an output voltage above, below, or equal to the input voltage. This demonstration circuit is designed to have an input voltage from 2.6V to 5.5V with selectable 1.8V, 2.5V, 3.3V, and 5V output voltage up to 2A load. Derating may be necessary for specific VIN, VOUT, and thermal conditions. This demo board includes a mode selector that allows the converter to run in CCM or Burst Mode® operation. Synchronization to an external clock is also possible. The switching frequency can be adjusted from 1MHz to 4MHz by a resistor. And the soft-start period is programmable by an external capacitor. The LTM4693 data sheet gives a complete description of these functions, operation, and application information. The data sheet must be read in conjunction with this quick start guide for demo circuit 3016A.

The ADM8611 /?ADM8612?/?ADM8613?/?ADM8614?/?ADM8615?are voltage supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. Apart from providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external push-button through a manual reset input.The ultralow power consumption of these devices makes them suitable for power efficiency sensitive systems, such as battery-powered portable devices and energy meters.The features of each member of the device family are shown in Table 9 in the data sheet. Each device subdivides into submodels with differences in factory preset voltage monitoring threshold options. In the range of 2 V to 4.63 V, 10 options are available for the ADM8611. In the range of 2.32 V to 4.63 V, five options are available for both the ADM8613 and ADM8614. A separate supply input allows the ADM8612 and ADM8615 to monitor 20 different low voltage levels from 0.5 V to 1.9 V. Not all device options are available as standard models.The ADM8611, ADM8612, ADM8613, and ADM8615 can reset on demand through the manual reset input. The watchdog function on the ADM8613, ADM8614, and ADM8615 monitors the heartbeat of the microprocessor through the WDI pin. The ADM8613 and ADM8614 have a watchdog disable input, which allows the user to disable the watchdog function, if required. The ADM8614 also has a watchdog timeout extension input, allowing the watchdog timeout to be extended from 1.6 sec to 100 sec.The ADM8611/ADM8612/ADM8613/ADM8614/ADM8615 are available in a 6-ball, 1.46 mm ? 0.96 mm WLCSP. These devices are specified over the temperature range of ?40?C to +85?C.??APPLICATIONS Portable/battery-operated equipment Microprocessor systems Energy metering Energy harvesting

The ADCMP600, ADCMP601, and ADCMP602 are very fast comparators fabricated on Analog Devices? proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from ? 0.5 V to VCC + 0.2 V, low noise TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.The devices offer 5 ns propagation delay with 10 mV overdrive on 3 mA typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.5 V to +2.8 V input signal range up to a +5.5 V positive supply with a ?0.5 V to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions on the ADCMP602 support a wide input signal range while still allowing independent output swing control and power savings.The TTL-/CMOS-compatible output stage is designed to drive up to 5 pF with full timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided with a unique single-pin control option.The ADCMP600 is available in both 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in 8-lead MSOP and LSCFP packages.ApplicationsHigh Speed InstrumentationClock and Data Signal RestorationLogic Level Shifting or TranslationPulse SpectroscopyHigh Speed Line ReceiversThreshold DetectionPeak and Zero-crossing DetectorsHigh Speed Trigger CircuitryPulse-width ModulatorsCurrent-/voltage-controlled OscillatorsAutomatic Test Equipment (ATE)

The ADM8611/ADM8612/ADM8613/ADM8614/ADM8615?are voltage supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. Apart from providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external push-button through a manual reset input.The ultralow power consumption of these devices makes them suitable for power efficiency sensitive systems, such as battery-powered portable devices and energy meters.The features of each member of the device family are shown in Table 9 in the data sheet. Each device subdivides into submodels with differences in factory preset voltage monitoring threshold options. In the range of 2 V to 4.63 V, 10 options are available for the ADM8611. In the range of 2.32 V to 4.63 V, five options are available for both the ADM8613 and ADM8614. A separate supply input allows the ADM8612 and ADM8615 to monitor 20 different low voltage levels from 0.5 V to 1.9 V. Not all device options are available as standard models.The ADM8611, ADM8612, ADM8613, and ADM8615 can reset on demand through the manual reset input. The watchdog function on the ADM8613, ADM8614, and ADM8615 monitors the heartbeat of the microprocessor through the WDI pin. The ADM8613 and ADM8614 have a watchdog disable input, which allows the user to disable the watchdog function, if required. The ADM8614 also has a watchdog timeout extension input, allowing the watchdog timeout to be extended from 1.6 sec to 100 sec.The ADM8611/ADM8612/ADM8613/ADM8614/ADM8615 are available in a 6-ball, 1.46 mm ? 0.96 mm WLCSP. These devices are specified over the temperature range of ?40?C to +85?C.??Applications Portable/battery-operated equipment Microprocessor systems Energy metering Energy harvesting

The AD6684 is a 135 MHz bandwidth, quad intermediate frequency (IF) receiver. It consists of four 14-bit, 500 MSPS ADCs and various digital processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed to support communications applications. The analog full power bandwidth of the device is 1.4 GHz.?The quad ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The AD6684 is optimized for wide input bandwidth, excellent linearity, and low power in a small package.?The analog inputs and clock signal input are differential. Each pair of ADC data outputs are internally connected to two DDCs through a crossbar mux. Each DDC consists of up to five cascaded signal processing stages: a 48-bit frequency translator, NCO, and up to four half-band decimation filters.?Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6684 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining a 9-bit output resolution.?Each ADC output is also connected internally to a VDR block. This optional mode allows full dynamic range for defined input signals. Inputs that are within a defined mask (based on DPD applications) are passed unaltered. Inputs that violate this defined mask result in the reduction of the output resolution.?With VDR, the dynamic range of the observation receiver is determined by a defined input frequency mask. For signals falling within the mask, the outputs are presented at the maximum resolution allowed. For signals exceeding defined power levels within this frequency mask, the output resolution is truncated. This mask is based on DPD applications andsupports tunable real IF sampling, and zero IF or complex IF receive architectures.?Operation of the AD6684 in the DDC, NSR, and VDR modes is selectable via SPI-programmable profiles (the default mode is NSR at startup).In addition to the DDC blocks, the AD6684 has several functions that simplify the AGC function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.?Users can configure each pair of IF receiver outputs onto either one or two lanes of Subclass 1 JESD204B-based high speed serialized outputs, depending on the decimation ratio and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, SYNCINB?AB, and SYNCINB?CD input pins.?The AD6684 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using the 1.8 V capable, 3-wire SPI.?The AD6684 is available in a Pb-free, 72-lead LFCSP and is specified over the ?40?C to +105?C junction temperature range. Product Highlights Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.Applications Communications Diversity multiband, multimode digital receivers?3G/4G, W-CDMA, GSM, LTE, LTE-A HFC digital reverse path receivers Digital predistortion observation paths General-purpose software radios

The LT6658 is a family of precision dual output references combining the performance of a precision voltage reference and a linear regulator that we call the Refulator?. Both outputs are ideal for driving the reference inputs of high resolution ADCs and DACs, even with heavy loading, while simultaneously powering microcontrollers and other circuitry. Both outputs have the same precision specifications and track each other over temperature and load. Each output can be configured with external resistors to give an output voltage up to 6V.Using Kelvin connections, the LT6658 typically has 0.1ppm/mA load regulation with up to 150mA load current. A noise reduction pin is available to band-limit and lower the total integrated noise.Separate supply pins are provided for each output, providing an option to reduce power consumption and isolate the buffer amplifiers. The outputs have excellent supply rejection and are stable with 1?F to 50?F capacitors.The LT6658 is available in a 16-lead MSOP and DFN with an exposed pad for thermal management. Short circuit and thermal protection help to prevent thermal overstress.APPLICATIONS Microcontroller or FPGA with ADC/DAC Applications Data Acquisition Systems Automotive Control and Monitoring Precision Low Noise Regulators Instrumentation and Process Control

DC1699A-A: Demo Board for the LT6108 High Side Current Sense Amplifier with Reference and Comparator.