The HMC959LC3 is a Divide-by-4 with Reset designed to support clock frequencies as high as 26 GHz. During normal operation, with the reset pin not asserted, the output toggles from its prior state on the positive edge of the clock. This results in a divide-by-four function of the clock input. Asserting the reset pin forces the Q output low regardless of the clock edge state (asynchronous reset assertion). Reversing the clock inputs allows for negative-edge triggered applications. The HMC959LC3 also features an output level control pin, VR, which allows for loss compensation or for signal level optimization.All input signals to the HMC959LC3 are terminated with 50 ? to ground on-chip, and may be either AC or DC coupled. Outputs can be connected directly to a 50 ? terminated system, while DC blocking capacitors may be used if the terminating system is 50 ? to a non-ground DC voltage. The HMC959LC3 operates from a single -3.3 V DC supply and is available in a ceramic RoHS-compliant 3?3 mm SMT package.APPLICATIONS High Speed Frequency Divider?(up to 26 GHz) Broadband Test & Measurement Clock Synthesis Phase Locked Loops

DS90LV047-48AEVM evaluation module

The ADV8003 is a multiple input video signal processor that can de-interlace and scale SD, ED, or HD video data to HD formats, generate a bitmap on-screen display (OSD) and output the video with OSD overlaid on two High Definition Multimedia Interface (HDMI) transmitters and a video encoder.Video can be input into the ADV8003 in a number of ways: using the 48-bit TTL pixel port, using the 24-bit external OSD TTL pixel port, or from a device with a HDMI transmitter such as the ADV7850. The ADV8003 supports many of the formats outlined in the CEA-861 and VESA specifications, as well as several other widely used timing formats.Using two external DDR2 memories, the ADV8003 can perform high performance, motion adaptive interlaced to progressive conversion on SD and HD content. Using a single DDR2 memory, the HD de-interlacing is limited to intrafield.The ADV8003 features primary and secondary video scalers that enable simultaneous output of multiple different resolutions. Detail enhancement and image enhancing techniques such as random, mosquito, and block noise reduction allow for improved final image quality. The frame rate converter of the ADV8003 allows the conversion between common frame rates with support to output two different frame rates simultaneously under certain conditions.The ADV8003 has a flexible digital core that allows the user to configure the part in several different modes: using a single video processing channel, using dual video processing channels, or displaying OSD on multiple outputs of different resolutions. The ADV8003 can accept OSD information from either an external OSD source on the 24-bit external OSD TTL pixel data input or internally generate a high quality, bitmap-based OSD. The internal OSD is highly flexible and allows the system designer to easily incorporate features like scrolling text and animation in various color depths up to 24-bit true color.Analog Devices, Inc., provides an OSD development tool (Blimp) to assist in the design, debug, and emulation of the OSD prior to integration with the system application. When the design is complete, the OSD development tool automatically generates code to which system APIs can be added before integration with the system application and an OSD design resource, which must be downloaded to an external SPI flash memory.Video can be output from the ADV8003 using one or both of the HDMI transmitters and/or the 6-DAC SD/HD video encoder. The flexible multiplexing in the part allows simultaneous output of HD formats on the HDMI transmitters and on the HD DACs (for example, 1080p) with SD formats on the SD DACs (for example, 480i).Both of the HDMI transmitters on the ADV8003 support all mandatory and many optional 3D video resolutions and audio return channels (ARC). Each transmitter also features a full CEC master. The ADV8003 can receive up to six channels of I2S, S/PDIF, direct stream digital (DSD), and high bit rate (HBR). The six 12-bit NSV? video DACs allow for composite (CVBS), S-Video (Y/C), and component (YPrPb) analog outputs in standard, enhanced, and high definition video formats. Oversampling of 216 MHz (SD and ED) and 297 MHz (HD) removes the requirement for external output filtering.The ADV8003 can also support 30-bit TTL in and 30-bit TTL out mode for professional applications.The ADV8003 supports the I2C? protocol for communication with the system microcontroller.APPLICATIONS High end A/V receivers Upconverting DVD players/recorders Blu-ray players/recorders Set-top boxes Video conferencing Standalone video processors HDMI splitters

Evaluation Module for TPS65253 4.5V to 16V INPUT with 2 Buck Converters and Integrated FETS

STGAP2SM Gate Driver Power Management Evaluation Board

TSC2007EVM-PDK

TPS25741 Evaluation Module with Power Multiplexer and Port Power Management Capabilities

The AD8452 combines a precision analog front-end controller and switch mode power supply (SMPS), pulse-width modulator (PWM) driver into a single silicon platform for high volume battery testing and formation manufacturing. A precision instrumentation amplifier (in-amp) measures the battery charge/discharge current, while an equally accurate difference amplifier measures the battery voltage. Internal laser trimmed resistor networks establish the in-amp and difference amplifier gains (66 V/V and 0.4 V/V, respectively), and stabilize the AD8452 performance across the rated operating temperature range.Desired battery cycling current and voltage levels are established by applying precise control voltages to the ISET and VSET inputs. Actual charge and discharge current levels are sensed (usually by a high power, highly accurate shunt resistor) whose value is carefully selected according to system parameters. Switching between constant current (CC) and constant voltage (CV) loop integration is instantaneous, automatic, and completely transparent to the observer. A logic high at the MODE input selects the charge or discharge mode (high for charge, low for discharge).The AD8452 simplifies designs by providing excellent performance, functionality, and overall reliability in a space saving 48-lead, 7 mm ? 7 mm ? 1.4 mm LQFP package rated for operation at temperatures from ?40?C to +85?C.Applications Battery formation and testing High efficiency battery test systems with recycle capability Battery conditioning (charging and discharging) systems

The EVAL-ADL5902-ARDZ shield illustrates the functionality of the ADL5902, a 50 MHz to 9 GHz 65 dB TruPwr™ RMS responding RF power detector. The voltage outputs of the ADL5902 are routed to the ANALOG IN connector of the Arduino base board. This allows the RF power detector’s output voltage to be easily digitized and processed by the Arduino base board’s integrated six-channel ADC. The output of the ADL5902’s on-board temperature sensor is also routed to one of the ANALOG IN pins.

The ADM1169 Super Sequencer? is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1169 integrates a 12-bit ADC and four 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs. Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at ?5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter. The device also provides up to eight programmable inputs for monitoring undervoltage faults, overvoltage faults, or out-of-window faults on up to eight supplies. In addition, there are eight programmable outputs that can be used as logic enables. Six of these programmable outputs can also provide up to a 12 V output for driving the gate of an N-FET that can be placed in the path of a supply. The logical core of the device is a sequencing engine (SE). This state machine-based construction provides up to 63 different states. This design enables very flexible sequencing of the outputs, based on the condition of the inputs. A block of nonvolatile EEPROM is available that can be used to store user-defined information and may also be used to hold a number of fault records that are written by the sequencing engine defined by the user when a particular fault or sequence occurs. The ADM1169 is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc.