DA7202 - 1-Channel (Mono) Output Class D Audio Amplifier Evaluation Board

Demo Board for Low Noise Microphone Preamplifier with 2V Bias based on the TS472

ISL85403 - 1 Non-Isolated Output DC/DC, Step Up or Down Evaluation Board

Demonstration Board, TLS850B0TB33, 3.3V/0.5A Out, Low Dropout Linear Regulator

STPMxx - Interface Board

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADMV1017 is a silicon germanium (SiGe), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 24 GHz to 29.5 GHz frequency range.The upconverter offers two modes of frequency translation. The device is capable of direct conversion to radio frequency (RF) from differential baseband I/Q input signals, as well as single-sideband (SSB) upconversion from complex intermediate frequency (IF) inputs. Alternatively, the differential baseband I/Q input path can be disabled and a modulated, single-ended, complex IF signals from 3 GHz to 10.5 GHz can be fed to the IF path. These signals can then be upconverted to 24 GHz to 29.5 GHz while rejecting the unwanted sideband by typically better than 25 dBc. The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI interface allows powering down the output envelope detector to reduce power consumption when carrier feed through optimization is not necessary.The downconverter offers two modes of frequency translation. The device is capable of direct quadrature demodulation to differential baseband I/Q output signals, as well as image rejection downconversion to a single-ended complex IF output carrier frequency. The differential baseband outputs can be dc-coupled. More typically, however, the I/Q outputs are ac-coupled with a sufficiently low high-pass corner frequency to ensure adequate demodulation accuracy. The I/Q baseband output common-mode voltage is programmable between 0.75 V and 2.15 V. The SPI interface provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance. Alternatively, the baseband I/Q outputs can be disabled, and the I/Q signals can be passed through an on-chip, active balun to provide two, single-ended, complex IF outputs between 3 GHz and 10.5 GHz. When the device is used as an image rejecting down-converter, the unwanted image term is typically rejected to better than 25 dBc below the desired sideband. The ADMV1017 offers a square law power detector to allow monitoring of the power levels at the mixer inputs. The detector output provides closed-loop control of the RF digital step attenuator via an external automatic gain control (AGC) loop.The ADMV1017 upconverter and downconverter is housed in a compact, thermally enhanced, 9 mm ? 8 mm, land grid array (LGA) package. The ADMV1017 operates over the ?40?C to +95?C case temperature range. Throughout the figures in the data sheet, Rx means receiver and Tx means transmitter.APPLICATIONS5G applicationsPoint to point microwave radiosRadar and electronic warfare systemsInstrumentation and automatic test equipment (ATE)

The ADL6317 is a transmit variable gain amplifier (VGA) that provides an interface from radio frequency digital-to-analog converters (RF DACs), transceivers, and systems on a chip (SoC) to power amplifiers. Integrated balun and hybrid couplers allow high performance RF capability in the frequency range of 1500 MHz to 3000 MHz.To optimize performance vs. power level, the ADL6317 includes a voltage variable attenuator (VVA), high linearity amplifiers, and a digital step attenuator (DSA). All of the devices integrated into the ADL6317 are programmable via a 4-wire serial port interface (SPI).The ADL6317 is manufactured on an advanced silicon germanium (SiGe), bipolar complementary metal oxide semiconductor (BiCMOS) process.Applications 2G/3G/4G/long-term evolution (LTE) in FDD/TDD broadband communication systems

The ADL5605 is a broadband, two-stage, 1 W RF driver amplifier that operates over a frequency range of 700 MHz to 1000 MHz.The ADL5605 operates on a 5 V supply voltage and a supply current of 307 mA. The driver also incorporates a fast power-up/power-down function for TDD applications, applications that require a power saving mode, and applications that intermittently transmit data.The ADL5605 is fabricated on a GaAs HBT process and is packaged in a compact 4 mm ? 4 mm, 16-lead LFCSP that uses an exposed paddle for excellent thermal impedance. The ADL5605 operates from ?40?C to +85?C. A fully populated evaluation board tuned to 943 MHz is also available.ApplicationsWireless infrastructureAutomated test equipmentISM/AMR applications

The ADL5920 is an ultrawideband, bidirectional detector that simultaneously measures forward and reverse rms power levels in a signal path, along with the return loss.The forward and reverse power traveling through the integrated bidirectional bridge is measured using two 50 dB linear in dB rms detectors. The detector output voltages, available at the VRMSF and VRMSR pins, are proportional to the forward and reflected power in dBm. A third, differential, output produces a voltage proportional to the return loss (reflection coefficient) in dB, closely related to the voltage standing wave ratio (VSWR). The common-mode level of this output is externally adjustable through the VOCM pin.The primary transmission line of the bidirectional bridge, from RFIN to RFOUT (or vice versa) is dc-coupled and allows small amounts of dc bias current through the bridge. When dc-coupled to source and load, the positive and negative supply pins of the ADL5920 must be connected to +5 V and ?2.5 V, respectively (relative to the dc voltage at RFIN and RFOUT). The internal detector circuitry is also dc-coupled to the directional bridge to support measurements down to 9 kHz.The maximum input signal on each of the RF ports (RFIN and RFOOUT) is 30 dBm for open and shorted terminations and 33 dBm for a matched termination.The ADL5920 draws 160 mA from a 5 V supply and has a low power, power-down mode controlled through the PWDN/TADJS pin.The device is supplied in a 32-lead, 5 mm ? 5 mm LFCSP and is specified for ambient operating temperatures in the ?40?C to +85?C range.Multifunction pin names may be referenced by their relevant function only.Applications Industrial metering Broadband inline power and return loss measurement Transmit power control and automatic level control in wireless transmitters, signal generators, network analyzers, and wireless communications testers Condition based monitoring of system modules, cables, and connectors