Ethernet Development Tools 5-Port 10/100 Ethernet Switch

Ethernet Development Tools 5-Port 10/100 Ethernet Switch

Ethernet Development Tools 5-Port 10/100 Ethernet Switch

Ethernet Development Tools 5-Port 10/100 Ethernet Switch

Ethernet Development Tools 5-Port 10/100 Ethernet Switch

Ethernet Development Tools 5-Port 10/100 Ethernet Switch

Ethernet Development Tools 5-Port 10/100 Ethernet Switch

TS3USB3200EVM: USB 2.0 High-Speed and Mobile High-Definition Link Switch Evaluation Module

The HMC802ALP3E is a broadband bidirectional 1-bitGaAs IC digital attenuator in a low cost leadless sur-face mount package. This single positive control linedigital attenuator utilizes off chip AC ground capac-itors for near DC operation, making it suitable for awide variety of RF and IF applications. Covering DCto 10 GHz, the insertion loss is less than 3 dB typicaland attenuation accuracy is excellent at ?0.6 dB typ-ical. The attenuator also features a high IIP3 of +55dBm. One TTL/CMOS control input is used to selectthe attenuation state and a single Vdd bias of +5V isrequired. Applications Test equipment and sensors ISM, MMDS, WLAN,?WiMAX, WiBro Microwave radio & VSAT Cellular infrastructure

The AD9523-1 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO with two VCO dividers. The on-chip VCO tunes from 2.94 GHz to 3.1 GHz.The AD9523-1 is designed to support the clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive low phase noise requirements necessary for acceptable data converter SNR performance.The input receivers, oscillator, and zero delay receiver provide both single-ended and differential operation. When connected to a recovered system reference clock and a VCXO, the device generates 14 low noise outputs with a range of 1 MHz to 1 GHz, and one dedicated buffered output from the input PLL (PLL1). The frequency and phase of one clock output relative to another clock output can be varied by means of a divider phase select function that serves as a jitter-free, coarse timing adjustment in increments that are equal to half the period of the signal coming out of the VCO.An in-package EEPROM can be programmed through the serial interface to store user-defined register settings for power-up and chip reset.APPLICATIONS LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction (G.710) High performance wireless transceivers ATE and high performance instrumentation