Evaluation Board for LM26676, 42V, 3A Step-Down Switching Regulator

The ADGS1208/ADGS1209 are analog multiplexers comprisingeight single channels and four differential channels, respectively. Aserial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features, such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1208/ADGS1209devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1208/ADGS1209 can also operate in burst mode todecrease the time between SPI commands.iCMOS? construction ensures ultralow power dissipation,making the devices ideally suited for portable and batterypoweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked. The ultralow on capacitance (CON) and exceptionally low chargeinjection (QINJ) of these multiplexers make them ideal solutionsfor data acquisition and sample-and-hold applications, wherelow glitch and fast settling are required.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and Error detection capabilities allows for the use of the ADGS1208/ADGS1209 in safety critical systems.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The AD9287 is a quad, 8-bit, 100 MSPS analog-to-digital con-verter (ADC) with an on-chip sample-and-hold circuit designedfor low cost, low power, small size, and ease of use. The productoperates at a conversion rate of up to 100 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximizeflexibility and minimize system cost, such as programmableclock and data alignment and programmable digital test patterngeneration. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9287 is available in an RoHS compliant, 48-lead LFCSP. It isspecified over the industrial temperature range of ?40?C to +85?C.Product Highlights Small Footprint. Four ADCs are contained in a small, space-saving package. Low power of 133 mW/channel at 100 MSPS. Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 400 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. Pin-Compatible Family. This includes the AD9219 (10-bit), AD9228 (12-bit), and AD9259 (14-bit).ApplicationsMedical imaging and nondestructive ultrasoundPortable ultrasound and digital beam-forming systemsQuadrature radio receiversDiversity radio receiversTape drivesOptical networkingTest equipment

3-A Active Bus Termination/DDR Memory DC/DC Converter

DC847A: Demo Board for the LTC2446 24-Bit High Speed 8-Channel Delta Sigma ADCs with Selectable Multiple Reference Inputs.

The LTC3307A is a very small, high efficiency, low noise, monolithic synchronous 3A step-down DC/DC converter operating from a 2.25V to 5.5V input supply. Using constant frequency, peak current mode control at switching frequencies 1MHz to 3MHz and minimum on-time as low as 22ns, this regulator achieves fast transient response with small external components. Silent Switcher architecture minimizes EMI emissions.The LTC3307A operates in forced continuous or pulse skip mode for low noise, or low-ripple Burst Mode operation for high efficiency at light loads, ideal for battery-powered systems. The IC regulates output voltages as low as 500mV. Other features include output overvoltage protection, short-circuit protection, thermal shutdown, clock synchronization, and up to 100% duty cycle operation for low dropout. The device is available in a low profile 12-lead 2mm ? 2mm ? 0.74mm LQFN package with exposed pad for low thermal resistance.APPLICATIONS Optical Networking, Servers, Telecom Automotive, Industrial, Communications Distributed DC Power Systems (POL) FPGA, ASIC, ?P Core Supplies Battery Operated Systems

The AD9523-1 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO with two VCO dividers. The on-chip VCO tunes from 2.94 GHz to 3.1 GHz.The AD9523-1 is designed to support the clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive low phase noise requirements necessary for acceptable data converter SNR performance.The input receivers, oscillator, and zero delay receiver provide both single-ended and differential operation. When connected to a recovered system reference clock and a VCXO, the device generates 14 low noise outputs with a range of 1 MHz to 1 GHz, and one dedicated buffered output from the input PLL (PLL1). The frequency and phase of one clock output relative to another clock output can be varied by means of a divider phase select function that serves as a jitter-free, coarse timing adjustment in increments that are equal to half the period of the signal coming out of the VCO.An in-package EEPROM can be programmed through the serial interface to store user-defined register settings for power-up and chip reset.APPLICATIONS LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction (G.710) High performance wireless transceivers ATE and high performance instrumentation

Demonstration circuit 1812A-C features the LTC2943-1. The LTC2943-1 has an operating range of 3.6V to 20V making it perfectly suited for multicell battery applications. A precision analog coulomb counter integrates current measured through the internal sense resistor. The LTC2943-1 measures voltage, current and temperature with an internal 14-bit No Latency ΔΣ™ ADC. The measurements are stored in internal registers accessible via the onboard SMBus/I2C interface.

DRV8870 H-Bridge PWM Motor Driver Evaluation Module

DP159RGZEVM Evaluation Module