The AD9648 is a monolithic, dual-channel, 1.8 V supply, 14-bit, 105 MSPS/125 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Output logic levels of 1.8 V CMOS or LVDS are supported. Output data can also be multiplexed onto a single output bus.The AD9648 is available in a 64-lead RoHS compliant LFCSP and is specified over the industrial temperature range (?40?C to +85?C). Applications Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Broadband data applications Battery-powered instruments Hand held scope meters Portable medical imaging Ultrasound Radar/LIDARProduct Highlights The AD9648 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or LVDS logic families. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/data timing and offset adjustments. The AD9648 is packaged in a 64-lead RoHS compliant LFCSP that is pin compatible with the AD9650/AD9269/AD9268 16-bit ADC?s, the AD9258 14-bit ADC, the AD9628/AD9231 12-bit ADC?s, and the AD9608/AD9204 10-bit ADC?s, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.

Demonstration circuit 2707B uses the LTC®4418 to arbitrate between two input supply rails, selecting the highest priority, valid supply to power the load. The V1 rail is defined to have higher priority and the V2 rail has lower priority. Both rails have individual overvoltage and undervoltage comparators for setting valid window thresholds with external resistive dividers. If the highest priority rail voltage V1 falls out of the defined window (overvoltage or undervoltage), the V2 rail, if it is valid, is enabled and powers the load. Two or more LTC4418s can be cascaded to provide switchover between more than two rails.

DC1836A-B: Demo Board for the LTC2955 Pushbutton On/Off Controller with Automatic Turn-On.

The LTC3726 is a secondary-side controller for synchronous forward converters. When used in conjunction with the LTC3705/LTC3725 gate driver and primary-side controllers, the part creates a complete isolated power supply that combines the simplicity of OPTI-LOOP? compensation with the speed of secondary-side control.The LTC3726 has been designed to simplify the design of highly efficient, secondary-side forward converters. Working in concert with the LTC3705 or LTC 3725, the LTC3726 forms a robust, self-starting converter that eliminates the need for the separate bias regulator that is commonly used in secondary-side control applications. In addition, a proprietary scheme is used to multiplex gate drive signals and DC bias power across the isolation barrier through a single, tiny pulse transformer.The LTC3726 is available in a 16-lead SSOP package.Applications Isolated 48V Telecommunication Systems Internet Servers and Routers Distributed Power Step-Down Converters Automotive and Heavy Equipment

The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E are 3.0 V to5.5 V, IEC electrostatic discharge (ESD) protected RS-485transceivers, allowing the devices to withstand ?12 kV contactdischarges on the transceiver bus pins without latch-up ordamage. The ADM3062E/ADM3064E/ADM3066E/ADM3068Efeature a VIO logic supply pin that allows a flexible digital interfacecapable of operating as low as 1.62 V. The ADM3065E/ADM3066E/ADM3067E/ADM3068E aresuitable for high speed, 50 Mbps, bidirectional data communication on multipoint bus transmission lines. The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E feature a 1/4 unit load inputimpedance that allows up to 128 transceivers on a bus. TheADM3061E/ADM3062E/ADM3063E/ADM3064E models offerall of the same features as the ADM3065E/ADM3066E/ADM3067E/ADM3068E models at a low 500 kbps data rate thatis suitable for operation over long cable runs. The ADM3061E/ADM3062E/ADM3065E/ADM3066E are halfduplex RS-485 transceivers, fully compliant to the PROFIBUS?standard with increased 2.1 V bus differential voltage at VCC ?4.5 V. The ADM3063E/ADM3064E/ADM3067E/ADM3068Eare full duplex RS-485 transceiver options. The RS-485 transceivers are available in a number of spacesaving packages, including the 10-lead, 3 mm ? 3 mm lead framechip-scale package (LFCSP), the 8-lead or 10-lead, 3 mm ? 3 mmmini small outline package (MSOP), and the 8-lead or 14-lead,narrow body standard small outline packages (SOIC_N).Models with operating temperature ranges of ?40?C to +125?Cand ?40?C to +85?C are available. Excessive power dissipation caused by bus contention or byoutput shorting is prevented by a thermal shutdown circuit. If asignificant temperature increase is detected in the internal drivercircuitry during fault conditions, this feature forces the driveroutput into a high impedance state. The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E guarantee alogic high receiver output when the receiver inputs are shorted,open, or connected to a terminated transmission line with alldrivers disabled. Table 2 in the data sheet presents an overview of the ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E data rate capability across temperature, power supply,and package options. Refer to the Ordering Guide section formodel numbering.APPLICATIONS Industrial fieldbuses Process control Building automation PROFIBUS networks Motor control servo drives and encoders?

Demonstration circuit 2898A is a dual DC/DC converter with a 13V to 40V input voltage range, two 12V outputs at 4A each featuring the LTM4655. The LTM4655 is a EN55022B compliant 40V, dual 4A or single 8A step-down or 50W inverting DC/DC μModule® regulator. The switching frequencies of both channels are set at 1.2MHz on DC2898A. If the output voltage collapses sufficiently due to an overload or short-circuit condition, the internal oscillator will foldback to one-fifth of the LTM4655’s programmed switching frequency, protecting the power switch from damage. Key features of this board include: SSFM Jumper for Spread Spectrum Options CLKIN Inputs for External Sync PGOOD Signals for Each Output The two channels can be paralleled for higher output current. See the data sheet for more information on setting up the board for paralleling the two outputs. The LTM4655 data sheet gives a complete description of the device, its operation and application information. The data sheet must be read in conjunction with the demo manual prior to working on or modifying DC2898A.

The ADP1761 is a low noise, low dropout (LDO) linear regulator. It is designed to operate from a single input supply with an input voltage as low as 1.10 V, without the requirement of an external bias supply to increase efficiency and provide up to 1 A of output current.The low 30 mV typical dropout voltage at a 1 A load allows the ADP1761 to operate with a small headroom while maintaining regulation and providing better efficiency. The ADP1761 is optimized for stable operation with small 10 ?F ceramic output capacitors.The ADP1761 delivers optimal transient performance with minimal board area.The ADP1761 is available in fixed output voltages ranging from 0.9 V to 1.5 V. The output of the adjustable output model can be set from 0.5 V to 1.5 V through an external resistor connected between VADJ and ground.The ADP1761 has an externally programmable soft start time by connecting a capacitor to the SS pin. Short-circuit and thermal overload protection circuits prevent damage in adverse conditions. The ADP1761 is available in a small 16-lead LFCSP package for the smallest footprint solution to meet a variety of applications.APPLICATIONS Regulation to noise sensitive applications such as radio frequency (RF) transceivers, analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, phase-locked loops (PLLs), voltage controlled oscillators (VCOs) and clocking integrated circuits Field-programmable gate array (FPGA) and digital signal processor (DSP) supplies Medical and healthcare Industrial and instrumentation Automotive

The LTC3850 is a high performance dual synchronous step-down switching regulator controller that drives all N-channel power MOSFET stages. A constant-frequency current mode architecture allows a phase-lockable frequency of up to 780kHz. Power loss and supply noise are minimized by operating the two controller output stages out of phase.OPTI-LOOP? compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. The LTC3850 features a precision 0.8V reference and a power good output indicator. A wide 4V to 24V (28V maximum/30V for LTC3850I) input supply range encompasses most battery chemistries and intermediate bus voltages.Independent TK/SS pins for each controller ramp the output voltages during start-up. Current foldback limits MOSFET heat dissipation during short-circuit conditions. The MODE/PLLIN pin selects among Burst Mode? operation, pulse-skipping mode, or continuous inductor current mode and allows the IC to be synchronized to an external clock.The LTC3850 is available in low profile 28-pin 4mm ? 4mm, 4mm ? 5mm QFN and narrow SSOP packages. Features LTC3850 SSOP-28 and QFN-28 Packages LTC3850-1 ILIM function replaced with an EXTVCC function, SSOP-28 package only LTC3850-2 The LTC3850-2 is identical to the LTC3850-1 SSOP-28, except they have different pin-outs Applications Notebook and Palmtop Computers Portable Instruments Battery-Operated Digital Devices DC Power Distribution Systems

DC572A: Demo Board for the LTC1592 16-Bit SoftSpan DACs with Programmable Output Range.

The AD9083 is a 16-channel, 125 MHz bandwidth, continuous time ?-? (CTSD) ADC. The device features an on-chip, programmable, single-pole antialiasing filter and termination resistor that is designed for low power, small size, and ease of use. The 16 ADC cores features a first-order, CTSD modulator architecture with integrated, background nonlinearity correction logic and self cancelling dither. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. Each ADC has a signal processing tile to filter out of band shaped noise from the ?-? ADC and reduce the sample rate. Each tile contains a cascaded integrator comb (CIC) filter, a quadrature digital downconverter (DDC) with multiple finite input response (FIR) decimation filters (decimate by J block), or up to three quadrature DDC channels with averaging decimation filters for data gating applications. Users can configure the Subclass 1 JESD204B based, high speed serialized output in a variety of lane configurations (up to four), depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, TRIG?, and SYNCINB? input pins. The AD9083 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V capable 3-wire serial port interface (SPI). The AD9083 is available in a Pb-free, 100-ball CSP_BGA and is specified over the ?40?C to +85?C industrial temperature range.This product is protected by a US patent.APPLICATIONS Millimeter wave imaging Electronic beam forming and phased arrays Multichannel wideband receivers Electronic support measuresPRODUCT HIGHLIGHTS Continuous time, ?-? analog-to-digital converters (ADCs) support signal bandwidths of up to 125 MHz with low power and minimal filtering. Integrated digital processing blocks reduce data payload and lower overall system cost. Configurable JESD204B interface reduces printed circuit board (PCB) complexity. Flexible power-down options. SPI interface controls various product features and functions to meet specific system requirements. Small, 9 mm ? 9 mm, 100-ball CSP_BGA package, simple interface, and integrated digital processing save PCB space.