The AD91661 is a high performance, wideband, on-chip vector signal generator composed of a high speed JESD204B serializer/deserializer (SERDES) interface, a flexible 16-bit digital datapath, a inphase/quadrature (I/Q) digital-to-analog converter (DAC) core, and an integrated differential to single-ended outputbuffer amplifier, matched to a 50 ? load up to 10 GHz.The DAC core is based on a quad-switch architecture, which is configurable to increase the effective DAC core update rate of up to 12.8 GSPS from a 6.4 GHz DAC sampling clock, with an analog output bandwidth of true dc to 9.0 GHz, typically. The digital datapath includes multiple interpolation filter stages, a direct digital synthesizer (DDS) block with multiple numerically controlled oscillators (NCOs) supporting fast frequency hopping (FFH), and additional FIR85 and inverse sinc filter stages to allow flexible spectrum planning.The differential to single-ended buffer eliminates the need for a wideband balun, and supports the full analog output bandwidth of the DAC core. DC coupling the output allows baseband waveform generation without the need for external bias tees or similar circuitry, which makes the AD9166 uniquely suited for the mostdemanding high speed ultrawideband RF transmit applications. The various filter stages enable the AD9166 to be configured for lower data rates, while maintaining higher DAC clock rates to ease the filtering requirements and reduce the overall system size, weight, and power.The data interface receiver consists of up to eight JESD204B SERDES lanes, each capable of carrying up to 12.5 Gbps. To enable maximum flexibility, the receiver is fully configurable according to the data rate, number of SERDES lanes, and lane mapping required by the JESD204B transmitter.In 2? nonreturn-to-zero (NRZ) mode of operation (with FIR85 enabled), the AD9166 can reconstruct RF carriers from true dc to the edge of the third Nyquist zone, or an analog bandwidth of true dc up to 9 GHz.In mix mode, the AD9166 can reconstruct RF carriers in the second and third Nyquist zones while consuming lower power and maintaining a performance comparable to 2? NRZ mode.In baseband modes, such as return-to-zero (RZ) and 1? NRZ, the AD9166 is ideal to reconstruct RF carriers from true dc to the edge of the first Nyquist zone while consuming lower power compared to 2? NRZ mode.The quadrature DDS block can be configured as a digital upconverter to upconvert I/Q data samples to the desired location across the spectrum, in all three Nyquist zones.The DDS also consists of a bank of 32 numerically controlled oscillators (NCOs), each with its own 32-bit phase accumulator. When combined with a 100 MHz serial peripheral interface (SPI), the DDS allows a phase coherent FFH, with a phase settling time as low as 300 ns.The AD9166 is configured using a common SPI interface that monitors the status of all registers. The AD9166 is offered in a 324-ball, 15 mm ? 15 mm, 0.8 mm pitch BGA_ED package.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 9 GHz. Fully supports zero IF and other dc-coupled applications. Up to an eight-lane JESD204B SERDES interface, with various features to allow flexibility when interfacing to a JESD204B transmitter.Applications Instrumentation: automated test equipment, electronic test and measurement, arbitrary waveform generators Electronic warfare: radars, jammers Broadband communications systems Local oscillator drivers1 Protected by U.S. Patents 6,842,132 and 7,796,971.

The AD9520-2 provides a multioutput clock distributionfunction with subpicosecond jitter performance, along with anon-chip PLL and VCO. The on-chip VCO tunes from 2.02 GHzto 2.335 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHzcan also be used.The AD9520-2 serial interface supports both SPI and I2C?ports.An in-package EEPROM, which can be programmed through theserial interface, can store user-defined register settings forpower-up and chip reset.The AD9520-2 features 12 LVPECL outputs in four groups. Anyof the 1.6 GHz LVPECL outputs can be reconfigured as two250 MHz CMOS outputs. If an application requires LVDSdrivers instead of LVPECL drivers, refer to the AD9522-2.Each group of three outputs has a divider that allows both thedivide ratio (from 1 to 32) and the phase offset or coarse timedelay to be set.The AD9520-2 is available in a 64-lead LFCSP and can be operatedfrom a single 3.3 V supply. The external VCO can have anoperating voltage of up to 5.5 V. A separate output driver powersupply can be from 2.375 V to 3.465 V.The AD9520-2 is specified for operation over the standardindustrial range of ?40?C to +85?C.Applications Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10GFC, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation Broadband infrastructures

The ADA4945-1 is a low noise, low distortion, fully differential amplifier with two selectable power modes. The device operates over a broad power supply range of 3 V to 10 V. The low dc offset, dc offset drift, and excellent dynamic performance of the ADA4945-1 makes it well suited for a variety of data acquisition and signal processing applications. The device is an ideal choice for driving high resolution, high performance successive approximation register (SAR) and ?-? analog-to-digital converters (ADCs) on 4 mA of quiescent current (full power mode). The device can also be selected to operate on 1.4 mA of quiescent current (low power mode) to scale the power consumption to the desired performance necessary for an ADC drive application. The adjustable common-mode voltage allows the ADA4945-1 to match the input common-mode voltage of multiple ADCs. The internal common-mode feedback loop provides exceptional output balance, as well as suppression of even order harmonic distortion products.With the ADA4945-1, differential gain configurations are achieved with a simple external feedback network of four resistors determining the closed-loop gain of the amplifier. The ADA4945-1 is fabricated using Analog Devices, Inc., proprietary, silicon germanium (SiGe), complementary bipolar process, enabling the device to achieve low levels of distortion with an input voltage noise of only 1.8 nV/?Hz (full power mode).The ADA4945-1 is available in a RoHS-complaint, 3 mm ? 3 mm, 16-lead LFCSP. The ADA4945-1 is specified to operate from ?40?C to +125?C.Applications Low power ?-?, PulSAR?, and SAR ADC drivers Single-ended to differential converters Differential buffers Medical imaging Process control Portable electronics

The HMC1035LP6GE is a low-noise, wide-band 3.3 V clock generator IC with a fractional-N Phase Locked Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between 25 MHz and 2500 MHz range. The HMC1035LP6GE features a low noise Phase Detector (PD) and Delta-Sigma modulator, capable of operating at up to 100 MHz which permits wider loop-bandwidths and excellent spurious performance.The HMC1035LP6GE features industry leading phase noise and jitter performance, across the operating range, that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior noise floor (<-162 dBc/Hz) makes the HMC1035LP6GE an ideal source for a variety of applications?such as clock references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SER DES) circuits, FPGAs and processors. The HMC1035LP6GE can also be used as an LO for 10G/40G/100G optical modules and transponders, as well as primary reference clock for 10G/40G/100G line cards, and for jitter attenuation and frequency translation.The differential output of the HMC1035LP6GE can be set to either External Termination, which could be used for LVPECL operation, or Internal Termination for operation in an LVDS compatible mode or LVPECL. Additionally, an ouput swing adjustment makes the device flexible and compatible with a wide variety of signal level requirements. The output can be internally terminated to reduce component count and cost or could be terminated externally using standard LVPECL termination methods. An Output Mute function allows the user to shut off the outputs, such as may be required for board testing or debugging. The LVPECL/LVDS, amplitude select and Output Mute function are all programmed SPI serial programming.The HMC1035LP6GE is designed to select between a Power Priority or a Performance Priority mode. The Power Priority setting reduces the current consumption of the part, whereas the Performance Priority setting improves the Jitter and Phase Noise performance.The 24 bit Delta-Sigma Modulator further enhances Hittite?s Exact Frequency Mode, which enables users to generate output frequencies with 0 Hz frequency error in many applications.APPLICATIONS 10G/40G/100G Optical Modules, Transponders, Line Cards OTN and SONET /SDH Applications Data Converters, Sample Clock Generation Cellular/4G Infrastructure High Frequency Processor/FPGA Clocks Any Frequency Clock Rate Generation Low Jitter SAW Oscillator Replacement DDS Replacement Frequency Translation Frequency Margining

The ADIN1200 is a low power, single-port, 10 Mbps and 100 Mbps Ethernet transceiver with low latency specifications designedfor industrial Ethernet applications.This design integrates an energy efficient Ethernet (EEE) physical layer device (PHY) core with all associated common analog circuitry, input and output clock buffering, management interface and subsystem registers, and media access control (MAC) interface and control logic to manage the reset, clock control and pin configuration.The ADIN1200 is available in a 5 mm ? 5 mm, 32-lead leadframe chip scale package (LFCSP) and can operate with a single3.3 V supply, assuming the use of a 3.3 V MAC interface supply.For maximum flexibility in system level design, a separate VDDIOsupply enables the management data input/output (MDIO) andMAC interface supply voltages to be configured independentlyof the other circuitry on the ADIN1200 allowing operation at1.8 V, 2.5 V, or 3.3 V. At power-up, the ADIN1200 is held inhardware reset until each of the supplies has crossed its minimumrising threshold value and the power is considered good. Brownoutprotection is provided by monitoring the supplies to detect ifone or more of them drops below a minimum falling thresholdand holding the device in hardware reset until the power suppliesreturn and satisfy the power-on-reset (POR) circuit.The MII management interface (also referred to as MDIOinterface) provides a 2-wire serial interface between a hostprocessor or MAC and the ADIN1200, allowing access tocontrol and status information in the PHY core managementregisters. The interface is compatible with both IEEE? 802.3?Standard Clause 22 and Clause 45 management framestructures.The ADIN1200 can support cable lengths up to 180 meters.Note that throughout this data sheet, multifunction pins, such as XTAL_I/CLK_IN/REF_CLK, are referred to either by the entire pin name or by a single function of the pin, for example, XTAL_I, when only that function is relevant.Applications Industrial automation Process control Factory automation Robotics and motion Control Building automation Test and Measurement Industrial internet of things (IoT)

The AD5334/AD5335/AD5336/AD5344 are quad 8-,10-,and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 ?A at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive the output to both supply rails.PRODUCT HIGHLIGHTS Available in a 28-lead TSSOP package Low power, single supply operation from 2.5 V to 5.5 V supply Consumes 1.5 mW at 3 V and 3 mW at 5 V On-chip ouput buffer can drive output to both supply rails

The LTC2952 is a power management device that features three main functions: pushbutton on/off control of system power, ideal diode PowerPath? controllers and system monitoring. The LTC2952?s pushbutton input, which provides on/off control of system power, has independently adjustable ON and OFF debounce times. A simple microprocessor interface involving an interrupt signal allows for proper system housekeeping prior to power-down. The ideal diode PowerPath controllers provide automatic low loss switchover between two DC sources by regulating two external P-channel MOSFETs to have a small 20mV forward drop. High reliability systems may utilize the LTC2952?s monitoring features to ensure system integrity. These features include: power-fail, voltage monitoring and ?P watchdog. The LTC2952 operates over a wide operating voltage range to accommodate a large variety of input power supplies. The part?s combination of low 20mV external MOSFET regulation and very low standby current matches battery powered and power conscious application requirements.Applications Desktop and Notebook Computers Portable Instrumentations Cell Phones, PDA and Handheld Computers Servers and Computer Peripherals Battery Backup Systems

The AD5162 provides a compact 3 mm נ4.9 mm packaged solution for dual 256 position adjustment applications. This device performs the same electronic adjustment function as a 3-terminal mechanical potentiometer.Available in four different end-to-end resistance values (2.5 k?, 10 k?, 50 k?, 100 k?), this low temperature coefficient device is ideal for high accuracy and stability-variable resistance adjustments.The wiper settings are controllable through the SPI compatible digital interface. The resistance between the wiper and either end point of the fixed resistor varies linearly with respect to the digital code transferred into the RDAC latch.Operating from a 2.7 V to 5.5 V power supply and consuming less than 6 ?A allows the AD5162 to be used in portable battery-operated applications.For applications that program the AD5162 at the factory, Analog Devices offers device programming software running on Windows? NT/2000/XP operating systems. This software effectively replaces the need for external SPI controllers, which in turn enhances the time to market of systems. An AD5162 evaluation kit and software are available. The kit includes a cable and instruction manual.APPLICATIONS Systems calibrations Electronics level settings Mechanical trimmers replacement in new designs Permanent factory PCB setting Transducer adjustment of pressure, temperature, position, chemical, and optical sensors RF amplifier biasing Automotive electronics adjustment Gain control and offset adjustment

The ADM2795E is a 5 kV rms signal isolated RS-485 transceiver that features up to ?42 V of ac/dc peak bus overvoltage fault protection on the RS-485 bus pins. The device integrates Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, RS-485transceiver, and IEC electromagnetic compatibility (EMC) transient protection in a single package. The ADM2795E is aRS-485/RS-422 transceiver that integrates IEC 61000-4-5 Level 4surge protection, allowing up to ?4 kV protection on the RS-485bus pins (A and B). The device has IEC 61000-4-4 Level 4 EFTprotection up to ?2 kV and IEC 61000-4-2 Level 4 ESD protection on the bus pins, allowing this device to withstand up to ?15 kV on the transceiver interface pins without latching up. This device has an extended common-mode input range of ?25 V to improve data communication reliability in noisy environments. TheADM2795E is capable of operating over wide power supply ranges, with a 1.7 V to 5.5 V VDD1 power supply range, allowing interfacing to low voltage logic supplies. The ADM2795E is also fully TIA/EIA RS-485/RS-422 compliant when operated over a3 V to 5.5 V VDD2 power supply. The device is fully characterizedover an extended operating temperature range of ?40?C to +125?C,and is available in a 16-lead, wide-body SOIC package.Applications Heating, ventilation, and air conditioning (HVAC) networks Industrial field buses Building automation Utility networks

DC748A: Demo Board for the High Accuracy 3GHz Log RF Detector Has 60dB Dynamic Range.