The LT3753 is a current mode PWM controller optimized for an active clamp forward converter topology, allowing up to 100V input operation.A programmable volt-second clamp allows primary switch duty cycles above 50% for high switch, transformer and rectifier utilization. Active clamp control reduces switch voltage stress and increases efficiency. A synchronous output is available for controlling secondary side synchronous rectification.The LT3753 is available in a 38-lead plastic TSSOP package with missing pins for high voltage spacings.Applications Industrial, Automotive and Military Systems 48V Telecommunication Isolated Power Supplies

The LTC7124 is a dual channel, 3.5A per output, high efficiency monolithic step-down regulator capable of operating from input supplies up to 17V. The programmable switching frequency ranges from 500kHz to 4MHz with a ?25% external clock synchronization capability around the programmed frequency. The regulator features ultralow quiescent current for high efficiency over a wide VOUT range.The step-down regulator operates from an input voltage range of 3.1V to 17V and provides an adjustable output range from 0.6V to 99% of VIN while delivering up to 3.5A of output current per channel. A user selectable mode input is provided to allow the user to trade off output ripple for light load efficiency; Burst Mode? operation provides the highest efficiency at light loads, while forced continuous operation provides the lowest output ripple. The LTC7124 includes spread spectrum modulation for low radiated and conductive noise. The LTC7124 is offered in a thermally enhanced, low profile 24-lead 3mm ? 5mm QFN package.Applications Battery Powered Systems Point-of-Load Supplies Portable Instruments Handheld Scanners

Demonstration circuit DC2343A is a complete system level solution for a nanopower buck-boost DC/DC with integrated coulomb counter. The DC2343A contains a PIC16F1459 embedded processor for communication to the PC over USB and the LTC3335 via its I2C port. The GUI is capable of reading and writing all the control registers on the LTC3335 as well as displaying and resetting all its alarm registers. The firmware and software for the embedded system and the GUI are available at the LTC3335 solutions page. The DC2343A uses two analog-to-digital converter channels to sample the battery and output voltages. The voltage samples improve the functionality of the GUI, and allow optimal software correction to the measured coulombs. By adding the software correction the first order known errors are compensated for over the operating range and the resultant coulomb count is accurate to within 3%.

The LT8391 is a synchronous 4-switch buck-boost LED controller that regulates LED current from input voltage above, below, or equal to the output voltage. The proprietary peak-buck peak-boost current mode control scheme allows adjustable and synchronizable 150kHz to 650kHz fixed frequency operation, or internal ?15% triangle spread spectrum operation for low EMI. With 4V to 60V input, 0V to 60V output, and seamless low noise transitions between operation regions, the LT8391 is ideal for LED driver and battery charger applications in automotive, industrial, and battery-powered systems.The LT8391 provides both internal (up to 128:1) and external (up to 2000:1) LED current PWM dimming with a high-side PMOS switch. Two CTRL pins provide flexible 20:1 analog dimming with ?3% LED current accuracy at 100mV full scale. Fault protection is provided to detect an open or short LED condition, during which the LT8391 retries, latches off, or keeps running. Switching Frequency Max Output Power LT8391 Adjustable 150kHz - 650kHz 450W+ LT8391A 2MHz 50W+ APPLICATIONS Automotive Head Lamps/Running Lamps High Power LED Lighting

Demonstration circuit 2350B features the LTC6813-1, 18-channel battery-stack monitor. Multiple boards can be linked through a 2-wire isolated serial interface (isoSPI™) to monitor a long series of cells in a stack. The DC2350B demo board also features reversible isoSPI enabling a redundant communication path. The PCB, components, and DuraClik connectors are optimized for low EMI susceptibility and emissions. The DC2350B can communicate to a PC by connecting a DC2792B dual master isoSPI together with DC2026C Linduino® One. The DC2026 must be loaded with the appropriate program (called a sketch) to control the battery-stack monitor IC and receive data through a USB serial port. The DC2026 provides a standard SPI interface which can be translated to isoSPI and then connected to a DC2350B isoSPI port (J4 or J5 connector). The DC2792B companion board provides two SPI-isoSPI channels for reversible operation.

The LTC2873 is a robust pin-configurable multiprotocol transceiver that supports RS232, RS485, and RS422 protocols while operating on a single 3V to 5.5V supply. The LTC2873 can be configured as a half-duplex RS485 transceiver or as an RS232 transceiver using the same two bus pins.A pin-controlled integrated termination resistor allows for easy interface reconfiguration, eliminating external resistors and control relays. Loopback mode steers the driver inputs to the receiver outputs for diagnostic self-test. The RS485 receiver supports up to 256 nodes per bus, and features full failsafe operation for floating, shorted or terminated inputs.An integrated DC/DC boost converter uses a tiny 2mm ? 1.6mm inductor and one capacitor, eliminating the need for multiple supplies when driving RS232 levels.Applications Software Selectable RS232/RS485/RS422 Interface Industrial Sensors and Actuators Alarm Systems Traffic Control and Monitoring Highway Signs and Jumbo Displays

Demonstration circuit 2365A highlights the LTC2358 family of buffered input ADCs. The LTC2358/LTC2357/LTC2353/LTC2333 are low noise, high speed, 16-/18- bit successive approximation register (SAR) ADCs with integrated front end buffers. These ADCs accept a wide common mode range. Pico-amp inputs and high CMRR enable these ADCs to connect directly to a wide range of sensors without compromising measurement accuracy. The following text refers to the LTC2358-18 but applies to all parts in the family, the only differences being the number of bits, number of channels and the maximum sample rate. The LTC2358-18 has a flexible SoftSpan™ interface that allows conversion-by-conversion control of the input voltage span on a per-channel basis. An internal 2.048V reference and 2X buffer simplify basic operation while an external reference can be used to increase the input range and the SNR of the ADC.

Demonstration circuit 2365A highlights the LTC2358 family of buffered input ADCs. The LTC2358/LTC2357/LTC2353/LTC2333 are low noise, high speed, 16-/18-bit successive approximation register (SAR) ADCs with integrated front end buffers. These ADCs accept a wide common mode range. Pico-amp inputs and high CMRR enable these ADCs to connect directly to a wide range of sensors without compromising measurement accuracy. The demo manual refers to the LTC2358-18 but applies to all parts in the family, the only differences being the number of bits, number of channels and the maximum sample rate. The LTC2358-18 has a flexible SoftSpan™ interface that allows conversion-by-conversion control of the input voltage span on a per-channel basis. An internal 2.048V reference and 2X buffer simplify basic operation while an external reference can be used to increase the input range and the SNR of the ADC.

The AD9559 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9559 generates an output clock synchronized to up to four external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9559 continuously generates a low jitter output clock even when all reference inputs have failed.The AD9559 operates over an industrial temperature range of ?40?C to +85?C. If a single DPLL version of this part is needed, refer to the AD9557.APPLICATIONS Network synchronization, including Synchronous Ethernet and OTN mapping/de-mapping Cleanup of reference clock jitter SONET/SDH clocks up to OC-192, including FEC Stratum 3 holdover, jitter cleanup, and phase transient control Wireless base station controllers Cable infrastructure Data communications

The AD9609 is a monolithic, single channel 1.8 V supply, 10-bit,20/40/65/80 MSPS analog-to-digital converter (ADC). It featuresa high performance sample-and-hold circuit and on-chip voltagereference.The product uses multistage differential pipeline architecturewith output error correction logic to provide 10-bit accuracy at80 MSPS data rates and to guarantee no missing codes over thefull operating temperature range.The ADC contains several features designed to maximize flexibilityand minimize system cost, such as programmable clock and dataalignment and programmable digital test pattern generation. Theavailable digital test patterns include built-in deterministic andpseudorandom patterns, along with custom user-defined testpatterns entered via the serial port interface (SPI).A differential clock input with selectable internal 1 to 8 divide ratiocontrols all internal conversion cycles. An optional duty cyclestabilizer (DCS) compensates for wide variations in the clock dutycycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, gray code, ortwos complement format. A data output clock (DCO) is providedto ensure proper latch timing with receiving logic. Both 1.8 V and3.3 V CMOS levels are supported.The AD9609 is available in a 32-lead RoHS-compliant LFCSPand is specified over the industrial temperature range (?40?Cto +85?C).APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA Smart antenna systems Battery-powered instruments Handheld scope meters Portable medical imaging Ultrasound Radar/LIDAR PET/SPECT imagingPRODUCT HIGHLIGHTS1. The AD9609 operates from a single 1.8 V analog powersupply and features a separate digital output driver supplyto accommodate 1.8 V to 3.3 V logic families.2. The sample-and-hold circuit maintains excellent performancefor input frequencies up to 200 MHz and is designed for lowcost, low power, and ease of use.3. A standard serial port interface supports various productfeatures and functions, such as data output formatting,internal clock divider, power-down, DCO and data output(D9 to D0) timing and offset adjustments, and voltagereference modes.4. The AD9609 is packaged in a 32-lead RoHS compliantLFCSP that is pin compatible with the AD9629 12-bit ADCand the AD9649 14-bit ADC, enabling a simple migrationpath between 10-bit and 14-bit converters sampling from20 MSPS to 80 MSPS.