LM25011 Wide Vin Switching Regulator Evaluation Module

The ADM2582E / ADM2587E are fully integrated signal and power isolated data transceivers with ?15 kV ESD protection and are suitable for high speed communication on multipoint transmission lines. The ADM2582E / ADM2587E include an integrated isolated dc-to-dc power supply, which eliminates the need for an external dc-to-dc isolation block.They are designed for balanced transmission lines and comply with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E).The devices integrate Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, a three-state differential line driver, a differential input receiver, and Analog Devices isoPower dc-to-dc converter into a single package. The devices are powered by a single 5 V or 3.3 V supply, realizing a fully integrated signal and power isolated RS-485 solution.The ADM2582E / ADM2587E driver has an active high enable. An active low receiver enable is also provided that causes the receiver output to enter a high impedance state when disabled.The devices have current limiting and thermal shutdown features to protect against output short circuits and situations where bus contention may cause excessive power dissipation. The parts are fully specified over the industrial temperature range and are available in a highly integrated, 20-lead, wide-body SOIC package.The ADM2582E / ADM2587E contain isoPower technology that uses high frequency switching elements to transfer power through the transformer. Special care must be taken during printed circuit board (PCB) layout to meet emissions standards. Refer to Application Note AN-0971, Control of Radiated Emissions with isoPower Devices, for details on board layout considerations.APPLICATIONSIsolated RS-485/RS-422 interfacesIndustrial field networksMultipoint data transmission systems

The LTC2310-12 is a low noise, high speed 12-bit + sign successive approximation register (SAR) ADC with differential inputs and wide input common mode range. Operating from a single 3.3V or 5V supply, the LTC2310-12 has an 8VP-P differential input range, making it ideal for applications which require a wide dynamic range with high common mode rejection. The LTC2310-12 achieves ?1LSB INL guaranteed, no missing codes at 12 bits and 73dB SNR typical.The LTC2310-12 has an onboard low drift (20ppm/?C max) 2.048V or 4.096V temperature-compensated reference and provides an external 1.25V buffered reference input. The LTC2310-12 also has a high speed SPI-compatible serial interface that supports CMOS or LVDS. The fast 2Msps throughput with no cycle latency makes the LTC2310-12 ideally suited for a wide variety of high speed applications. The LTC2310-12 dissipates only 35mW with a 5V supply and offers nap and sleep modes to reduce the power consumption for further power savings during inactive periods.Applications High Speed Data Acquisition Systems Communications Remote Data Acquisition Imaging Optical Networking Automotive Multiphase Motor Control

The ADAU1442 / ADAU1445?/ ADAU1446?are enhanced audio processors that allow full flexibility in routing all input and output signals. The SigmaDSP? core features full 28-bit processing (56-bit in double-precision mode), synchronous parameter loading for ensuring filter stability, and 100% code efficiency with the SigmaStudio? tools. This DSP allows system designers to compensate for the real-world limitations of speakers, amplifiers, and listening environments, resulting in a dramatic improvement of the perceived audio quality through speaker equalization, multiband compression, limiting, and third-party branded algorithms.The flexible audio routing matrix (FARM) allows the user to multiplex inputs from multiple sources running at various sample rates to or from the SigmaDSP core. This drastically reduces the complexity of signal routing and clocking issues in the audio system. FARM includes up to eight stereo asynchronous sample rate converters (depending on the device model), Sony/ Philips Digital Interconnect Format (S/PDIF) input and output, and serial (I2S) and time division multiplexing (TDM) I/Os. Any of these inputs can be routed to the SigmaDSP core or to any of the asynchronous sample rate converters (ASRCs). Similarly, any one of the output signals can be taken from the SigmaDSP core or from any of the ASRC outputs. This routing scheme, which can be modified at any time via control registers, allows for maximum system flexibility.The ADAU1442, ADAU1445, and ADAU1446 differ only in ASRC functionality and packaging. The ADAU1442 / ADAU1445 contain 16 channels of ASRCs and are packaged in TQFP packages, whereas the ADAU1446 contains no ASRCs and is packaged in an LQFP. The ADAU1442 can handle nine clock domains, the ADAU1445 can handle three clock domains, and the ADAU1446 can handle one clock domain.The ADAU1442 / ADAU1445 / ADAU1446?can be controlled in one of two operational modes: the settings of the chip can be loaded and dynamically updated through the SPI/I2C? port, or the DSP can self-boot from an external EEPROM in a system with no microcontroller. There is also a bank of multipurpose (MP) pins that can be used as general-purpose digital I/Os or as inputs to the 4-channel auxiliary control ADC.The ADAU1442 / ADAU1445 / ADAU1446?are supported by the SigmaStudio graphical development environment. This software includes audio processing blocks such as FIR and IIR filters, dynamics processors, mixers, low level DSP functions, and third-party algorithms for fast development of custom signal flows.APPLICATIONS Automotive audio processing Head units Navigation systems Rear-seat entertainment systems DSP amplifiers (sound system amplifiers) Commercial audio processing

Power Line Communications Kit for ARIB Frequency Band

2.5A, Singe Input, Single Cell Switchmode Li-Ion Battery Charger Evaluation Module

Dual Input, Far Field Noise Suppression Microphone Amplifier

Bluetooth and MSP430 Audio Source Reference Design Board

The AD9689 is a dual, 14-bit, 2.0 GSPS/2.6 GSPS analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of direct sampling wide bandwidth analog signals of up to 5 GHz. The ?3 dB bandwidth of the ADC input is 9 GHz. The AD9689 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. The ADC data outputs are internally connected to four digital downconverters (DDCs) through a crossbar mux. Each DDC consists of multiple cascaded signal processing stages: a 48-bit frequency translator (numerically controlled oscillator (NCO)), and decimation rates. The NCO has the option to select preset bands over the general-purpose input/output (GPIO) pins, which enables the selection of up to three bands. Operation of the AD9689 between the DDC modes is selectable via SPI-programmable profiles.In addition to the DDC blocks, the AD9689 has several functions that simplify the automatic gain control (AGC) function in a communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect control bits in Register 0x0245 of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9689 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.The user can configure the Subclasss 1 JESD204B-based high speed serialized output in a variety of one-lane, two-lane, four-lane, and eight-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multidevice synchronization is supported through the SYSREF? and SYNCINB? input pins.The AD9689 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 3-wire serial port interface (SPI).The AD9689 is available in a Pb-free, 196-ball BGA, specified over the ?40?C to +85?C ambient temperature range. This product is protected by a U.S. patent.Note that throughout this data sheet, multifunction pins, such as FD_A/GPIO_A0, are referred to either by the entire pin name or by a single function of the pin, for example, FD_A, when only that function is relevant.Product Highlights Wide, input ?3 dB bandwidth of 9 GHz supports direct radio frequency (RF) sampling of signals up to about 5 GHz. Four integrated, wideband decimation filters and NCO blocks supporting multiband receivers. Fast NCO switching enabled through the GPIO pins. SPI controls various product features and functions to meet specific system requirements. Programmable fast overrange detection and signal monitoring. On-chip temperature diode for system thermal management. 12 mm ? 12 mm, 196-ball BGA. Pin, package, feature, and memory map compatible with the AD9208 14-bit, 3.0 GSPS, JESD204B dual ADC.Applications Diversity multiband and multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, and GSM, LTE, LTE-A Electronic test and measurement systems Phased array radar and electronic warfare DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

TPS65400EVM Evaluation Module