DC610A Demo Board for: LTC1693 High Speed Single/Dual N-Channel MOSFET Drivers LT3804 Secondary Side Dual Output Controller with Opto Driver LT3781 Bootstrap Start Dual Transistor Synchronous Forward Controller

Demonstration circuit 621 is a 1.25MHz triple DC/DC switching converter using the LT1941. The LT1941 has two step-down converters and a third boost/inverting converter that can also be configured as a SEPIC or Cuk (inverting). The LT1941 has a wide 3.5V to 25V input voltage range; the demo board limits this range from 4.7V to 14V and is configured to provide 1.8V @ 2.4A, 3.3V @ 1.4A and –12V @ up to 550mA (depending on VIN).

DC623A: Demo Board for the LTC3801 Micropower Constant Frequency Step-Down DC/DC Controllers in ThinSOT.

The LT3469 is a transconductance (gm) amplifier that can drive outputs up to 33V from a 5V or 12V supply. An internal switching regulator generates a boosted supply voltage for the gm amplifier. The amplifier can drive capacitive loads in the range of 5nF to 300nF. Slew rate is limited only by the maximum output current. The 35V output voltage capability of the switching regulator, along with the high supply voltage of the amplifier, combine to allow the wide output voltage range needed to drive a piezoceramic microactuator.The LT3469 switching regulator switches at 1.3MHz, allowing the use of tiny external components. The output capacitor can be as small as 0.22?F, saving space and cost versus alternative solutions.The LT3469 is available in a low profile ThinSOT? package.Applications Piezo Speakers Piezo Microactuators Varactor Bias

The LTC3202 is a low noise, constant frequency charge pump DC/DC converter that uses fractional conversion to increase efficiency in white LED applications. The part can be used to produce a regulated voltage or current of up to 125mA from a 2.7V to 4.5V input. Low external parts count (two flying capacitors and two small bypass capacitors at VIN and VOUT) make the LTC3202 ideally suited for small, battery-powered applications.An internal 2-bit DAC allows LED current to be adjusted for LED brightness control. The LTC3202 also has thermal shutdown protection and can survive a continuous short-circuit from VOUT to GND. Built-in soft-start circuitry prevents excessive inrush current during start-up. High switching frequency enables the use of small external capacitors. A low current shutdown feature disconnects the load from VIN and reduces quiescent current to less than 1?A.The LTC3202 is available in the 10-pin MSOP and 3mm x 3mm DFN packages.Applications White LED Backlighting Programmable Boost Current Source?

The EV-ADE9153ASHIELDZ is an Arduino shield compatible with Arduino Uno, Arduino Zero, or ESP8266. The shield has an on-board shunt resistor for line current measurement and enables quick evaluation and prototyping of energy measurement systems that use the ADE9153A. Arduino library and application examples are provided on the ADE9153A product page to simplify implementation of larger systems. Using mSure® autocalibration, the shield can be calibrated to measure energy with 1% accuracy over the dynamic range without the need for expensive calibration equipment.

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4153A is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. A sigma-delta (?-?) based fractional interpolator allows programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A simple 3-wire interface controls all on-chip registers. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.Applications CATV equipment Base stations for mobile radio (GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA, W-CDMA) Wireless handsets (GSM, PCS, DCS, CDMA, W-CDMA) Wireless LANs, PMR Communications test equipment

The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture isspecifically designed to meet the GSM/EDGE lock time requirements for base stations, and the fast settling feature makes theADF4196 suitable for pulse Doppler radar applications.The ADF4196 consists of a low noise, digital phase frequency detector (PFD) and a precision differential charge pump. A differential amplifier converts the differential charge pump output to a single-ended voltage for the external voltage controlled oscillator (VCO). The sigma-delta (?-?) based fractional interpolator, working with the N divider, allows programmable modulus fractional-N division. Additionally, the 4-bit reference (R) counter and on-chip frequency doubler allow selectable reference signal (REFIN) frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a VCO. The switching architecture ensures that the PLL settles within the GSM time slot guard period, removing the need for a second PLL and associated isolation switches. This decreases the cost, complexity, PCB area, shielding, and characterization found on previous ping-pong GSM PLL architectures.Applications GSM/EDGE base stations PHS base stations Pulsed Doppler radar Instrumentation and test equipment Beam-forming/phased array systems

The ADF4355 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference frequency. A series of frequency dividers permits operation from 54 MHz to 6800 MHz.The ADF4355 has an integrated VCO with a fundamental output frequency ranging from 3400 MHz to 6800 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate radio frequency (RF) output frequencies as low as 54 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin and software controllable.Control of all on-chip registers is through a simple 3-wire interface. The ADF4355 operates with analog and digital power supplies ranging from 3.15 V to 3.45 V, with charge pump and VCO supplies from 4.75 V to 5.25 V. The ADF4355 also contains hardware and software power-down modes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation