DC1620A-K: Demo Board for LTC2141-14 14-Bit, 40Msps Low Power Dual ADCs.

DC1620A-O: Demo Board for LTC2143-12 12-Bit, 80Msps Low Power Dual ADCs.

DC1620A-Q: Demo Board for LTC2141-12 12-Bit, 40Msps Low Power Dual ADCs.

DC1620A-S: Demo Board for LTC2188 16-Bit, 20Msps Low Power Dual ADC.

The LTC4227 offers ideal diode-OR and Hot Swap? functions for two power rails by controlling external Nchannel MOSFETs. MOSFETs acting as ideal diodes replace two high power Schottky diodes and the associated heat sinks, saving power and board area. A Hot Swap control MOSFET allows a board to be safely inserted and removed from a live backplane by limiting inrush current. The supply output is also protected against short-circuit faults with a fast acting current limit and internal timed circuit breaker.The LTC4227 regulates the forward voltage drop across the MOSFETs to ensure smooth current transfer from one supply to the other without oscillation. The ideal diodes turn on quickly to reduce the load voltage droop during supply switchover. If the input supply fails or is shorted, a fast turn-off minimizes reverse-current transients.The LTC4227 allows turn-on/off control, and reports fault and power good status for the supply. Part Overcurrent Fault Start-Up Delay LTC4227-1 Latch Off 100ms LTC4227-2 Retry 100ms LTC4227-3 Latch Off 1.6ms LTC4227-4 Retry 1.6ms Applications Redundant Power Supplies and Supply Holdup Computer Systems and Servers Telecom Networks

The LTC3838 is a dual, PolyPhase? synchronous step-down DC/DC switching regulator controller. Two independent channels drive all N-channel power MOSFETs. The controlled on-time, valley current mode control architecture allows for fast transient response and constant frequency switching in steady-state operation, independent of VIN, VOUT and load current. Its load-release transient detection feature significantly reduces overshoot at low output voltages.Differential output voltage sensing, along with a precision internal reference, offers an accurate ?0.67% output regulation on Channel 1, even if the remote output ground deviates from local ground by ?500mV. The second channel can either provide an independent ?1% output, or together with the first channel of this controller, serve as one of the PolyPhase channels for a single-output voltage.The switching frequency can be programmed from 200kHz to 2MHz with an external resistor, and can be synchronized to an external clock. Very low tON and tOFF times allow for near 0% and near 100% duty cycles, respectively. Voltage tracking soft start-up and multiple safety features are provided.See below for a comparison of LTC3838, LTC3838-1 and LTC3838-2. Part Number Description LTC3838 ? ?0.67% Differential Output Voltage Accuracy Over Temperature on Channel 1, ?1% Output Regulation on Channel 2, Separate Per Channel 30mV to 100mV Current Sense Range Controls LTC3838-1 ? ?0.67% Differential Output Voltage Accuracy Over Temperature on Both Channel 1 and Channel 2, Single Pin 30mV/60mV Current Sense Range Controls LTC3838-2 ?0.67% Differential Output Voltage Accuracy With Internal Reference on Channel 1, ?4mV Differential with External Reference Voltage on Channel 2, Fixed 30mV Current Sense Range Applications Distributed Power Systems Point-of-Load Converters Computing Systems Data Communication Systems

Demonstration circuit DC1641 is DC/DC boost converter featuring the LTC3786 constant frequency current mode boost controller. The DC1641A operates over 5V to 24V input and provides over 5A at 6V input voltage and over 9A of output current at 10V input as shown in figure 3. The 350kHz constant frequency operation results in small and efficient circuit. The converter provides high output voltage accuracy (typically ±3%) over wide load range with no minimum load requirement. The demonstration circuit can be easily modified to generate different output voltages.

Demonstration circuit 1643A is an isolated flyback converter featuring LT3575, a monolithic switching regulator specifically designed for the isolated flyback converter with an integrated 2.5A, 60V NPN transistor. The DC1643A is designed for 5V output from a 10V to 28V DC input. The output current capability depends on the input voltage, proper cooling, and the switch voltage stress. The output current is up to 1.4A when the input is higher than 10V, and 2A when the input is higher than 20V but less than 28V. The output current should not be higher than 2.4A for safe operation.

Demonstration circuits 1645A-A, 1645A-B, 1645A-C and 1645A-D feature the LTM8061, a 32V, 2A μModule® Li-Ion battery charger. Operating from a 6.5V to 32V input source, the 1645A-A and 1645A-B demo circuits charge single cell Li-Ion batteries to float voltages of 4.1V or 4.2V respectively. The 1645A-C and 1645A-D demo circuits operate from a 12V to 32V input source, and charge dual cell Li-Ion battery packs to float voltages of 8.2V or 8.4V. JP1 turns the converter on or off. JP2 allows for easy selection of C/10 or timer charge termination.

The AD91661 is a high performance, wideband, on-chip vector signal generator composed of a high speed JESD204B serializer/deserializer (SERDES) interface, a flexible 16-bit digital datapath, a inphase/quadrature (I/Q) digital-to-analog converter (DAC) core, and an integrated differential to single-ended outputbuffer amplifier, matched to a 50 ? load up to 10 GHz.The DAC core is based on a quad-switch architecture, which is configurable to increase the effective DAC core update rate of up to 12.8 GSPS from a 6.4 GHz DAC sampling clock, with an analog output bandwidth of true dc to 9.0 GHz, typically. The digital datapath includes multiple interpolation filter stages, a direct digital synthesizer (DDS) block with multiple numerically controlled oscillators (NCOs) supporting fast frequency hopping (FFH), and additional FIR85 and inverse sinc filter stages to allow flexible spectrum planning.The differential to single-ended buffer eliminates the need for a wideband balun, and supports the full analog output bandwidth of the DAC core. DC coupling the output allows baseband waveform generation without the need for external bias tees or similar circuitry, which makes the AD9166 uniquely suited for the mostdemanding high speed ultrawideband RF transmit applications. The various filter stages enable the AD9166 to be configured for lower data rates, while maintaining higher DAC clock rates to ease the filtering requirements and reduce the overall system size, weight, and power.The data interface receiver consists of up to eight JESD204B SERDES lanes, each capable of carrying up to 12.5 Gbps. To enable maximum flexibility, the receiver is fully configurable according to the data rate, number of SERDES lanes, and lane mapping required by the JESD204B transmitter.In 2? nonreturn-to-zero (NRZ) mode of operation (with FIR85 enabled), the AD9166 can reconstruct RF carriers from true dc to the edge of the third Nyquist zone, or an analog bandwidth of true dc up to 9 GHz.In mix mode, the AD9166 can reconstruct RF carriers in the second and third Nyquist zones while consuming lower power and maintaining a performance comparable to 2? NRZ mode.In baseband modes, such as return-to-zero (RZ) and 1? NRZ, the AD9166 is ideal to reconstruct RF carriers from true dc to the edge of the first Nyquist zone while consuming lower power compared to 2? NRZ mode.The quadrature DDS block can be configured as a digital upconverter to upconvert I/Q data samples to the desired location across the spectrum, in all three Nyquist zones.The DDS also consists of a bank of 32 numerically controlled oscillators (NCOs), each with its own 32-bit phase accumulator. When combined with a 100 MHz serial peripheral interface (SPI), the DDS allows a phase coherent FFH, with a phase settling time as low as 300 ns.The AD9166 is configured using a common SPI interface that monitors the status of all registers. The AD9166 is offered in a 324-ball, 15 mm ? 15 mm, 0.8 mm pitch BGA_ED package.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 9 GHz. Fully supports zero IF and other dc-coupled applications. Up to an eight-lane JESD204B SERDES interface, with various features to allow flexibility when interfacing to a JESD204B transmitter.Applications Instrumentation: automated test equipment, electronic test and measurement, arbitrary waveform generators Electronic warfare: radars, jammers Broadband communications systems Local oscillator drivers1 Protected by U.S. Patents 6,842,132 and 7,796,971.