The ADM1178 is an integrated hot swap controller and current sense amplifier that offers digital current and voltage monitoring via an on-chip 12-bit analog-to-digital converter (ADC), communicated through an I2C? interface.An internal current sense amplifier measures voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.The ADM1178 limits the current through this resistor by control-ling the gate voltage (via the GATE pin) of an external N-channel FET in the power path. The voltage across the sense resistor (and therefore the inrush current) is kept below a preset maximum.The ADM1178 protects the external FET by limiting the time that the maximum current runs through it. This current limit period is set by the value of the capacitor attached to the TIMER pin. Additionally, the device provides protection from overcurrent events that may occur after the hot swap event is complete. In case of a short-circuit event, the current in the sense resistor exceeds an overcurrent trip threshold, and the FET is switched off immediately by pulling down the GATE pin.A 12-bit ADC can measure the current seen in the sense resistor, as well as the supply voltage on the VCC pin. An alert output can be set to trigger when the ADC current reading exceeds a programmed overcurrent limit threshold.An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on how the ADR pin is connected.The ADM1178 is packaged in a 10-lead MSOP.ApplicationsPower monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

DC532A: Demo Board for the LTC1980 Combination Battery Charger and DC/DC Converter.

The ADM2484E is an isolated data transceiver with ?15 kVESD protection suitable for high speed, half- or full-duplex communication on multipoint transmission lines. For half-duplex operation, the transmitter outputs and receiver inputs share the same transmission line. Transmitter Output Pin Y links externally to Receiver Input Pin A, and Transmitter Output Pin Z links externally to Receiver Input Pin B.Designed for balanced transmission lines, the ADM2484Ecomplies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E). The device employs Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package.The differential transmitter outputs and receiver inputs featureelectrostatic discharge circuitry that provides protection up to ?15 kV using the human body model (HBM). The logic side of the device can be powered with either a 5 V or a 3.3 V supply, whereas the bus side requires an isolated 3.3 V supply.The device has current-limiting and thermal shutdown featuresto protect against output short circuits and situations where buscontention causes excessive power dissipation.Applications Isolated RS-485/RS-422 interfaces Industrial field networks INTERBUS Multipoint data transmission systems

The AD5674/AD5674R/AD5679/AD5679R are low power,?16-channel, 12-/16-bit, buffered voltage output, digital-to-analog converters (DACs) that include a 2.5 V, 2 ppm/?C internal reference (enabled by default), and a gain select pin, resulting in a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The?devices operate from a single, 2.7 V to 5.5 V supply range and?are guaranteed monotonic by design. The AD5674/AD5674R/AD5679/AD5679R are available in a 28-lead lead frame chip scale package (LFCSP) and incorporate a power-on reset (POR) circuit that ensures that the DAC outputs power up to and remains at zero-scale or midscale until a valid write. The AD5674/AD5674R/AD5679/AD5679R contain a power-down mode that reduces the current?consumption to 2 ?A typical.Product Highlights High channel density: 16 channels in 4 mm ? 4 mm?LFCSP. High relative accuracy (integral nonlinearity (INL)) ?4 LSB maximum. Low drift, 2.5 V, on-chip reference.Applications Optical transceivers Base station power amplifiers Process control (programmable logic controller (PLC) input/output cards) Industrial automation Data acquisition systems

The digital output ADXL3591 is a low noise density, low 0 g offset drift, low power, 3-axis microelectromechanical system (MEMS) accelerometer with selectable measurement ranges. The ADXL359 supports the ?10 g, ?20 g, and ?40 g ranges.The ADXL359 offers industry leading noise, minimal offset drift over temperature, and long-term stability, enabling precision applications with minimal calibration.The low drift, low noise, and low power ADXL359 enables accurate tilt measurement in an environment with high vibration, such as airborne inertial measurement units (IMUs). The low noise over higher frequencies is ideal for wireless condition monitoring.The ADXL359 multifunction pin names may be referenced only by their relevant function for either the serial peripheral interface (SPI) or limited I2C interface.APPLICATIONS IMUs and altitude and heading reference systems (AHRSs) Platform stabilization systems Vibration sensing Structural health monitoring Tilt sensing Robotics Condition monitoringProtected by U.S. Patents 8,472,270; 9,041,462; 8,665,627; 8,917,099; 6,892,576; 9,297,825; and 7,956,621.

The ADXL343 is a versatile 3-axis, digital-output, low?g MEMS accelerometer. Selectable measurement range and bandwidth, and configurable, built-in motion detection make it suitable for sensing acceleration in a wide variety of applications. Robustness to 10,000 g?of shock and a wide temperature range (?40?C to +85?C) enable use of the accelerometer even in harsh environments.The ADXL343 measures acceleration with high resolution (13-bit) measurement at up to ?16g. Digital output data is formatted as 16-bit twos complement and is accessible through either an SPI (3- or 4-wire) or I2C digital interface. The ADXL343 can measure the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (3.9 mg/LSB) enables measurement of inclination changes less than 1.0?.Several special sensing functions are provided. Activity and inactivity sensing detect the presence or lack of motion. Tap sensing detects single and double taps in any direction. Free-fall sensing detects if the device is falling. These functions can be mapped individually to either of two interrupt output pins.An integrated memory management system with a 32-level first in, first out (FIFO) buffer can be used to store data to minimize host processor activity and lower overall system power consumption.The ADXL343 is supplied in a small, thin, 3 mm ? 5 mm ? 1 mm, 14-terminal, plastic package.APPLICATIONS Handsets Gaming and pointing devices Hard disk drive (HDD) protection

The ADG5412/ADG5413 contain four independent single-pole/single-throw (SPST) switches. The ADG5412 switches turn onwith Logic 1. The ADG5413 has two switches with digital controllogic similar to that of the ADG5412; however, the logic is invertedon the other two switches. Each switch conducts equally well inboth directions when on, and each switch has an input signalrange that extends to the supplies. In the off condition, signallevels up to the supplies are blocked.The ADG5412 and ADG5413 do not have a VL pin. The digitalinputs are compatible with 3 V logic inputs over the full operatingsupply range.The on-resistance profile is very flat over the full analog inputrange, which ensures good linearity and low distortion whenswitching audio signals. High switching speed also makes thedevices suitable for video signal switching. The ADG5413exhibits break-before-make switching action for use inmultiplexer applications. Product Highlights Trench isolation guards against latch-up. A dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions. Low RON. Dual-supply operation. For applications where the analog signal is bipolar, the ADG5412/ADG5413 can be operated from dual supplies up to ?22 V. Single-supply operation. For applications where the analog signal is unipolar, the ADG5412/ADG5413 can be operated from a single rail power supply up to 40 V. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required. Applications Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

The HMC728 is a 2:1 Selector designed to support data transmission rates of up to 13 Gbps, and selector port operation of up to 13 GHz. The selector routes one of the two single-ended inputs to the differential output upon assertion of the proper select port. All single-ended input signals to the HMC728 are terminated with 50 ohms to ground on-chip, and may be either AC or DC coupled.The outputs of the HMC728 may be operated either differentially or single-ended. Outputs can be connected directly to a 50 ohm terminated system, while DC blocking capacitors may be used if the terminating system is 50 ohms to a non-ground DC voltage. The HMC728 operates from a single -3.3V DC supply and is available in a ceramic RoHS compliant 3x3 mm SMT package.APPLICATIONS 2:1 Multiplexer up to 13 Gbps F ATE Applications Broadband Test & Measurement Serial Data Transmission up to 13 Gbps Redundant Path Switching Built-in Test

DC987B-E: Demo Board for the LTC6401-8 2.2GHz Low Noise, Low Distortion Differential ADC Driver for DC-140MHz.

The ADRF5549 is a dual-channel, integrated, RF front-end multichip module designed for time division duplexing (TDD) applications that operates from 1.8 GHz to 2.8 GHz. The ADRF5549 is configured in dual channels with a cascading, two-stage, low noise amplifier (LNA) and a high power, silicon single-pole, double-throw (SPDT) switch.In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure of 1.4 dB and a high gain of 35 dB with an output third-order intercept point (OIP3) of 32 dBm typical.In low gain mode, one stage of the two-stage LNA is in bypass mode providing 17 dB of gain at a lower current of 35 mA. In power-down mode, the LNAs are turned off, and the device draws 12 mA.In transmit operation, when RF inputs are connected to a termination pin (TERM-ChA or TERM-ChB), the switch provides a low insertion loss of 0.6 dB and handles a long-term evolution (LTE) full lifetime average (9 dB peak to average ratio (PAR)) of 40 dBm and 43 dBm for a 9 dB PAR LTE single event (ApplicationsWireless InfrastructureTDD massive multiple input and multiple output (MIMO) and active antenna systemsTDD-based communication systems