Demonstration circuit 1901A is a 150V input, 100mA output DC/DC power supply featuring the LTC3639. The IC operates in a high efficiency Burst Mode® operation and includes internal high and low side power MOSFETs. The board will accept an input voltage between 4V and 150V, and provide jumper selected output voltages of 1.8V, 3.3V, 5V and an option for additional voltages. The IC includes internal soft-start and a provision for increasing soft-start time.

The LTC2337-18 is a low noise, high speed 18-bit successive approximation register (SAR) ADC with fully differential inputs. Operating from a single 5V supply, the LTC2337-18 has a ?10.24V true bipolar input range, making it ideal for high voltage applications which require a wide dynamic range. The LTC2337-18 achieves ?4LSB INL maximum, no missing codes at 18-bits with 100dB SNR.The LTC2337-18 has an on-board single-shot capable reference buffer and low drift (20ppm/?C max) 2.048V temperature compensated reference. The LTC2337-18 also has a high speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring a daisy-chain mode. The fast 500ksps throughput with no cycle latency makes the LTC2337-18 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2337-18 dissipates only 35mW and automatically naps between conversions, leading to reduced power dissipation that scales with the sampling rate. A sleep mode is also provided to reduce the power consumption of the LTC2337-18 to 300?W for further power savings during inactive periods.Applications Programmable Logic Controllers Industrial Process Control High Speed Data Acquisition Portable or Compact Instrumentation ATE

The LTC2326-18 is a low noise, high speed 18-bit successive approximation register (SAR) ADC with pseudo-differential inputs. Operating from a single 5V supply, the LTC2326-18 has a ?10.24V true bipolar input range, making it ideal for high voltage applications which require a wide dynamic range. The LTC2326-18 achieves ?5LSB INL maximum, no missing codes at 18 bits with 95dB SNR.The LTC2326-18 has an onboard single-shot capable reference buffer and low drift (20ppm/?C max) 2.048V temperature compensated reference. The LTC2326-18 also has a high speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring a daisy-chain mode. The fast 250ksps throughput with no cycle latency makes the LTC2326-18 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2326-18 dissipates only 28mW and automatically naps between conversions, leading to reduced power dissipation that scales with the sampling rate. A sleep mode is also provided to reduce the power consumption of the LTC2326-18 to 300?W for further power savings during inactive periods. Bits LTC2326-16 16 LTC2326-18 18 Applications Programmable Logic Controllers Industrial Process Control High Speed Data Acquisition Portable or Compact Instrumentation ATE

The LTC2327-16 is a low noise, high speed 16-bit successive approximation register (SAR) ADC with pseudo-differential inputs. Operating from a single 5V supply, the LTC2327-16 has a ?10.24V true bipolar input range, making it ideal for high voltage applications which require a wide dynamic range. The LTC2327-16 achieves ?1.5LSB INL maximum, no missing codes at 16 bits with 93.5dB SNR.The LTC2327-16 has an on-board single-shot capable reference buffer and low drift (20ppm/?C max) 2.048V temperature compensated reference. The LTC2327-16 also has a high speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring a daisy-chain mode. The fast 500ksps throughput with no cycle latency makes the LTC2327-16 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2327-16 dissipates only 36mW and automatically naps between conversions, leading to reduced power dissipation that scales with the sampling rate. A sleep mode is also provided to reduce the power consumption of the LTC2327-16 to 300?W for further power savings during inactive periods. Bits LTC2327-16 16 LTC2327-18 18 Applications Programmable Logic Controllers Industrial Process Control High Speed Data Acquisition Portable or Compact Instrumentation ATE

DC1920A: Demo Board for the LTC3553-2 - Micropower USB Power Manager with Li-Ion Charger, Always-On LDO and Buck Regulator

The LTC3129 is a high efficiency, 200mA buck-boost DC/DC converter with a wide VIN and VOUT range. It includes an accurate RUN pin threshold to allow predictable regulator turn-on and a maximum power point control (MPPC) capability that ensures maximum power extraction from non-ideal power sources such as photovoltaic panels.The LTC3129 employs an ultralow noise, 1.2MHz PWM switching architecture that minimizes solution footprint by allowing the use of tiny, low profile inductors and ceramic capacitors. Built-in loop compensation and soft-start simplify the design. For high efficiency operation at light loads, automatic Burst Mode operation can be selected, reducing the quiescent current to just 1.3?A.Additional features include a power good output, less than 10nA of shutdown current and thermal shutdown.The LTC3129 is available in thermally enhanced 3mm ? 3mm QFN and 16-lead MSOP packages. For fixed output voltage options, see the functionally equivalent LTC3129-1, which eliminates the need for an external feedback divider. Output Voltage LTC3129 Adjustable?1.4V to 15.75V via resistor divider LTC3129-1 8 pin programmable output voltages from 2.5V to 15V Applications Industrial Wireless Sensor Nodes Post-Regulator for Harvested Energy Solar Panel Post-Regulator/Charger Intrinsically Safe Power Supplies Wireless Microphones Avionics-Grade Wireless Headsets

The AD9255 is a 14-bit, 125 MSPS analog-to-digital converter (ADC). The AD9255 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 14-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9255 is suitable for applications in communications, instrumentation, and medical imaging.A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on-chip dither function is available to improve SFDR performance with low power analog input signals.The AD9255 is available in a Pb-free, 48-lead LFCSP and is specified over the industrial temperature range of ?40?C to +85?C.PRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode. ?Pin compatibility with the AD9265, allowing a simple migration up to 16 bits.Applications Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipment

The AD9286 is an 8-bit, monolithic sampling, analog-to-digital converter (ADC) that supports interleaved operation and is optimized for low cost, low power, and ease of use. Each ADC operates at up to a 250 MSPS conversion rate with outstanding dynamic performance.The AD9286 takes a single sample clock and, with an on-chip clock divider, time interleaves the two ADC cores (each running at one-half the clock frequency) to achieve the rated 500 MSPS. By using the SPI, the user can accurately adjust the timing of the sampling edge per ADC to minimize the image spur energy.The ADC requires a single 1.8 V supply and an encode clock for full performance operation. No external reference components are required for many applications. The digital outputs are LVDS compatible.The AD9286 is available in a Pb-free, 48-lead LFCSP that is specified over the industrial temperature range of ?40?C to +85?C. PRODUCT HIGHLIGHTS Integrated 8-bit, 500 MSPS ADC. Single 1.8 V supply operation with LVDS outputs. Power-down option controlled via a pin-programmable setting.?APPLICATIONS Battery-powered instruments Handheld scope meters Low cost digital oscilloscopes OTS: video over fiber

The AD9287 is a quad, 8-bit, 100 MSPS analog-to-digital con-verter (ADC) with an on-chip sample-and-hold circuit designedfor low cost, low power, small size, and ease of use. The productoperates at a conversion rate of up to 100 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximizeflexibility and minimize system cost, such as programmableclock and data alignment and programmable digital test patterngeneration. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9287 is available in an RoHS compliant, 48-lead LFCSP. It isspecified over the industrial temperature range of ?40?C to +85?C.Product Highlights Small Footprint. Four ADCs are contained in a small, space-saving package. Low power of 133 mW/channel at 100 MSPS. Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 400 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. Pin-Compatible Family. This includes the AD9219 (10-bit), AD9228 (12-bit), and AD9259 (14-bit).ApplicationsMedical imaging and nondestructive ultrasoundPortable ultrasound and digital beam-forming systemsQuadrature radio receiversDiversity radio receiversTape drivesOptical networkingTest equipment

The AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance. Three independent LVPECL and two LVDS clock outputs operate to 1.2 GHz and 800 MHz respectively. Optional CMOS clock outputs available to 250 MHz. Each output has a programmable divider, which may be bypassed or set to divide by any integer up to 32.Each divider allows the user to change the phase of one clock output relative to another clock output. This phase select functions as a coarse timing adjustment. One output also features a programmable delay element with a user-selected, fullscale range to 10 ns. This fine tuning delay block is programmed with a 5-bit word, which gives the user 32 possible delays from which to choose.The AD9512 is ideally suited for data converter clocking applications where maximum converter performance is achieved with sub-picosecond jitter encode signals.The AD9512 is available in a 48-lead LFCSP and is specified from -40?C to +85?C. The part may be run from a single 3.3 V supply. ApplicationsLow jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDS, DDC, DUC, MxFE? ConvertersWireless infrastructure transceiversHigh performance instrumentationBroadband infrastructure