The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The HMC8205BF10 is a gallium nitride (GaN) broadband power amplifier delivering 45.5 dBm (35 W) with 38% power added efficiency (PAE) across an instantaneous bandwidth of 0.3 GHz to 6 GHz. No external matching is required to achieve full band operation. Additionally, no external inductor is required to bias the amplifier. Also, dc blocking capacitors for the RFIN and RFOUT pins are integrated into the HMC8205BF10.The HMC8205BF10 is ideal for pulsed or continuous wave(CW) applications, such as military jammers, wirelessinfrastructure, radar, and general-purpose amplification.The HMC8205BF10 amplifier is a 10-lead ceramic leaded chip carrier (LDCC).The HMC8205BCHIPS is a gallium nitride (GaN), broadbandpower amplifier that delivers 45.5 dBm (35 W) with 40% poweradded efficiency (PAE) across an instantaneous bandwidth of0.4 GHz to 6 GHz. No external matching is required to achievefull band operation. No external inductor is required to bias theamplifier. In addition, dc blocking capacitors for the RFIN andRFOUT pins are integrated into the HMC8205BCHIPS.The HMC8205BCHIPS is ideal for pulsed or continuous wave(CW) applications, such as military jammers, wirelessinfrastructure, radar, and general-purpose amplification.APPLICATIONS Military jammers Commercial and military radar Power amplifier stage for wireless infrastructure? Test and measurement equipment

The HMC7357 is a three-stage GaAs pHEMT MMIC Medium Power Amplifier that operates between 5.5 and 8.5 GHz. The amplifier provides 29 dB of gain and +35 dBm of saturated output power at 34% PAE from a +8V supply. With an excellent Output IP3 of +41.5 dBm, the HMC7357 is ideal for linear applications such as high capacity point-to-point and point-to-multi-point radios or VSAT/SATCOM applications demanding +35 dBm of efficient saturated output power. The RF I/Os are internally matched to 50 Ohms for ease of use. The HMC7357 is packaged in a leadless 5x5 mm plastic surface mount package and is compatible with surface mount manufacturing techniques.Applications Point-to-Point Radios Point-to-Multi-Point Radios VSAT & SATCOM

DC782A-Q: Demo Board for the LTC2249 14-Bit, 80Msps Low Power 3V ADC.

The ADG1634L is a monolithic industrial CMOS (iCMOS?) analog switch comprising four independently selectable single-pole, double-throw (SPDT) switches, respectively.All channels exhibit break-before-make switching action that prevents momentary shorting when switching channels. An EN input on the ADG1634L is used to enable or disable the device. When disabled, all channels are switched off. The switch is enabled with a Logic 1 EN input, while the INx input defines the state of the SPDT switch (see Table 12 in the data sheet).The ultralow on resistance and on-resistance flatness of the switch makes it an ideal solution for data acquisition and gain switching applications, where low distortion is critical. iCMOS construction ensures ultra low power dissipation, making the device ideally suited for portable and battery-powered instruments.An external VL supply provides flexibility for lower logic control. The ADG1634L is both 1.2 V and 1.8 V JEDEC standard compliant.APPLICATIONS Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems FPGA and microcontroller systems Sample-and-hold systems Relay replacementsPRODUCT HIGHLIGHTS 8.2 ? maximum on resistance over temperature. Minimum distortion. VL supply for low logic level compatibility. JEDEC standard compliant for both 1.2 V and 1.8 V logic levels. Guaranteed switch off when digital inputs are floating. 24-lead, 4 mm ? 4 mm LFCSP.

DC1098A-B: Demo Board for LTC2283 Dual 12-Bit, 125Msps Low Power 3V ADC

Demonstration circuit 2898A is a dual DC/DC converter with a 13V to 40V input voltage range, two 12V outputs at 4A each featuring the LTM4655. The LTM4655 is a EN55022B compliant 40V, dual 4A or single 8A step-down or 50W inverting DC/DC μModule® regulator. The switching frequencies of both channels are set at 1.2MHz on DC2898A. If the output voltage collapses sufficiently due to an overload or short-circuit condition, the internal oscillator will foldback to one-fifth of the LTM4655’s programmed switching frequency, protecting the power switch from damage. Key features of this board include: SSFM Jumper for Spread Spectrum Options CLKIN Inputs for External Sync PGOOD Signals for Each Output The two channels can be paralleled for higher output current. See the data sheet for more information on setting up the board for paralleling the two outputs. The LTM4655 data sheet gives a complete description of the device, its operation and application information. The data sheet must be read in conjunction with the demo manual prior to working on or modifying DC2898A.

The LTC4125 is a simple and high performance monolithic full bridge resonant driver capable of delivering over 5W of power wirelessly to a properly tuned receiver. The device controls the current flow in a series connected transmit coil LC network to create a simple, safe and versatile wireless power transmitter.The LTC4125 automatically adjusts its driving frequency to match the LC network resonant frequency. This AutoResonant switching allows the device to deliver maximum power from a low voltage input supply (3V to 5.5V) to a tuned receiver. To optimize system efficiency, the LTC4125 employs a periodic transmit power search and adjusts the transmission power based on the receiver load requirements. The device stops delivering power during a fault condition, or if a foreign object is detected.The LTC4125 also includes a programmable maximum average input current limit and an NTC input as additional means for foreign object and overload protection. The LTC4125 is available in a 20-lead low profile (0.75mm) 4mm ? 5mm QFN package.Applications Hermetically and/or Electrically Insulated Devices Military Sensors and Devices Medical Equipment Industrial Handhelds

The AD7608 is an 18-bit, 8-channel simultaneous sampling, analog-to-digital data acquisition system (DAS). The part contains analog input clamp protection, a second-order antialiasing filter, a track-and-hold amplifier, an 18-bit charge redistribution successive approximation analog-to-digital converter (ADC), a flexible digital filter, a 2.5 V reference and reference buffer, and high speed serial and parallel interfaces.The AD7608 operates from a single 5 V supply and can accommodate ?10 V and ?5 V true bipolar input signals while sampling at throughput rates up to 200 kSPS for all channels.The input clamp protection circuitry can tolerate voltages up to ?16.5 V. The AD7608 has 1 M? analog input impedance regardless of sampling frequency. The single supply operation, on-chip filtering, and high input impedance eliminate the need for driver op amps and external bipolar supplies. The AD7608 antialiasing filter has a 3 dB cutoff frequency of 22 kHz and provides 40 dB antialias rejection when sampling at 200 kSPS. The flexible digital filter is pin driven, yields improvements in SNR, and reduces the 3 dB bandwidth.Applications Power line monitoring and protection systems Multiphase motor controls Instrumentation and control systems Multiaxis positioning systems Data acquisition systems (DAS)

The AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance. Three independent LVPECL and two LVDS clock outputs operate to 1.2 GHz and 800 MHz respectively. Optional CMOS clock outputs available to 250 MHz. Each output has a programmable divider, which may be bypassed or set to divide by any integer up to 32.Each divider allows the user to change the phase of one clock output relative to another clock output. This phase select functions as a coarse timing adjustment. One output also features a programmable delay element with a user-selected, fullscale range to 10 ns. This fine tuning delay block is programmed with a 5-bit word, which gives the user 32 possible delays from which to choose.The AD9512 is ideally suited for data converter clocking applications where maximum converter performance is achieved with sub-picosecond jitter encode signals.The AD9512 is available in a 48-lead LFCSP and is specified from -40?C to +85?C. The part may be run from a single 3.3 V supply. ApplicationsLow jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDS, DDC, DUC, MxFE? ConvertersWireless infrastructure transceiversHigh performance instrumentationBroadband infrastructure