Demonstration circuit 2788A is a boost LED driver featuring the LT®3950. This demonstration circuit powers a string of LEDs at 330mA. The step-up topology can be used to drive a string of up to 28V of LEDs as assembled. The maximum output voltage capability of the LT3950 is 60V. DC2788A runs from an input voltage range of 6V to 24V as built. It also runs at 2MHz and has the capability to turn on spread spectrum frequency modulation (SSFM) for a frequency range of 2.0MHz to 2.5MHz. Dimming control can be achieved with analog dimming or PWM dimming—either from an external or internally-generated clock source. DC2788A features undervoltage lockout (UVLO) set at 6.6V with a 1.0V hysteresis for turn-on. The UVLO voltage, LED current, output voltage range, switching frequency, brightness control, SSFM, and the topology can all be adjusted with simple modifications to the demonstration circuit. LT3950 is a monolithic 1.5A peak switch current, 60V LED driver. The guaranteed peak switch current rating of the IC is 1.5A and this is important to know when calculating maximum output current at a given LED voltage and input voltage for a boost converter. The LT3950 features SSFM and a well-controlled SW node for low emissions. A frequency range of 200kHz to 2MHz and a high-side PWMTG PWM-dimming MOSFET makes this a very versatile IC for many applications. It can be used for boost, buck-boost mode and buck mode LED driver applications. The PWMTG MOSFET not only provides high PWM dimming ratio capability, but it also serves as a short-circuit protection device. The FAULT flag indicates when there is either a short-circuit or open-LED fault at the output. The demo circuit is designed to be easily reconfigured to suit other applications, including the example schematics in the data sheet. Consult technical support for assistance. High voltage operation, 3V input voltage operation, multiple topologies, small-and-compact size, fault protection, low EMI, and multiple brightness control options make the LT3950 flexible and powerful for compact, noise-sensitive LED driver solutions. The LT3950JMSE featured on this demo circuit is available in a thermally enhanced 16-lead plastic MSOP package. The LT3950 data sheet must be read in conjunction with this demo manual to properly use or modify demo circuit DC2788A.

The HMC439QS16G(E) is a digital phase-frequency detector intended for use in low noise phase-locked loop applications for inputs from 10 to 1300 MHz. Its combination of high frequency of operation along with its ultra low phase noise floor make possible synthesizers with wide loop bandwidth and low N resulting in fast switching and very low phase noise. When used in conjunction with a differential loop amplifier, the HMC439QS16G(E) generate output voltages that can be used to phase lock a VCO to a reference oscillator. The device is packaged in a low cost, surface mount 16 lead QSOP package with an exposed base for improved RF and thermal performance.APPLICATIONS Point-to-Point Radios Satellite Communication Systems Military Applications Sonet Clock Generation

Demonstration circuit 3162A is a 18V, 10A synchronous step-down Silent Switcher® with spread spectrum frequency modulation featuring the LT8642-1. The demo board is designed for 1.2V output from a 2.8V to 18V input. The LT8642-1 is a compact, low emission, high efficiency, and high speed synchronous monolithic stepdown switching regulator. Special Silent Switcher architecture minimizes EMI emissions. Selectable spread spectrum mode can further improve EMI performance. Fast minimum on-time of 20ns enables high VIN to low VOUT conversion at high frequency. The LT8642-1 switching frequency can be programmed either via a resistor or external clock over a 200kHz to 3MHz range. The default frequency of demo circuit 3162A is 2MHz. The LT8642-1 SYNC/MODE pin on the demo board is grounded (JP1 at BURST position) by default for low ripple Burst Mode® operation. Spread spectrum mode and forced continuous mode can be selected respectively by moving JP1 shunt. To synchronize to an external clock, move JP1 to FCM/SYNC and apply the external clock to the SYNC terminal. The LT8642-1 data sheet gives a complete description of the part, operation, and application information. The data sheet must be read in conjunction with this demo manual for demo circuit 3162A. The LT8642-1 is assembled in a 3mm × 4mm LQFN package with exposed pads for low thermal resistance. The layout recommendations for low EMI operation and maximum thermal performance are available in the data sheet section Low EMI PCB Layout and Thermal Considerations.

The HMC1119 is a broadband, highly accurate, 7-bit digitalattenuator, operating from 0.1 GHz to 6.0 GHz with 31.5 dBattenuation control range in 0.25 dB steps.The HMC1119 is implemented in a silicon process, offeringvery fast settling time, low power consumption, and high ESDrobustness. The device features safe state transitions and isoptimized for excellent step accuracy and high linearity overfrequency and temperature range. The RF input and output areinternally matched to 50 ? and do not require any externalmatching components. The design is bidirectional; therefore,the RF input and output are interchangeable.The HMC1119 has an on-chip regulator that can support a widesupply operating range from 3.3 V to 5.0 V with no performancechange in electrical characteristics. The HMC1119 incorporates adriver that supports serial (3-wire) and parallel controls of theattenuator.The HMC1119 comes in a RoHS-compliant, compact, 4 mm ?4 mm LFCSP package.A fully populated evaluation board is available.Applications Cellular infrastructure Microwave radios and very small aperture terminals (VSATs) Test equipment and sensors IF and RF designs

The AD9523-1 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO with two VCO dividers. The on-chip VCO tunes from 2.94 GHz to 3.1 GHz.The AD9523-1 is designed to support the clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive low phase noise requirements necessary for acceptable data converter SNR performance.The input receivers, oscillator, and zero delay receiver provide both single-ended and differential operation. When connected to a recovered system reference clock and a VCXO, the device generates 14 low noise outputs with a range of 1 MHz to 1 GHz, and one dedicated buffered output from the input PLL (PLL1). The frequency and phase of one clock output relative to another clock output can be varied by means of a divider phase select function that serves as a jitter-free, coarse timing adjustment in increments that are equal to half the period of the signal coming out of the VCO.An in-package EEPROM can be programmed through the serial interface to store user-defined register settings for power-up and chip reset.APPLICATIONS LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction (G.710) High performance wireless transceivers ATE and high performance instrumentation

The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ?40?C to +85?C ambient temperature, unless otherwise noted. This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power fiber optic receiver. The receiver front end, loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-adjustable threshold. The LOS detect circuit has hysteresis to prevent chatter at the output. The ADN2812 is available in a compact 5 mm ? 5 mm 32-lead lead frame chip scale package (LFCSP).ApplicationsSONET OC-1/OC-3/OC-12/OC-48 and all associated FEC rates Fibre Channel, 2? Fibre Channel, GbE, HDTV WDM transponders Regenerators/repeaters Test equipment Broadband cross-connects and routers

Demonstration circuit 1787A is a wide input voltage range SEPIC converter featuring the LT3759 controller. It converts a 2.8V~36V input to a 12V output, with 1A load current capability for VIN ≥ 4V. The converter operates at a 300 kHz nominal switching frequency, with 91% peak efficiency. The DC1787A can be easily modified to generate other output voltages, and can also be optimized for efficiency and size with narrower input voltage ranges.

Video IC Development Tools EVAL BRD ADV7802

The digital output ADXL3591 is a low noise density, low 0 g offset drift, low power, 3-axis microelectromechanical system (MEMS) accelerometer with selectable measurement ranges. The ADXL359 supports the ?10 g, ?20 g, and ?40 g ranges.The ADXL359 offers industry leading noise, minimal offset drift over temperature, and long-term stability, enabling precision applications with minimal calibration.The low drift, low noise, and low power ADXL359 enables accurate tilt measurement in an environment with high vibration, such as airborne inertial measurement units (IMUs). The low noise over higher frequencies is ideal for wireless condition monitoring.The ADXL359 multifunction pin names may be referenced only by their relevant function for either the serial peripheral interface (SPI) or limited I2C interface.APPLICATIONS IMUs and altitude and heading reference systems (AHRSs) Platform stabilization systems Vibration sensing Structural health monitoring Tilt sensing Robotics Condition monitoringProtected by U.S. Patents 8,472,270; 9,041,462; 8,665,627; 8,917,099; 6,892,576; 9,297,825; and 7,956,621.

DC579A: Demo Board for LTC2600 Octal 16-Bit Rail-to-Rail DACs in 16-Lead SSOP.