The ADRV9009 is a highly integrated, radio frequency (RF), agile transceiver offering dual transmitters and receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption demanded by 3G, 4G, and 5G macro cell time division duplex (TDD) base station applications.The receive path consists of two independent, wide bandwidth, direct conversion receivers with state-of-the-art dynamic range. The device also supports a wide bandwidth, time shared observation path receiver (ORx) for use in TDD applications. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, thus eliminating the need?for these functions in the digital baseband. Several auxiliary functions, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose inputs/outputs (GPIOs) for the power amplifier (PA), and RF front-end control are also integrated.In addition to automatic gain control (AGC), the ADRV9009 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time ?-? ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing, relaxes the requirements of the RF filters when compared to traditional intermediate frequency (IF) receivers.The transmitters use an innovative direct conversion modulator that achieves high modulation accuracy with exceptionally low noise.The observation receiver path consists of a wide bandwidth, direct conversion receiver with state-of-the-art dynamic range.The fully integrated phase-locked loop (PLL) provides high performance, low power, fractional-N RF frequency synthesis for the transmitter (Tx) and receiver (Rx) signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multichip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9009 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, thus reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9009 can be powered directly from 1.3 V regulators and 1.8 V regulators, and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9009 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G TDD macrocell base stations TDD active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment

Demonstration circuit 1529A features the LTC2657 Octal 16-bit DAC with ±4LSB INL error. This device establishes a new board-density benchmark for 16-bit DACs and advances performance standards for output drive, crosstalk and load regulation in single supply, voltage-output multiple DACs.

The LTC1625 is a synchronous step-down switching regulator controller that drives external N-Channel power MOSFETs using few external components. Current mode control with MOSFET VDS sensing eliminates the need for a sense resistor and improves efficiency. The frequency of a nominal 150kHz internal oscillator can be synchronized to an external clock over a 1.5:1 frequency range.Burst Mode? operation at low load currents reduces switching losses and low dropout operation extends operating time in battery-powered systems. A forced continuous mode control pin can assist secondary winding regulation by disabling Burst Mode operation when the main output is lightly loaded.Fault protection is provided by foldback current limiting and an output overvoltage comparator. An external capacitor attached to the RUN/SS pin provides soft start capability for supply sequencing. A wide supply range allows operation from 3.7V (3.9V for LTC1625I) to 36V at the input and 1.19V to VIN at the output.Applications Notebook and Palmtop Computers, PDAs Cellular Telephones and Wireless Modems Battery Chargers Distributed Power

The LT5506 is a 40MHz to 500MHz monolithic integrated quadrature demodulator with variable gain amplifier (VGA), designed for low voltage operation. It supports standards that use a linear modulation format. The chip consists of a VGA, quadrature down-converting mixers and lowpass noise filters. The LO port consists of a divide-by-two stage and LO buffers. The IC provides all building blocks for IF down-conversion to I and Q baseband signals with a single supply voltage of 1.8V to 5.25V. The VGA gain has a linear-in- dB relationship to the control input voltage. Hard-clipping amplifiers at the mixer outputs reduce the recovery time from a signal overload condition. The lowpass filters reduce the out-of-band noise and spurious frequency components. The cut-off frequency of the noise filters is approximately 8.8MHz. The external 2xLO frequency is required to be twice the IF input frequency for the mixers. The standby mode provides reduced supply current and fast transient response into the normal operating mode when the I/Q outputs are AC-coupled to a baseband chip.Applications IEEE802.11 High Speed Wireless LAN Wireless Local Loop

The AD6688-3000EBZ supports the AD6688-3000, a 14-bit, 3GSPS dual analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed support direct RF sampling analog signals of up to 5 GHz. The 3 dB bandwidth of the ADC input is greater than 9 GHz. The AD6688 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package. This reference design provides all of the support circuitry required to operate the ADC in its various modes and configurations. It is designed to interface directly with the ADS7-V2EBZ data capture card, allowing users to download captured data for analysis. The device control and subsequent data analyses can now be done using the ACE software package.

For a limited time, take a live test drive of the AD6676 by using our?remote evaluation software.The AD6676 is a highly integrated IF subsystem that candigitize radio frequency (RF) bands up to 160 MHz in widthcentered on an intermediate frequency (IF) of 70 MHz to 450 MHz. Unlike traditional Nyquist IF sampling ADCs, theAD6676 relies on a tunable band-pass ?-? ADC with a high oversampling ratio to eliminate the need for band specific IFSAW filters and gain stages, resulting in significant simplification of the wideband radio receiver architecture. On-chip quadraturedigital downconversion followed by selectable decimation filtersreduces the complex data rate to a manageable rate between 62.5 MSPS to 266.7 MSPS. The 16-bit complex output data is transferred to the host via a single or dual lane JESD204B interfacesupporting line rates of up to 5.333 Gbps.Applications Wideband cellular infrastructure equipment and repeaters? Point-to-point microwave equipment? Instrumentation? Spectrum and communication analyzers? Software defined radio

The LTC1923 is a pulse width modulator intended for thermoelectric cooler (TEC) or heater applications requiring either unidirectional or bidirectional drive circuits. All of the necessary control circuitry and two sets of complementary output drivers are integrated into the LTC1923 to drive a full bridge, providing an efficient means of bidirectional current flow to the TEC. An accurate temperature control loop to stabilize the temperature of a laser diode system is easily achieved with the addition of just a few external components. Typical temperature setpoint accuracy of 0.1?C is achievable with the LTC1923. Adding an instrumentation amplifier front end allows setpoint stability of 0.01?C.The part features independent adjustable heating and cooling pulse-by-pulse current limit, current soft-start for controlled start-up, output slew rate control to reduce system noise, differential current sense and voltage amplifiers and a host of auxiliary circuits to protect the laser and provide redundant system monitoring.Applications Laser-Based Fiber Optic Links Medical Instruments CPU Temperature Regulators

The LTC1730 is a complete pulse charger for 1-cell lithium-ion batteries. When charging a depleted cell, the internal MOSFET is fully on allowing the current limited input power source to provide charge current to the battery, virtually eliminating heat generation in the charger.As the battery accepts charge and approaches the programmed voltage, the internal MOSFET begins switching off and on with the duty cycle gradually decreasing as the battery approaches a fully charged condition. A programmable timer ends the charge cycle. The end-of-charge condition is indicated at the CHRG pin when the average charge current falls to C/10. Removing the input voltage puts the LTC1730 into a sleep mode, dropping the battery current drain to less than 1?A (maximum).An external sense resistor limits the maximum charge current as a safety precaution against a user connecting a wall adapter with the incorrect or no current limit. The internal MOSFET prevents reverse battery current from flowing if the input voltage is shorted to ground, eliminating the need for a blocking diode.The LTC1730-4 is available in the 16-pin SSOP package and the LTC1730-4.2 is available in the 8-pin SO package.Applications Standalone Lithium-Ion Battery Charger Handheld Computers Cellular Telephones

The LTC3412A is a high efficiency monolithic synchronous, step-down DC/DC converter utilizing a constant frequency, current mode architecture. It operates from an input voltage range of 2.25V to 5.5V and provides a regulated output voltage from 0.8V to 5V while delivering up to 3A of output current. The internal synchronous power switch with 77m? on-resistance increases efficiency and eliminates the need for an external Schottky diode. Switching frequency is set by an external resistor or can be synchronized to an external clock. 100% duty cycle provides low dropout operation extending battery life in portable systems. OPTI-LOOP? compensation allows the transient response to be optimized over a wide range of loads and output capacitors. The LTC3412A can be configured for either Burst Mode operation or forced continuous operation. Forced continuous operation reduces noise and RF interference while Burst Mode operation provides high efficiency by reducing gate charge losses at light loads. In Burst Mode operation, external control of the burst clamp level allows the output voltage ripple to be adjusted according to the application requirements.APPLICATIONS Point-of-Load Regulation Notebook Computers Portable Instruments Distributed Power Systems

The LTC3890-3 is a high performance dual step-down switching regulator DC/DC controller that drives all N-channel synchronous power MOSFET stages. A constant frequency current mode architecture allows a phase-lockable frequency of up to 850kHz. Power loss and supply noise are minimized by operating the two controller output stages out-of-phase.The 50?A no-load quiescent current extends operating life in battery-powered systems. OPTI-LOOP? compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. A wide 4V to 60V input supply range encompasses a wide range of intermediate bus voltages and battery chemistries.Independent TRACK/SS pins for each controller ramp the output voltages during start-up. Current mode control limits the inductor current during short-circuit conditions. The PLLIN/MODE pin selects among Burst Mode operation, pulse-skipping mode, or continuous conduction mode at light loads.For versions with different and/or additional features, see the LTC3890 family summary, Table 1, in the Pin Functions section of this data sheet. LTC3890 LTC3890-1 LTC3890-2 LTC3890-3 Adjustable Current Limit Yes No Yes No CLKOUT/PHASMD for Multiphase Operation Yes No Yes No Number of PGood Outputs 2 1 2 1 OVP ? Bottom Gate Crowbar Yes Yes No No Current Limit Foldback Yes Yes No No Light Load Operation when Synced to External Clock Forced Continuous Forced Continuous Pulse Skipping Pulse Skipping SENSE Pins Common Mode Range Common Mode < 0.5V Requires VFB < 0.65V Common Mode < 0.5V Requires VFB < 0.65V Not Dependant on VFB. Easy to make a non-synchronous Boost or SEPIC Not Dependant on VFB. Easy to make a non-synchronous Boost or SEPIC Package 5X5 QFN-32 SSOP-28 5X5 QFN-32 SSOP-28 Applications Automotive Always-On Systems Battery Operated Digital Devices Distributed DC Power Systems