The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The ADRF5549 is a dual-channel, integrated, RF front-end multichip module designed for time division duplexing (TDD) applications that operates from 1.8 GHz to 2.8 GHz. The ADRF5549 is configured in dual channels with a cascading, two-stage, low noise amplifier (LNA) and a high power, silicon single-pole, double-throw (SPDT) switch.In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure of 1.4 dB and a high gain of 35 dB with an output third-order intercept point (OIP3) of 32 dBm typical.In low gain mode, one stage of the two-stage LNA is in bypass mode providing 17 dB of gain at a lower current of 35 mA. In power-down mode, the LNAs are turned off, and the device draws 12 mA.In transmit operation, when RF inputs are connected to a termination pin (TERM-ChA or TERM-ChB), the switch provides a low insertion loss of 0.6 dB and handles a long-term evolution (LTE) full lifetime average (9 dB peak to average ratio (PAR)) of 40 dBm and 43 dBm for a 9 dB PAR LTE single event (ApplicationsWireless InfrastructureTDD massive multiple input and multiple output (MIMO) and active antenna systemsTDD-based communication systems

The AD8319 is a demodulating logarithmic amplifier, capable of accurately converting an RF input signal to a corresponding decibel-scaled output. It employs the progressive compression technique over a cascaded amplifier chain, each stage of which is equipped with a detector cell. The device can be used in either measurement or controller modes. The AD8319 maintains accurate log conformance for signals of 1 MHz to 8 GHz and provides useful operation to 10 GHz. The input dynamic range is typically 40 dB (re: 50 ?) with error less than ?1 dB. The AD8319 has 8 ns/10 ns response time (fall time/rise time) that enables RF burst detection to a pulse rate of beyond 50 MHz. The device provides unprecedented logarithmic intercept stability vs. ambient temperature conditions. A supply of 3.0 V to 5.5 V is required to power the device. Current consumption is typically 22 mA, and it decreases to 200 ?A when the device is disabled.?The AD8319 can be configured to provide a control voltage to a power amplifier or a measurement output from the VOUT pin. Because the output can be used for controller applications, special attention was paid to minimize wideband noise. In this mode, the setpoint control voltage is applied to the VSET pin.The feedback loop through an RF amplifier is closed via VOUT, the output of which regulates the amplifier?s output to a magnitude corresponding to VSET. The AD8319 provides 0 V to (VPOS ? 0.1 V) output capability at the VOUT pin, suitable for controller applications. As a measurement device, VOUT is externally connected to VSET to produce an output voltage, VOUT, that is a decreasing linear-in-dB function of the RF input signal amplitude.The logarithmic slope is ?22 mV/dB, determined by the VSET interface. The intercept is 15 dBm (re: 50 ?, CW input) using the INHI input. These parameters are very stable against supply and temperature variations.The AD8319 is fabricated on a SiGe bipolar IC process and is available in a 2 mm ? 3 mm, 8-lead LFCSP_VD for an operating temperature range of ?40?C to +85?C.ApplicationsRF transmitter PA setpoint controls and level monitoring Power monitoring in radiolink transmitters RSSI measurement in base stations, WLANs, WiMAX, and radars

The LTC3412A is a high efficiency monolithic synchronous, step-down DC/DC converter utilizing a constant frequency, current mode architecture. It operates from an input voltage range of 2.25V to 5.5V and provides a regulated output voltage from 0.8V to 5V while delivering up to 3A of output current. The internal synchronous power switch with 77m? on-resistance increases efficiency and eliminates the need for an external Schottky diode. Switching frequency is set by an external resistor or can be synchronized to an external clock. 100% duty cycle provides low dropout operation extending battery life in portable systems. OPTI-LOOP? compensation allows the transient response to be optimized over a wide range of loads and output capacitors. The LTC3412A can be configured for either Burst Mode operation or forced continuous operation. Forced continuous operation reduces noise and RF interference while Burst Mode operation provides high efficiency by reducing gate charge losses at light loads. In Burst Mode operation, external control of the burst clamp level allows the output voltage ripple to be adjusted according to the application requirements.APPLICATIONS Point-of-Load Regulation Notebook Computers Portable Instruments Distributed Power Systems

The LTC1666/LTC1667/LTC1668 are 12-/14-/16-bit, 50Msps differential current output DACs implemented on a high performance BiCMOS process with laser trimmed, thin-film resistors. The combination of a novel current-steering architecture and a high performance process produces DACs with exceptional AC and DC performance. The LTC1668 is the first 16-bit DAC in the marketplace to exhibit an SFDR (spurious free dynamic range) of 87dB for an output signal frequency of 1MHz.Operating from ?5V supplies, the LTC1666/LTC1667/LTC1668 can be configured to provide full-scale output currents up to 10mA. The differential current outputs of the DACs allow single-ended or true differential operation. The ?1V to 1V output compliance of the LTC1666/LTC1667/LTC1668 allows the outputs to be connected directly to external resistors to produce a differential output voltage without degrading the converter?s linearity. Alternatively, the outputs can be connected to the summing junction of a high speed operational amplifier, or to a transformer.The LTC1666/LTC1667/LTC1668 are pin compatible and are available in a 28-pin SSOP and are fully specified over the industrial temperature range.Applications Cellular Base Stations Multicarrier Base Stations Wireless Communication Direct Digital Synthesis (DDS) xDSL Modems Arbitrary Waveform Generation Automated Test Equipment Instrumentation

The AD8122 is a triple, high speed, differential receiver and equalizer that compensates for the transmission losses of UTP and coaxial cables up to 300 meters in length. Various gain stages are summed together to best approximate the inverse frequency response of the cable. Each channel features a high impedance differential input that is ideal for interfacing directly with the cable.The AD8122 has two control inputs for optimal cable compensation, one LPF control input, an input to select between UTP and coax cable, and an output offset adjust input. The cable compensation inputs are used to compensate for different cable lengths; the VPEAK input controls the amount of high frequency peaking and the VGAIN input adjusts the broadband flat gain, which compensates for the flat cable loss. The VFILTER input controls the cutoff frequency of output lowpass filters on each channel. Selection between UTP and coaxial cable compensation responses is determined by the binary COAX/UTP?input, which can be left floating in UTP applications. The VOFFSET pin allows the dc voltage at the output to be adjusted, which can be useful in dc-coupled systems.For added flexibility, the gains of each channel can be set to x1 or x2 using the associated GAIN control pins.The AD8122 is available in a 6 mm ? 6 mm, 40-lead LFCSP and is rated to operate over the extended temperature range of ?40?C to +85?C.APPLICATIONS Keyboard-video-mouse (KVM) Digital signage RGB video over UTP cables Professional video projection and distribution HD video Security video

Based on the iCoupler? and isoPower? chip scale transformertechnology, the ADM3260 is a hot swappable digital and powerisolator with two nonlatching, bidirectional communicationchannels, supporting a complete isolated I2C interface, and anintegrated isolated dc-to-dc converter, supporting up to150 mW of isolated power conversion.iCoupler is a chip scale transformer technology with functional,performance, size, and power consumption advantages ascompared to optocouplers. The bidirectional I2C channels eliminate the need for splitting I2C signals into separate transmitand receive signals for use with standalone optocouplers.Based on the Analog Devices, Inc., isoPower technology, theon-chip isolated dc-to-dc converter provides a regulated, isolatedvoltage of 3.15 V to 5.25 V with up to 150 mW of output power.With the ADM3260, the iCoupler and isoPower channels, alongwith the I2C transceivers, can be integrated with semiconductorcircuitry, which enables a complete isolated I2C interface andallows the power converter to be implemented in a small formfactor. The ADM3260 is available in 20-lead SSOP package andhas an operating temperature range of ?40?C to+105?C.isoPower uses high frequency switching elements to transfer powerthrough its transformer. Special care must be taken during printedcircuit board (PCB) layout to meet emissions standards. See theAN-0971 Application Note for board layout recommendationsApplications Isolated I2C, SMBus, and PMBus interfaces Multilevel I2C interfaces Central office switching Telecommunication and data communication equipment ?48 V distributed power systems ?48 V power supply modules Networking

The LTC3118 is a dual-input, wide voltage range synchronous buck-boost DC/DC converter with an intelligent, integrated, low loss PowerPath control. The unique power switch architecture provides efficient operation from either input source to a programmable output voltage above, below or equal to the input. Voltage capability of up to 18V provides flexibility and voltage margin for a wide variety of applications and power sources.The LTC3118 uses a low noise, current mode architecture with a fixed 1.2MHz PWM mode frequency that minimizes the solution footprint. For high efficiency at light loads, automatic Burst Mode operation can be selected consuming only 50?A of quiescent current in sleep.System level features include ideal diode or VIN priority modes, VIN and VOUT power good indicators, accurate RUN comparators to program independent UVLO thresholds, and output disconnect in shutdown. Other features include 2?A shutdown current, short-circuit protection, soft-start, current limit and thermal overload protection.The LTC3118 is offered in thermally enhanced 24-lead 4mm ? 5mm QFN and 28-lead TSSOP packages.Applications Systems with Multiple Input Sources Back Up Power Systems Wall Adapter or Li-Ion(s) Input to 5VOUT Battery or Super Capacitor Input for Reserve Power Replace Diode-OR Designs with Higher Efficiency,?Flexibility and Performance

The AD8310 is a complete, dc to 440 MHz demodulating logarithmic amplifier (log amp) with a very fast voltage mode output, capable of driving up to 25 mA into a grounded load in under 15 ns. It uses the progressive compression (successive detection) technique to provide a dynamic range of up to 95 dB to ?3 dB law conformance or 90 dB to a ?1 dB error bound up to 100 MHz. It is extremely stable and easy to use, requiring no significant external components. A single-supply voltage of 2.7 V to 5.5 V at 8 mA is needed, corresponding to a power consumption of only 24 mW at 3 V. A fast-acting CMOS-compatible enable pin is provided.Each of the six cascaded amplifier/limiter cells has a small-signal gain of 14.3 dB, with a ?3 dB bandwidth of 900 MHz. A total of nine detector cells are used to provide a dynamic range that extends from ?91 dBV (where 0 dBV is defined as the amplitude of a 1 V rms sine wave), an amplitude of about ?40 ?V, up to +4 dBV (or ?2.2 V). The demodulated output is accurately scaled, with a log slope of 24 mV/dB and an intercept of ?108 dBV. The scaling parameters are supply- and temperature-independent.The fully differential input offers a moderately high impedance (1 k? in parallel with about 1 pF). A simple network can match the input to 50 ? and provide a power sensitivity of ?78 dBm to +17 dBm. The logarithmic linearity is typically within ?0.4 dB up to 100 MHz over the central portion of the range, but it is somewhat greater at 440 MHz. There is no minimum frequency limit; the AD8310 can be used down to low audio frequencies. Special filtering features are provided to support this wide range.The output voltage runs from a noise-limited lower boundary of 400 mV to an upper limit within 200 mV of the supply voltage for light loads. The slope and intercept can be readily altered using external resistors. The output is tolerant of a wide variety of load conditions and is stable with capacitive loads of 100 pF.The AD8310 provides a unique combination of low cost, small size, low power consumption, high accuracy and stability, high dynamic range, a frequency range encompassing audio to UHF, fast response time, and good load-driving capabilities, making this product useful in numerous applications that require the reduction of a signal to its decibel equivalent.The AD8310 is available in the industrial temperature range of ?40?C to +85?C in an 8-lead MSOP package.Applications Conversion of signal level to decibel form Transmitter antenna power measurement Receiver signal strength indication (RSSI) Low cost radar and sonar signal processing Network and spectrum analyzers Signal-level determination down to 20 Hz True-decibel ac mode for multimeters

The LTC3850 is a high performance dual synchronous step-down switching regulator controller that drives all N-channel power MOSFET stages. A constant-frequency current mode architecture allows a phase-lockable frequency of up to 780kHz. Power loss and supply noise are minimized by operating the two controller output stages out of phase.OPTI-LOOP? compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. The LTC3850 features a precision 0.8V reference and a power good output indicator. A wide 4V to 24V (28V maximum/30V for LTC3850I) input supply range encompasses most battery chemistries and intermediate bus voltages.Independent TK/SS pins for each controller ramp the output voltages during start-up. Current foldback limits MOSFET heat dissipation during short-circuit conditions. The MODE/PLLIN pin selects among Burst Mode? operation, pulse-skipping mode, or continuous inductor current mode and allows the IC to be synchronized to an external clock.The LTC3850 is available in low profile 28-pin 4mm ? 4mm, 4mm ? 5mm QFN and narrow SSOP packages. Features LTC3850 SSOP-28 and QFN-28 Packages LTC3850-1 ILIM function replaced with an EXTVCC function, SSOP-28 package only LTC3850-2 The LTC3850-2 is identical to the LTC3850-1 SSOP-28, except they have different pin-outs Applications Notebook and Palmtop Computers Portable Instruments Battery-Operated Digital Devices DC Power Distribution Systems