The ADRV9009 is a highly integrated, radio frequency (RF), agile transceiver offering dual transmitters and receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption demanded by 3G, 4G, and 5G macro cell time division duplex (TDD) base station applications.The receive path consists of two independent, wide bandwidth, direct conversion receivers with state-of-the-art dynamic range. The device also supports a wide bandwidth, time shared observation path receiver (ORx) for use in TDD applications. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, thus eliminating the need?for these functions in the digital baseband. Several auxiliary functions, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose inputs/outputs (GPIOs) for the power amplifier (PA), and RF front-end control are also integrated.In addition to automatic gain control (AGC), the ADRV9009 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time ?-? ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing, relaxes the requirements of the RF filters when compared to traditional intermediate frequency (IF) receivers.The transmitters use an innovative direct conversion modulator that achieves high modulation accuracy with exceptionally low noise.The observation receiver path consists of a wide bandwidth, direct conversion receiver with state-of-the-art dynamic range.The fully integrated phase-locked loop (PLL) provides high performance, low power, fractional-N RF frequency synthesis for the transmitter (Tx) and receiver (Rx) signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multichip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9009 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, thus reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9009 can be powered directly from 1.3 V regulators and 1.8 V regulators, and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9009 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G TDD macrocell base stations TDD active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment

The AD8030 is a dual, rail-to-rail input and output high speed amplifier with a quiescent current of only 1.3 mA per amplifier. Despite its low power consumption, the amplifier provides excellent performance with 125MHz small signal bandwidth and 60 V/?s slew rate. ADI's proprietary XFCB process enables high speed and high performance on low power.This amplifier exhibits true single-supply operation with rail-to-rail input and output performance for supply voltages ranging from 2.7V to 12V. The input voltage range extends 200 mV beyond each rail without phase reversal. The dynamic range of the output extends to within 40 mV of each rail.The AD8030 provides excellent signal quality with minimal power dissipation. At G=+1, SFDR is -72dBc at 1MHz and settling time to 0.1% is only 80 ns. Low distortion and fast settling performance makes this amplifier a suitable driver for single-supply A/D converters.The versatility of the AD8030 allows the user to operate the amplifier on a wide range of supplies while consuming less than 6.5 mW of power. This feature extends the operation time in applications ranging from battery-powered systems with large bandwidth requirements to high speed systems where component density requires lower power dissipation.The AD8030 is the only low power, rail-to-rail input and output high speed amplifier available in SOT23 and SC70 micro packages. The amplifier is rated over the extended industrial temperature range, -40?C to +125?C.

Demonstration circuit 2174A-A is a high current, high efficiency, dual-phase dual-output synchronous buck converter featuring the LTC3882EUJ, a dual output voltage mode controller. The DC2174A-A operates with a 7V to 14V input voltage and is configured for 1.5V at 35A and 1V at 35A. The output voltage adjustment range is 0.5V to 2V. The LTC3882 has the PMBus interface and power system management functions.

The ADXL312 is a small, thin, low power, 3-axis accelerometer with high resolution (13-bit) measurement up to ?12 g. Digital output data is formatted as 16-bit twos complement and is accessible through either a serial port interface (SPI) (3- or 4-wire) or I2C digital interface.The ADXL312 is well suited for car alarm or black box applications. It measures the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (2.9 mg/LSB) enables resolution of inclination changes of as little as 0.25?. A built-in FIFO facilitates using oversampling techniques to improve resolution to as little as 0.05? of inclination.Several special sensing functions are provided. Activity and inactivity sensing detects the presence or absence of motion and whether the acceleration on any axis exceeds a user-set level. These functions can be mapped to interrupt output pins. An integrated 32 level FIFO can be used to store data to minimize host processor intervention.Low power modes enable intelligent motion-based power management with threshold sensing and active acceleration measurement at extremely low power dissipation.The ADXL312 is supplied in a small, thin 5 mm ? 5 mm ? 1.45 mm, 32-lead, LFCSP package.Applications Car alarm Hill start aid (HSA) Electronic parking brake Data recorder (black box)

Video IC Development Tools EVAL BRD ADV7802

Demo circuit 1069A is a monolithic step-down switching regulator with LDO featuring LT3500. The demo circuit is designed for 5.0V and 3.3V outputs from a 6V to 36V input. The LDO output is configured as a post-regulator of the switching regulator output. The total current capability is up to 2A. The switching regulator can be synchronized to an external clock input or be resistor-programmed to a 250kHz to 2.2MHz internal oscillator. Programmable frequency allows for optimization between efficiency and external component size. Cycle-by-cycle current limit, frequency foldback and thermal shutdown provide protections against a shorted output. The soft-start feature controls the ramp rate of the output voltage, eliminates input current surge during startup, and also provides output tracking.

The ADuC845, ADuC847, and ADuC848 are single-cycle,12.58 MIPs, 8052 core upgrades to the ADuC834 andADuC836. They include additional analog inputs forapplications requiring more ADC channels.The ADuC845, ADuC847, and ADuC848 are complete smarttransducer front ends. The family integrates high resolution?-? ADCs with flexible, up to 10-channel, input multiplexing, afast 8-bit MCU, and program and data Flash/EE memory on asingle chip.The ADuC845 includes two (primary and auxiliary) 24-bit ?-?ADCs with internal buffering and PGA on the primary ADC.The ADuC847 includes the same primary ADC as the ADuC845(auxiliary ADC removed). The ADuC848 is a 16-bit ADCversion of the ADuC847.The ADCs incorporate flexible input multiplexing, a temperaturesensor (ADuC845 only), and a PGA (primary ADC only)allowing direct measurement of low-level signals. The ADCsinclude on-chip digital filtering and programmable output datarates that are intended for measuring wide dynamic range andlow frequency signals, such as those in weigh scale, strain gage,pressure transducer, or temperature measurement applications.The devices operate from a 32 kHz crystal with an on-chip PLLgenerating a high frequency clock of 12.58 MHz. This clock isrouted through a programmable clock divider from which theMCU core clock operating frequency is generated. The microcontrollercore is an optimized single-cycle 8052 offering up to12.58 MIPs performance while maintaining 8051 instruction setcompatibility.The available nonvolatile Flash/EE program memory optionsare 62 kbytes, 32 kbytes, and 8 kbytes. 4 kbytes of nonvolatileFlash/EE data memory and 2304 bytes of data RAM are alsoprovided on-chip. The program memory can be configured asdata memory to give up to 60 kbytes of NV data memory indata logging applications.On-chip factory firmware supports in-circuit serial downloadand debug modes (via UART), as well as single-pin emulationmode via the EA pin. The ADuC845, ADuC847, and ADuC848are supported by the QuickStart? development system featuringlow cost software and hardware development tools.Applications Multichannel sensor monitoring Industrial/environmental instrumentation Weigh scales, pressure sensors, temperature monitoring Portable instrumentation, battery-powered systems Data logging, precision system monitoring

Demonstration circuit 2779A is an 8V, 16A synchronous step-down Silent Switcher® 2 with spread spectrum frequency modulation featuring the LT8644S. The demo board is designed for 1.2V output from a 2.7V to 8V input. The LT8644S is a compact, ultralow emission, high efficiency, and high speed synchronous monolithic stepdown switching regulator. The integrated bypass capacitors optimize all the fast current loops and make it easier to minimize EMI emissions by reducing layout sensitivity. Selectable spread spectrum mode further improves EMI performance, making it perfect solution to the noise sensitive applications. Peak current mode control with minimum on-time of as low as 20ns allows high step-down conversion even at high frequency. The LT8644S switching frequency can be programmed either via an external resistor or an external clock over a 300kHz to 3.5MHz range. The default frequency of demo circuit 2779A is 2MHz. The SYNC/MODE pin on the demo board DC2779A is grounded (JP1 at BURST position) by default for low ripple Burst Mode® operation. It can be configured into different operation modes through JP1 and SYNC terminal (Table 1 in the demo manual). Figure 4 in the demo manual shows the efficiency of the circuit at 3.3V input and 5V input in force continuous mode operation (input from VIN terminal). To get accurate efficiency measurement, measure the input voltage at the VIN_SENSE/GND terminals and measure the output voltage at the VOUT+ SENSE/VOUT– SENSE terminals. Figure 5 shows the LT8644S temperature rise on DC2779A demo board at 3.3V input and 5V input in forced continuous mode. The LT8644S is assembled in a 4mm × 4mm LQFN package with exposed pads for low thermal resistance. The rated maximum continuous load current is 16A, while derating may be necessary for certain input voltage and thermal conditions. The demo board has an EMI filter installed. This EMI filter can be included by applying the input voltage at the VEMI terminal. The EMI performance of the board (with EMI filter) is shown on Figure 6 in the demo manual. The red lines in EMI Performance are CISPR25 Class 5 limits. The figure shows that the LT8644S circuit passes the test with a wide margin. To achieve EMI performance as shown in Figure 6, the input EMI filter is required and the input voltage should be applied to VEMI terminal, and the test setup can be referred to the CISPR25 standards. If the input is applied to VIN terminal, the EMI filter is bypassed. The LT8644S data sheet gives a complete description of the part, the operation and application information. The data sheet must be read in conjunction with the demo manual for demo circuit 2779A. The layout recommendations for low EMI operation and maximum thermal performance are available in the data sheet section Low EMI PCB Layout and Thermal Considerations. Contact ADI applications engineer for support.

The LTC2157-14/LTC2156-14/LTC2155-14 are 2-channel simultaneous sampling 250Msps/210Msps/170Msps 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70dB SNR and 90dB spurious free dynamic range (SFDR). The latency is only five clock cycles.DC specs include ?0.85LSB INL (typ), ?0.25LSB DNL (typ) and no missing codes over temperature. The transition noise is 1.82LSBRMS.The digital outputs are Double-Data Rate (DDR) LVDS.The ENC+ and ENC? inputs can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2156-12 12 LTC2156-14 14 Applications Communications Cellular Basestations Software Defined Radios Medical Imaging High Definition Video Testing and Measurement Instruments

The ADV7390?/?ADV7391?/?ADV7392?/ ADV7393?are a family of high speed, digital-to-analog video encoders on single monolithic chips. Three 2.7 V/3.3 V, 10-bit video DACs (a single DAC for the WLCSP package) provide support for composite (CVBS), S-Video (Y-C), or component (YPrPb/RGB) analog outputs in either standard definition (SD) or high definition (HD) video formats. The single DAC WLCSP package supports CVBS (NTSC and PAL) output only in SD resolution (see Table 2).Optimized for low power operation, occupying a minimal footprint, and requiring few external components, these encoders are ideally suited to portable and power-sensitive applications requiring TV-out functionality. Cable detection and DAC auto power-down features ensure that power consumption is kept to a minimum.The ADV7390 / ADV7391 have an 8-bit video input port that supports SD video formats over an SDR interface and HD video formats over a DDR interface. The ADV7392 / ADV7393 have a 16-bit video input port that can be configured in a variety of ways. SD RGB input is supported.All members of the family support embedded EAV/SAV timing codes, external video synchronization signals, and the I2C? and communication protocol. Table 1 and Table 2 list the video standards directly supported by the ADV7390/ADV7391/ ADV7392/ADV7393 family.APPLICATIONS Mobile handsets Digital still cameras Portable media and DVD players Portable game consoles Digital camcorders Set-top box (STB) Automotive infotainment (ADV7392 and ADV7393 only)