The LTC2320-12 is a low noise, high speed octal 12?bit + sign successive approximation register (SAR) ADC with differential inputs and wide input common mode range. Operating from a single 3.3V or 5V supply, the LTC2320?12 has an 8VP-P differential input range, making it ideal for applications which require a wide dynamic range with high common mode rejection. The LTC2320-12 achieves ?0.25LSB INL typical, no missing codes at 12 bits and 77dB SNR.The LTC2320-12 has an onboard low drift (20ppm/?C max) 2.048V or 4.096V temperature-compensated reference. The LTC2320-12 also has a high speed SPI-compatible serial interface that supports CMOS or LVDS. The fast 1.5Msps per channel throughput with no latency makes the LTC2320-12 ideally suited for a wide variety of high speed applications. The LTC2320-12 dissipates only 20mW per channel and offers nap and sleep modes to reduce the power consumption to 26?W for further power savings during inactive periods.Applications High Speed Data Acquisition Systems Communications Remote Data Acquisition Imaging Optical Networking Automotive Multiphase Motor Control

36V High Performance, High Fidelity Dual Audio Operational Amplifier

TLV320DAC32 Evaluation Module (EVM)

The HMC454ST89(E) is a high dynamic range GaAs InGaP Heterojunction Bipolar Transistor (HBT) 1?2 watt MMIC amplifier operating between 0.4 and 2.5 GHz. Packaged in a low cost industry standard SOT89, the amplifier gain is typically 17.8 dB from 0.8 to 1.0 GHz and 12.5 dB from 1.8 to 2.2 GHz. Utilizing a minimum number of external components and a single +5V supply, the amplifier output IP3 can be optimized to +40 dBm at 0.9 GHz or +42 dBm at 2.0 GHz. The high output IP3 and PAE makes the HMC454ST89(E) an ideal driver amplifier for Cellular/PCS/3G, WLL, ISM and Fixed Wireless applications.Applications GSM, GPRS & EDGE? CDMA & W-CDMA? CATV/Cable Modem? Fixed Wireless & WLL

The AD9234 is a dual, 12-bit, 1 GSPS/500 MSPS ADC. The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed for sampling wide bandwidth analog signals. The AD9234 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth buffered inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. Each ADC data output is internally connected to an optional decimate-by-2 block. The AD9234 has several functions that simplify the automatic gain control (AGC) function in a communications receiver.?The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9234 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the acceptable lane rate of the receiving logic device and the sampling rate of the ADC. Multiple device synchronization is supported through the SYSREF? and SYNCINB? input pins.The AD9234 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable 3-wire SPI.The AD9234 is available in a Pb-free, 64-lead LFCSP and is specified over the ?40?C to +85?C industrial temperature range. This product is protected by a U.S. patent.Product Highlights Low power consumption analog core, 12-bit, 1.0 GSPS dual analog-to-digital converter (ADC) with 1.5 W per channel. Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm ? 9 mm 64-lead LFCSP. Pin compatible with the AD9680 14-bit, 1 GSPS dual ADC.Applications Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE Point-to-point radio systems Digital predistortion observation path General-purpose software radios Ultrawideband satellite receiver Instrumentation (spectrum analyzers, network analyzers, integrated RF test solutions) Digital oscilloscopes High speed data acquisition systems DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

TPS22918 5.5V; 2A; 52mΩ On-Resistance Load Switch Evaluation Module

Evaluation Board for the 55V Synchronous Buck Controller w/ 3A Driver

Programmable Logic IC Development Tools SmartFusion EVAL KIT Revision2 A2F200M3F-FGG484

Programmable Logic IC Development Tools SmartFusion EVAL KIT