Demonstration circuit 2779A is an 8V, 16A synchronous step-down Silent Switcher® 2 with spread spectrum frequency modulation featuring the LT8644S. The demo board is designed for 1.2V output from a 2.7V to 8V input. The LT8644S is a compact, ultralow emission, high efficiency, and high speed synchronous monolithic stepdown switching regulator. The integrated bypass capacitors optimize all the fast current loops and make it easier to minimize EMI emissions by reducing layout sensitivity. Selectable spread spectrum mode further improves EMI performance, making it perfect solution to the noise sensitive applications. Peak current mode control with minimum on-time of as low as 20ns allows high step-down conversion even at high frequency. The LT8644S switching frequency can be programmed either via an external resistor or an external clock over a 300kHz to 3.5MHz range. The default frequency of demo circuit 2779A is 2MHz. The SYNC/MODE pin on the demo board DC2779A is grounded (JP1 at BURST position) by default for low ripple Burst Mode® operation. It can be configured into different operation modes through JP1 and SYNC terminal (Table 1 in the demo manual). Figure 4 in the demo manual shows the efficiency of the circuit at 3.3V input and 5V input in force continuous mode operation (input from VIN terminal). To get accurate efficiency measurement, measure the input voltage at the VIN_SENSE/GND terminals and measure the output voltage at the VOUT+ SENSE/VOUT– SENSE terminals. Figure 5 shows the LT8644S temperature rise on DC2779A demo board at 3.3V input and 5V input in forced continuous mode. The LT8644S is assembled in a 4mm × 4mm LQFN package with exposed pads for low thermal resistance. The rated maximum continuous load current is 16A, while derating may be necessary for certain input voltage and thermal conditions. The demo board has an EMI filter installed. This EMI filter can be included by applying the input voltage at the VEMI terminal. The EMI performance of the board (with EMI filter) is shown on Figure 6 in the demo manual. The red lines in EMI Performance are CISPR25 Class 5 limits. The figure shows that the LT8644S circuit passes the test with a wide margin. To achieve EMI performance as shown in Figure 6, the input EMI filter is required and the input voltage should be applied to VEMI terminal, and the test setup can be referred to the CISPR25 standards. If the input is applied to VIN terminal, the EMI filter is bypassed. The LT8644S data sheet gives a complete description of the part, the operation and application information. The data sheet must be read in conjunction with the demo manual for demo circuit 2779A. The layout recommendations for low EMI operation and maximum thermal performance are available in the data sheet section Low EMI PCB Layout and Thermal Considerations. Contact ADI applications engineer for support.

The LTC5507 is an RF power detector for applications operating from 100kHz to 1000MHz. The input frequency range is determined by an external capacitor. A temperature-compensated Schottky diode peak detector and buffer amplifier are combined in a small 6-pin ThinSOT package.The RF input voltage is peak detected using an on-chip Schottky diode and external capacitor. The detected voltage is buffered and supplied to the VOUT pin. A power saving shutdown mode reduces supply current to less than 2?A.Applications Wireless Transceivers Wireless and Cable Infrastructure RF Power Alarm Envelope Detector

Demonstration circuit 760 is a dual, output, 1.1MHz Boost/Inverter in a 3mm x 3mm DFN featuring the LT3472EDD. The demo circuit demonstrates small size and low component count in a Boost Circuit and an Inverting Circuit. The Boost Converter is designed to convert a 2.7V–4.2V input to 15V output at 25mA– 45mA load. The Inverting Circuit generates a –8V output at 35mA–65mA from the same input. Since the maximum VIN of the LT3472EDD is 16V, this demo circuit will work well at higher inputs. The only limitation is the 10V rating of the input capacitor.

The ADN2816 provides the receiver functions of quantization and clock and data recovery for continuous data rates from 10 Mb/s to 675 Mb/s. The ADN2816 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ?40?C to +85?C ambient temperature, unless otherwise noted.The ADN2816 is available in a compact 5 mm ? 5 mm 32-lead chip scale package.ApplicationsSONET OC-1/3/12 and all associated FEC rates Fibre Channel, ESCON, Fast Ethernet, SDI, etc. WDM transpondersRegenerators/repeatersTest equipmentBroadband cross-connects and routers

The LTC3412A is a high efficiency monolithic synchronous, step-down DC/DC converter utilizing a constant frequency, current mode architecture. It operates from an input voltage range of 2.25V to 5.5V and provides a regulated output voltage from 0.8V to 5V while delivering up to 3A of output current. The internal synchronous power switch with 77m? on-resistance increases efficiency and eliminates the need for an external Schottky diode. Switching frequency is set by an external resistor or can be synchronized to an external clock. 100% duty cycle provides low dropout operation extending battery life in portable systems. OPTI-LOOP? compensation allows the transient response to be optimized over a wide range of loads and output capacitors. The LTC3412A can be configured for either Burst Mode operation or forced continuous operation. Forced continuous operation reduces noise and RF interference while Burst Mode operation provides high efficiency by reducing gate charge losses at light loads. In Burst Mode operation, external control of the burst clamp level allows the output voltage ripple to be adjusted according to the application requirements.APPLICATIONS Point-of-Load Regulation Notebook Computers Portable Instruments Distributed Power Systems

Demonstration Circuit 2048A is a nanopower buckboost DC/DC with energy harvesting battery life extender featuring the LTC3330. The LTC3330 integrates a high voltage energy harvesting power supply plus a DC/DC converter powered by a primary cell battery to create a single output supply for alternative energy applications. The energy harvesting power supply, consisting of an integrated low-loss full-wave bridge with a high voltage buck converter, harvests energy from piezoelectric, solar or magnetic sources. The primary cell input powers a buck-boost converter capable of operating down to 1.8V at its input. Either DC/DC converter can deliver energy to a single output.

The ADuM6420A/ADuM6421A/ADuM6422A/ADuM6423A/ADuM6424A1 are quad-channel digital isolators with an isoPower?, integrated, isolated dc-to-dc converter. Based on the Analog Devices, Inc., iCoupler? technology, the dc-to-dc converter provides regulated, isolated power that meets CISPR 32/EN 55032 Class B limits at a full load on a 2-layer printed circuit board (PCB) with ferrites. Popular voltage combinations and the associated output current levels are listed in Table 1 in the data sheet.The ADuM6420A/ADuM6421A/ADuM6422A/ADuM6423A/ADuM6424A eliminate the need for a separate, isolated dc-to-dc converter in 500 mW, isolated designs. The iCoupler chip scale transformer technology is used for isolated logic signals and for the magnetic components of the dc-to-dc converter. The result is a small form factor, total isolation solution.The ADuM6420A/ADuM6421A/ADuM6422A/ADuM6423A/ADuM6424A isolators provide four independent isolation channels. See the Pin Configurations and Function Descriptions in the data sheet for additional information.APPLICATIONS RS-232 transceivers Power supply start-up bias and gate drives Isolated sensor interfaces Automotive on-board charger (OBC) and dc to dc Industrial programmable logic controllers (PLCs)1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

The ADRV9009 is a highly integrated, radio frequency (RF), agile transceiver offering dual transmitters and receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption demanded by 3G, 4G, and 5G macro cell time division duplex (TDD) base station applications.The receive path consists of two independent, wide bandwidth, direct conversion receivers with state-of-the-art dynamic range. The device also supports a wide bandwidth, time shared observation path receiver (ORx) for use in TDD applications. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, thus eliminating the need?for these functions in the digital baseband. Several auxiliary functions, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose inputs/outputs (GPIOs) for the power amplifier (PA), and RF front-end control are also integrated.In addition to automatic gain control (AGC), the ADRV9009 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time ?-? ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing, relaxes the requirements of the RF filters when compared to traditional intermediate frequency (IF) receivers.The transmitters use an innovative direct conversion modulator that achieves high modulation accuracy with exceptionally low noise.The observation receiver path consists of a wide bandwidth, direct conversion receiver with state-of-the-art dynamic range.The fully integrated phase-locked loop (PLL) provides high performance, low power, fractional-N RF frequency synthesis for the transmitter (Tx) and receiver (Rx) signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multichip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9009 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, thus reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9009 can be powered directly from 1.3 V regulators and 1.8 V regulators, and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9009 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G TDD macrocell base stations TDD active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment

Demonstration circuit 1529A features the LTC2657 Octal 16-bit DAC with ±4LSB INL error. This device establishes a new board-density benchmark for 16-bit DACs and advances performance standards for output drive, crosstalk and load regulation in single supply, voltage-output multiple DACs.

The LTC1625 is a synchronous step-down switching regulator controller that drives external N-Channel power MOSFETs using few external components. Current mode control with MOSFET VDS sensing eliminates the need for a sense resistor and improves efficiency. The frequency of a nominal 150kHz internal oscillator can be synchronized to an external clock over a 1.5:1 frequency range.Burst Mode? operation at low load currents reduces switching losses and low dropout operation extends operating time in battery-powered systems. A forced continuous mode control pin can assist secondary winding regulation by disabling Burst Mode operation when the main output is lightly loaded.Fault protection is provided by foldback current limiting and an output overvoltage comparator. An external capacitor attached to the RUN/SS pin provides soft start capability for supply sequencing. A wide supply range allows operation from 3.7V (3.9V for LTC1625I) to 36V at the input and 1.19V to VIN at the output.Applications Notebook and Palmtop Computers, PDAs Cellular Telephones and Wireless Modems Battery Chargers Distributed Power