The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of <1 ppm. Thisfrequency agile PLL allows the ADF7020-1 to be used infrequency-hopping spread spectrum (FHSS) systems. The VCOoperates at twice the fundamental frequency to reduce spuriousemissions and frequency pulling problems.The transmitter output power is programmable in 63 steps from?20 dBm to +13 dBm. The transceiver RF frequency, channelspacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of2.3 V to 3.6 V and can be powered down when not in useA low IF architecture is used in the receiver (200 kHz),minimizing power consumption and the external componentcount and avoiding interference problems at low frequencies.The ADF7020-1 supports a wide variety of programmablefeatures, including Rx linearity, sensitivity, and IF bandwidth,allowing the user to trade off receiver sensitivity and selectivityfor current consumption, depending on the application. Thereceiver also features a patent-pending automatic frequencycontrol (AFC) loop, allowing the PLL to compensate forfrequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperaturesensor, an external analog input, the battery voltage, or theRSSI signal, which provides savings on an ADC in someapplications. The temperature sensor is accurate to ?10?C overthe full operating temperature range of ?40?C to +85?C. Thisaccuracy can be improved by doing a 1-point calibration atroom temperature and storing the result in memory.Applications Low cost wireless data transfer Wireless medical applications Remote control/security systems Wireless metering Keyless entry Home automation Process and building control

The HMC821LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The synthesizer consists of an integrated low noise VCO with a triband output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.The fractional synthesizer features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.For theory of operation and register map refer to the 'PLLs with Integrated VCO - RF VCOs' Operating Guide.Applications Cellular/4G Infrastructure Repeaters and Femtocells Communications Test Equipment CATV Equipment Phased Array Applications DDS Replacement? Very High Data Rate Radios

The LTC2952 is a power management device that features three main functions: pushbutton on/off control of system power, ideal diode PowerPath? controllers and system monitoring. The LTC2952?s pushbutton input, which provides on/off control of system power, has independently adjustable ON and OFF debounce times. A simple microprocessor interface involving an interrupt signal allows for proper system housekeeping prior to power-down. The ideal diode PowerPath controllers provide automatic low loss switchover between two DC sources by regulating two external P-channel MOSFETs to have a small 20mV forward drop. High reliability systems may utilize the LTC2952?s monitoring features to ensure system integrity. These features include: power-fail, voltage monitoring and ?P watchdog. The LTC2952 operates over a wide operating voltage range to accommodate a large variety of input power supplies. The part?s combination of low 20mV external MOSFET regulation and very low standby current matches battery powered and power conscious application requirements.Applications Desktop and Notebook Computers Portable Instrumentations Cell Phones, PDA and Handheld Computers Servers and Computer Peripherals Battery Backup Systems

The LTC2631 is a family of 12-, 10-, and 8-bit voltage-output DACs with an integrated, high accuracy, low-drift reference in an 8-lead TSOT-23 package. It has a rail-to-rail output buffer that is guaranteed monotonic.The LTC2631-L has a full-scale output of 2.5V, and operates from a single 2.7V to 5.5V supply. The LTC2631-H has a full-scale output of 4.096V, and operates from a 4.5V to 5.5V supply. A 10ppm/?C reference output is available at the REF pin.Each DAC can also operate in External Reference mode, in which a voltage supplied to the REF pin sets the fullscale output.The LTC2631 DACs use a 2-wire, I2C-compatible serial interface. The LTC2631 operates in both the standard mode (clock rate of 100kHz) and the fast mode (clock rate of 400kHz).The LTC2631 incorporates a power-on reset circuit. Options are available for reset to zero-scale or reset to mid-scale after power-up.Applications Mobile Communications Process Control and Industrial Automation Automatic Test Equipment Portable Equipment Automotive Optical Networking

The AD9988 is a highly integrated device with four 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores, and four 12-bit, 4 GSPS rate, RF analog-to-digital converter (ADC) cores. The device supports four transmitter channels and four receiver channels with a 4T4R configuration. This product is well suited for four-antenna TDD transmitter applications, where the receiver path can be shared between receiver and observation modes. The GPIO pins can be configured and toggled to support different user modes, while phase coherency is maintained. The maximum radio channel bandwidth supported is 1.2 GHz in a 4T4R configuration and a sample resolution of 16 bits. The AD9988 features a 16-lane 24.75 Gbps JESD204C or 15.5 Gbps JESD204B serial data port that allows up to eight lanes per transmit/receive link, an on-chip clock multiplier, and digital signal processing capability targeted at multiband direct to RF radio applications.APPLICATIONSWireless communications infrastructureW-CDMA, LTE, LTE-A, massive multiple input multiple output (MIMO)Point to point microwave, E-band, and 5G mmWaveBroadband communications systemsDOCSIS 3.0+ cable modem termination system (CMTS)Communication test and measurement systems

The AD9172 is a high performance, dual, 16-bit digital-to-analog converter (DAC) that supports DAC sample rates to 12.6 GSPS. The device features an 8-lane, 15 Gbps JESD204B data input port, a high performance, on-chip DAC clock multiplier, and digital signal processing capabilities targeted at single-band and multiband direct to radio frequency (RF) wireless applications.The AD9172 features three complex data input channels per RF DAC that are bypassable. Each data input channel includes a configurable gain stage, an interpolation filter, and a channel numerically controlled oscillator (NCO) for flexible, multiband frequency planning. The device supports up to a 1.5 GSPS complex data rate per input channel and is capable of aggregating multiple complex input data streams up to a maximum complex data rate of 1.5 GSPS. Additionally, the AD9172 supports ultrawide bandwidth modes bypassing the channelizers to provide maximum data rates of up to 3.08 GSPS (with 16-bit resolution) and 4.1 GSPS (with 12-bit resolution).The AD9172 is available in a 144-ball BGA_ED package.PRODUCT HIGHLIGHTS Supports single-band and multiband wireless applications with three bypassable complex data input channels per RF DAC at a maximum complex input data rate of 1.5 GSPS. One independent NCO per input channel. Ultrawide bandwidth channel bypass modes supporting up to 3 GSPS data rates with 16-bit resolution and 4 GSPS with 12-bit resolution. Low power dual converter decreases the amount of power consumption needed in high bandwidth and multichannel applications.APPLICATIONS Wireless communications infrastructure Multiband base station radios Microwave/E-band backhaul systems Instrumentation, automatic test equipment (ATE) Radars and jammers

The ADGS1208/ADGS1209 are analog multiplexers comprisingeight single channels and four differential channels, respectively. Aserial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features, such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1208/ADGS1209devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1208/ADGS1209 can also operate in burst mode todecrease the time between SPI commands.iCMOS? construction ensures ultralow power dissipation,making the devices ideally suited for portable and batterypoweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked. The ultralow on capacitance (CON) and exceptionally low chargeinjection (QINJ) of these multiplexers make them ideal solutionsfor data acquisition and sample-and-hold applications, wherelow glitch and fast settling are required.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and Error detection capabilities allows for the use of the ADGS1208/ADGS1209 in safety critical systems.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The ADN4620/ADN4621 are dual-channel, signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 2.5 Gbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high speed signals, such as current mode logic (CML).The ADN4620/ADN4621 include a refresh mechanism to monitor the input and output states and ensure that they remain the same in the absence of data transitions (for example, at power-on). For lower power consumption and high speed operation with low jitter, the isolator circuits rely on 1.8 V supplies, while 3.3 V supplies are used for LVDS receivers to support the full common-mode range with an input voltage range (input common mode plus differential input voltage) of 0 V to 2.4 V per Table 2 in the data sheet.The devices are fully specified over a wide industrial temperature range and are available in a compact SSOP package with 5.3 mm creepage (for reinforced insulation at ac mains voltages).APPLICATIONS Analog front-end isolation Data plane isolation Isolated high speed clock and data links Multigigabit serialization/deserialization (SERDES) PCB-to-PCB optical replacement (for example, short reach fiber)Protected by U.S. Patents 7,075,329; 9,941,565; and 10,205,442. Other patents are pending.

The HMC698LP5(E) is a frequency synthesizer with a wideband reversible polarity digital PFD and lock detect output. The divider operates unconditionally from 80 - 7000 MHz with a continuous integer division ratio of 12 to 259. The HMC698LP5(E) high frequency operation along with ultra low phase noise floor make possible synthesizers with wide loop bandwidth and low N resulting in fast settling and very low phase noise. When used in conjunction with a differential loop filter, the HMC698LP5(E) can be used to phase lock a VCO to a reference oscillator.Applications Satellite Communication Systems Point-to-Point Radios Military Applications Sonet Clock Generation

The HMC8100LP6JE is a highly integrated IF receiver chip that converts radio frequency (RF) input signals ranging from 800 MHz to 4000 MHz down to a single ended intermediate frequency (IF) signal of 140 MHz at its output. The IF receiver chip is housed in a compact 6 mm x 6 mm LFCSP package and supports complex modulations up to 1024 QAM. The HMC8100LP6JE device includes two VGAs, three power detectors, a programmable AGC block, and selected integrated bandpass filters with 14 MHz, 28 MHz, 56 MHz, and 112 MHz bandwidth. The HMC8100LP6JE also supports baseband IQ interfaces after the mixer so that the chips can be used in the full ODU configuration.The HMC8100LP6JE supports all of the standard microwave frequency bands from 6 to 42 GHz.Applications Point to point communications Satellite communications Wireless microwave backhaul systemsPlease also view complimentary product HMC8200, Intermediate Frequency Transmitter 800 MHz - 4000 MHz.