The ADM2484E is an isolated data transceiver with ?15 kVESD protection suitable for high speed, half- or full-duplex communication on multipoint transmission lines. For half-duplex operation, the transmitter outputs and receiver inputs share the same transmission line. Transmitter Output Pin Y links externally to Receiver Input Pin A, and Transmitter Output Pin Z links externally to Receiver Input Pin B.Designed for balanced transmission lines, the ADM2484Ecomplies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E). The device employs Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package.The differential transmitter outputs and receiver inputs featureelectrostatic discharge circuitry that provides protection up to ?15 kV using the human body model (HBM). The logic side of the device can be powered with either a 5 V or a 3.3 V supply, whereas the bus side requires an isolated 3.3 V supply.The device has current-limiting and thermal shutdown featuresto protect against output short circuits and situations where buscontention causes excessive power dissipation.Applications Isolated RS-485/RS-422 interfaces Industrial field networks INTERBUS Multipoint data transmission systems

The ADGS1208/ADGS1209 are analog multiplexers comprisingeight single channels and four differential channels, respectively. Aserial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features, such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1208/ADGS1209devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1208/ADGS1209 can also operate in burst mode todecrease the time between SPI commands.iCMOS? construction ensures ultralow power dissipation,making the devices ideally suited for portable and batterypoweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked. The ultralow on capacitance (CON) and exceptionally low chargeinjection (QINJ) of these multiplexers make them ideal solutionsfor data acquisition and sample-and-hold applications, wherelow glitch and fast settling are required.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and Error detection capabilities allows for the use of the ADGS1208/ADGS1209 in safety critical systems.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The EVAL-ADL5902-ARDZ shield illustrates the functionality of the ADL5902, a 50 MHz to 9 GHz 65 dB TruPwr™ RMS responding RF power detector. The voltage outputs of the ADL5902 are routed to the ANALOG IN connector of the Arduino base board. This allows the RF power detector’s output voltage to be easily digitized and processed by the Arduino base board’s integrated six-channel ADC. The output of the ADL5902’s on-board temperature sensor is also routed to one of the ANALOG IN pins.

DC1322A: Demo Board for LT3751 High Voltage Capacitor Charger Controller with Regulation

Demonstration circuit 649 is a Telecom isolated DC/DC converter featuring the LTC3803 constant frequency current mode flyback controller. The DC649 converts an isolated 36V to 72V input and provides 2A of output current at 5V. The 200kHz constant frequency operation is maintained down to very light load to reduce low frequency noise generated over a wide range of load current. The converter provides high output voltage accuracy (typically ±2%) over wide load range with no minimum load requirement.

The AD5683R/AD5682R/AD5681R/AD5683, members of thenanoDAC+? family, are low power, single-channel, 16-/14-/12-bitbuffered voltage out digital-to-analog converters (DACs). Thedevices, except the AD5683, include an enabled by default internal2.5 V reference, offering 2 ppm/?C drift. The output span can beprogrammed to be 0 V to VREF or 0 V to 2 ? VREF. All devicesoperate from a single 2.7 V to 5.5 V supply and are guaranteedmonotonic by design. The devices are available in a 2.00 mm ?2.00 mm, 8-lead LFCSP or a 10-lead MSOP.The internal power-on reset circuit ensures that the DAC registeris written to zero scale at power-up while the internal outputbuffer is configured in normal mode. TheAD5683R/AD5682R/AD5681R/AD5683 contain a power-downmode that reduces the current consumption of the device to 2 ?A(maximum) at 5 V and provides software selectable output loadswhile in power-down mode.The AD5683R/AD5682R/AD5681R/AD5683 use a versatile3-wire serial interface that operates at clock rates of up to 50 MHz.Some devices also include asynchronous RESET pin and VLOGICpin options, allowing 1.8 V compatibilityProduct Highlights High Relative Accuracy (INL). AD5683R/AD5683 (16-bit): ?2 LSB maximum. Low Drift, 2.5 V On-Chip Reference. 2 ppm/?C typical temperature coefficient. 5 ppm/?C maximum temperature coefficient. Two Package Options. 2.00 mm ? 2.00 mm, 8-lead LFCSP. 10-lead MSOP.Applications Process controls Data acquisition systems Digital gain and offset adjustment Programmable voltage sources

The AD5590 is a 16-channel input and 16-channel output analog I/O port with eight uncommitted amplifiers, operating from a single 4.5 V to 5.25 V supply. The AD5590 comprises 16 input channels multiplexed into a 1 MSPS, 12-bit successive approximation ADC with a sequencer to allow a preprogrammed selection of channels to be converted sequentially. The ADC contains a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 1 MHz.The conversion process and data acquisition are controlled using ASYNC and the serial clock signal, allowing the device to easily interface with microprocessors or DSPs. The input signal is sampled on the falling edge of ASYNC and conversion is also initiated at this point. There are no pipeline delays associated with the ADC. By setting the relevant bits in the control register, the analog input range for the ADC can be selected to be a 0 V to VREFA input or a 0 V to 2 ? VREFA with either straight binary or twos complement output coding. The conversion time is determined by the ASCLK frequency because it is also used as the master clock to control the conversion.The DAC section of the AD5590 comprises sixteen 12-bit DACs divided into two groups of eight. Each group has an on-chip reference. The on-board references are off at power-up, allowing the use of external references. The internal references are enabled via a software write.The AD5590 incorporates a power-on reset circuit that ensures that the DAC outputs power up to 0 V and remain powered up at this level until a valid write takes place. The DAC contains a power-down feature that reduces the current consumption of the device and provides software-selectable output loads while in power-down mode for any or all DAC channels. The outputs of all DACs can be updated simultaneously using the LDAC function, with the added functionality of user-selectable DAC channels to simultaneously update. There is also an asynchronous CLR that updates all DACs to a user-programmable code: zero scale, midscale, or full scale.The AD5590 contains eight low noise, single-supply amplifiers. These amplifiers can be used for signal conditioning for the ADCs, DACs, or other independent circuitry, if required.APPLICATIONS Optical Line Cards (Monitoring and Control) Base Stations General Purpose Analog I/O Monitoring and control

The HMC539ALP3/539ALP3E is a broadband5-bit GaAs IC digital attenuator in a low cost leadless surface mount package. This single positive control line per bit digital attenuator utilizes an offchip AC ground capacitor for near DC operation,making it suitable for a wide variety of RF and IFapplications. Covering DC to 4 GHz, the insertion loss is less than 0.7 dB typical. The attenuatorbit values are 0.25 (LSB), 0.5, 1, 2, and 4 dB for atotal attenuation of 7.75 dB. Attenuation accuracy isexcellent at ? 0.05 dB typical step error. The attenu-ator also features a high IIP3 of +62 dBm. Five TTL/CMOS control inputs are used to select each attenuation state. A single Vdd bias of +3V to +5V is required.Applications Cellular infrastructure ISM, MMDS, WLAN, WiMAX, WiBro Microwave radio and VSAT Test equipment and sensors

The 16-bit AD7383 and the 14-bit AD7384 are a pin-compatible family of dual simultaneous sampling, high speed, low power, successive approximation register (SAR), analog-to-digital converters (ADCs) that operate from a 3.0 V to 3.6 V power supply and feature throughput rates up to 4 MSPS. The analog input type is pseudo differential and is sampled and converted on the falling edge of CS.Integrated on-chip oversampling blocks improve dynamic range and reduce noise at lower bandwidths. A buffered internal 2.5 V reference is included. Alternatively, an external reference up to 3.3 V can be used.The conversion process and data acquisition use standard control inputs that allow simple interfacing to microprocessors or digital signal processors (DSPs). The devices are compatible with 1.8 V, 2.5 V, and 3.3 V interfaces, using a separate logic supply.The AD7383 and the AD7384 are available in a 16-lead lead frame chip scale package (LFCSP) with operation specified from ?40?C to +125?C.Multifunction pin names may be referenced by their relevant function only.PRODUCT HIGHLIGHTS Dual simultaneous sampling and conversion with two complete ADC functions. Pin-compatible product family. High 4 MSPS throughput rate. Space saving 3 mm ? 3 mm LFCSP. Integrated oversampling block to increase dynamic range, reduce noise, and reduce SCLK speed requirements. Pseudo differential analog inputs. Small sampling capacitor reduces amplifier drive burden.APPLICATIONS Motor control position feedback Motor control current sense Sonar Power quality Data acquisition systems Erbium doped fiber amplifier (EDFA) applications I and Q demodulation

The HMC833LP6GE is a low noise, wide band, Fractional-N Phase-Locked-Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO) with a fundamental frequency of 1500 MHz - 3000 MHz, and an integrated VCO Output Divider (divide by 1/2/4/6.../60/62) and doubler, that together allow the HMC833LP6GE to generate frequencies from 25 MHz to 6000 MHz. The integrated Phase Detector (PD) and delta-sigma modulator, capable of operating at up to 100 MHz, permit wider loop-bandwidths with excellent spectral performance.The HMC833LP6GE features industry leading phase noise and spurious performance, across all frequencies, that enable it to minimize blocker effects, and improve receiver sensitivity and transmitter spectral purity. The superior noise floor (< -170 dBc/Hz) makes the HMC833LP6GE an ideal source for a variety of applications - such as; LO for RF mixers, a clock source for high-frequency data-converters, or a tunable reference source for ultra-low spurious applications.Additional features of the HMC833LP6GE include RF output power control from 0 to 9 dB (3 dB steps), output Mute function, and a delta-sigma modulator Exact Frequency Mode which enables users to generate output frequencies with 0 Hz frequency error.Applications Cellular Infrastructure Microwave Radio WiMax, WiFi Communications Test Equipment CATV Equipment DDS Replacement Military Tunable Reference Source for?Spurious- Free Performance