The LTC1474/LTC1475 series are high efficiency step-down converters with internal P-channel MOSFET power switches that draw only 10?A typical DC supply current at no load while maintaining output voltage. The LTC1474 uses logic-controlled shutdown while the LTC1475 features pushbutton on/off. The low supply current coupled with Burst Mode? operation enables the LTC1474/LTC1475 to maintain high efficiency over a wide range of loads. These features, along with their capability of 100% duty cycle for low dropout and wide input supply range, make the LTC1474/LTC1475 ideal for moderate current (up to 300mA) battery-powered applications. The peak switch current is user-programmable with an optional sense resistor (defaults to 325mA minimum if not used) providing a simple means for optimizing the design for lower current applications. The peak current control also provides short-circuit protection and excellent startup behavior. A low-battery detector that remains functional in shutdown is provided . The LTC1474/LTC1475 series availability in 8-lead MSOP and SO packages and need for few additional components provide for a minimum area solution.Applications Cellular Telephones and Wireless Modems 4mA to 20mA Current Loop Step-Down Converter Portable Instruments Battery-Operated Digital Devices Battery Chargers Inverting Converters Intrinsic Safety Applications

The ADP5091/ADP5092 are intelligent, integrated energy harvesting, ultralow power management unit (PMU) solutions that convert dc power from PV cells or TEGs. These devices charge storage elements such as rechargeable Li-Ion batteries, thin film batteries, super capacitors, or conventional capacitors, and power up small electronic devices and battery free systems.The ADP5091/ADP5092 provide efficient conversion of the harvested limited power from a 6 ?W to 600 mW range with submicrowatt operation losses. With the internal cold start circuit, the regulator can start operating at an input voltage as low as 380 mV. After cold startup, the regulator is functional at an input voltage range of 0.08 V to 3.3 V. An additional 150 mA regulated output can be programmed by an external resistor divider or the VID pin.The MPPT control keeps the input voltage ripple in a fixed range to maintain stable dc-to-dc boost conversion. The dynamic sensing mode and no sensing mode, both programming regulation points of the input voltage, allow extraction of the highest possible energy from the harvester. A programmable minimum operation threshold enables boost shutdown during a low input condition.As a low light indicator for a microprocessor, the LLD pin of the ADP5091 is the MINOP comparator output. However, the REG_GOOD flag of the ADP5092 monitors the REG_OUT voltage. In addition, the DIS_SW pin can temporarily shut down the boost regulator and is RF transmission friendly.The charging control function of the ADP5091/ADP5092 protects the rechargeable energy storage, which is achieved by monitoring the battery voltage with the programmable charging termination voltage and the shutdown discharging voltage. In addition, a programmable PGOOD flag monitors the SYS voltage.An optional primary cell battery can be connected and managed by an integrated power path management control block that is programmable to switch the power source from the energy harvester, rechargeable battery, and primary cell battery.The ADP5091/ADP5092 are available in a 24-lead LFCSP and are rated for a ?40?C to +125?C temperature range.Applications Photovoltaic (PV) cell energy harvesting Thermoelectric generators (TEGs) energy harvesting Industrial monitoring Self powered wireless sensor devices Portable and wearable devices with energy harvesting

The ADRV9009 is a highly integrated, radio frequency (RF), agile transceiver offering dual transmitters and receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption demanded by 3G, 4G, and 5G macro cell time division duplex (TDD) base station applications.The receive path consists of two independent, wide bandwidth, direct conversion receivers with state-of-the-art dynamic range. The device also supports a wide bandwidth, time shared observation path receiver (ORx) for use in TDD applications. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, thus eliminating the need?for these functions in the digital baseband. Several auxiliary functions, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose inputs/outputs (GPIOs) for the power amplifier (PA), and RF front-end control are also integrated.In addition to automatic gain control (AGC), the ADRV9009 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time ?-? ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing, relaxes the requirements of the RF filters when compared to traditional intermediate frequency (IF) receivers.The transmitters use an innovative direct conversion modulator that achieves high modulation accuracy with exceptionally low noise.The observation receiver path consists of a wide bandwidth, direct conversion receiver with state-of-the-art dynamic range.The fully integrated phase-locked loop (PLL) provides high performance, low power, fractional-N RF frequency synthesis for the transmitter (Tx) and receiver (Rx) signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multichip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9009 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, thus reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9009 can be powered directly from 1.3 V regulators and 1.8 V regulators, and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9009 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G TDD macrocell base stations TDD active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment

The AD9635 is a dual, 12-bit, 80 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) forsignaling a new output byte are provided. Individual channelpower-down is supported; the AD9635 typically consumes lessthan 2 mW in the full power-down state. The ADC providesseveral features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9635 is available in a RoHS-compliant, 32-lead LFCSP. It is specified over the industrial temperature range of ?40?Cto +85?C. PRODUCT HIGHLIGHTS Small Footprint. Two ADCs are contained in a small, spacesaving package. Low Power. The AD9635 uses 115 mW/channel at 125 MSPS with scalable power options. Pin Compatibility with the AD9645, a 14-Bit Dual ADC. Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Broadband data applications Battery-powered instruments Hand held scope meters Portable medical imaging and ultrasound Radar/LIDAR

Demonstration circuit 1697A features the LTC2945. The LTC2945 is a rail-to-rail system monitor that measures current, voltage, and power. It features an operating range of 2.7V to 80V and includes a shunt regulator for supplies above 80V to allow flexibility in the selection of input supply. The current common mode measurement range of 0V to 80V is independent of the input supply. An onboard 0.75% accurate 12-bit ADC measures load current, input voltage and an auxiliary external voltage. A 24-bit power value is generated by digitally multiplying the measured 12-bit load current and input voltage data. Minimum and maximum values are stored and an overrange alert with programmable thresholds minimizes the need for software polling. Data is reported via a standard I2C interface. The demo board is populated for a 5A application. This can be changed by populating R1 accordingly.

The ADL8106 is a gallium arsenide (GaAs), pseudomorphic high electron mobility transfer (pHEMT), monolithic microwave integrated circuit (MMIC), wideband low noise amplifier that operates from 20 GHz to 54 GHz. The ADL8106 provides a gain of 21.5 dB, an output power for 1 dB compression (OP1dB) of 14 dBm, and a typical output third-order intercept (OIP3) of 21.5 dBm at 30 GHz to 44 GHz. The ADL8106 requires 120 mA from a 3 V supply voltage (VDD) and features inputs and outputs that are internally matched to 50 ?, facilitating integration into multichip modules (MCMs). All data is taken with the RFIN and RFOUT pads connected via one 0.076 mm (3 mil) wide gold ribbon bond of 0.076 mm to 0.152 mm (3 mil to 6 mil) minimal length.

The AD9762 is the 12-bit resolution member of the TxDAC series of high performance, low power CMOS digital-to-analog converters (DACs). The TxDAC family which consists of pin compatible 8-, 10-, 12-, and 14-bit DACs is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface options, small outline package and pinout, thus providing an upward or downward component selection path based on performance, resolution and cost. The AD9762 offers exceptional ac and dc performance while supporting update rates up to 125 MSPS.The AD9762's flexible single-supply operating range of 2.7 V to 5.5 V and low power dissipation are well suited for portable and low power applications. Its power dissipation can be further reduced to a mere 45 mW without a significant degradation in performance by lowering the full-scale current output. Also, a powerdown mode reduces the standby power dissipation to approximately 25 mW.The AD9762 is manufactured on an advanced CMOS process. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a 1.2 V temperature compensated bandgap reference have been integrated to provide a complete monolithic DAC solution. Flexible supply options support +3 V and +5 V CMOS logic families.The AD9762 is a current-output DAC with a nominal full-scale output current of 20 mA and > 100 k(ohm) output impedance.Differential current outputs are provided to support single-ended or differential applications. Matching between the two current outputs ensures enhanced dynamic performance in a differential output configuration. The current outputs may tied directly to an output resistor to provide two complementary, single-ended voltage outputs or fed directly into a transformer. The output voltage compliance range is 1.25 V.The on-chip reference and control amplifier are configured for maximum accuracy and flexibility. The AD9762 can be driven by the on-chip reference or by a variety of external reference voltages. The internal control amplifier which provides a wide (>10:1) adjustment span allows the AD9762 full-scale current to be adjusted over a 2 mA to 20 mA range while maintaining excellent dynamic performance. Thus, the AD9762 may operate at reduced power levels or be adjusted over a 20 dB range to provide additional gain ranging capabilities.The AD9762 is available in a 28-pin SOIC package. It is specified for operation over the industrial temperature range.

The ADL6317 is a transmit variable gain amplifier (VGA) that provides an interface from radio frequency digital-to-analog converters (RF DACs), transceivers, and systems on a chip (SoC) to power amplifiers. Integrated balun and hybrid couplers allow high performance RF capability in the frequency range of 1500 MHz to 3000 MHz.To optimize performance vs. power level, the ADL6317 includes a voltage variable attenuator (VVA), high linearity amplifiers, and a digital step attenuator (DSA). All of the devices integrated into the ADL6317 are programmable via a 4-wire serial port interface (SPI).The ADL6317 is manufactured on an advanced silicon germanium (SiGe), bipolar complementary metal oxide semiconductor (BiCMOS) process.Applications 2G/3G/4G/long-term evolution (LTE) in FDD/TDD broadband communication systems

DC1010A-C: Demo Board for the LTC2487 16-Bit 2-/4-Channel ΔΣ ADC with PGA, Easy Drive and I2C Interface.

DC789A: Demo Board for the LTC4062 Standalone Linear Li-Ion Battery Charger with Micropower Comparator.