The AD9083 is a 16-channel, 125 MHz bandwidth, continuous time ?-? (CTSD) ADC. The device features an on-chip, programmable, single-pole antialiasing filter and termination resistor that is designed for low power, small size, and ease of use. The 16 ADC cores features a first-order, CTSD modulator architecture with integrated, background nonlinearity correction logic and self cancelling dither. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. Each ADC has a signal processing tile to filter out of band shaped noise from the ?-? ADC and reduce the sample rate. Each tile contains a cascaded integrator comb (CIC) filter, a quadrature digital downconverter (DDC) with multiple finite input response (FIR) decimation filters (decimate by J block), or up to three quadrature DDC channels with averaging decimation filters for data gating applications. Users can configure the Subclass 1 JESD204B based, high speed serialized output in a variety of lane configurations (up to four), depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, TRIG?, and SYNCINB? input pins. The AD9083 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V capable 3-wire serial port interface (SPI). The AD9083 is available in a Pb-free, 100-ball CSP_BGA and is specified over the ?40?C to +85?C industrial temperature range.This product is protected by a US patent.APPLICATIONS Millimeter wave imaging Electronic beam forming and phased arrays Multichannel wideband receivers Electronic support measuresPRODUCT HIGHLIGHTS Continuous time, ?-? analog-to-digital converters (ADCs) support signal bandwidths of up to 125 MHz with low power and minimal filtering. Integrated digital processing blocks reduce data payload and lower overall system cost. Configurable JESD204B interface reduces printed circuit board (PCB) complexity. Flexible power-down options. SPI interface controls various product features and functions to meet specific system requirements. Small, 9 mm ? 9 mm, 100-ball CSP_BGA package, simple interface, and integrated digital processing save PCB space.

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The AD8278 and AD8279 are general-purpose difference amplifiers intended for precision signal conditioning in power critical applications that require both high performance and low power. The AD8278 and AD8279 provide exceptional common-mode rejection ratio (80 dB) and high bandwidth while amplifying input signals that are well beyond the supply rails. The on-chip resistors are laser trimmed for excellent gain accuracy and high CMRR. They also have extremely low gain drift vs. temperature.The common-mode range of the amplifier extends to almost triple the supply voltage (for G = ?), making the amplifer ideal for single-supply applications that require a high common-mode voltage range. The internal resistors and ESD circuitry at the inputs also provide overvoltage protection to the op amp.The AD8278 and AD8279 can be used as difference amplifiers with G = ? or G = 2. They can also be connected in a high precision, single-ended configuration for non inverting and inverting gains of ??, ?2, +3, +2, +1?, +1, or +?. The AD8278 and AD8279 provide an integrated precision solution that has a smaller size, lower cost, and better performance than a discrete alternative.The AD8278 and AD8279 operate on single supplies (2.0 V to 36 V) or dual supplies (?2 V to ?18 V). The maximum quiescent supply current is 200 ?A, which is ideal for battery-operated and portable systems. For unity-gain difference amplifiers with similar performance, refer to the AD8276 and AD8277 data sheets.The AD8278 is available in the space-saving 8-lead MSOP and SOIC packages, and the AD8279 is offered in a 14-lead SOIC package. Both are specified for performance over the industrial temperature range of ?40?C to +85?C and are fully RoHS compliant.ApplicationsVoltage measurement and monitoringCurrent measurement and monitoringInstrumentation amplifier building blockPortable, battery-powered equipmentTest and measurement

The digital output ADXL3591 is a low noise density, low 0 g offset drift, low power, 3-axis microelectromechanical system (MEMS) accelerometer with selectable measurement ranges. The ADXL359 supports the ?10 g, ?20 g, and ?40 g ranges.The ADXL359 offers industry leading noise, minimal offset drift over temperature, and long-term stability, enabling precision applications with minimal calibration.The low drift, low noise, and low power ADXL359 enables accurate tilt measurement in an environment with high vibration, such as airborne inertial measurement units (IMUs). The low noise over higher frequencies is ideal for wireless condition monitoring.The ADXL359 multifunction pin names may be referenced only by their relevant function for either the serial peripheral interface (SPI) or limited I2C interface.APPLICATIONS IMUs and altitude and heading reference systems (AHRSs) Platform stabilization systems Vibration sensing Structural health monitoring Tilt sensing Robotics Condition monitoringProtected by U.S. Patents 8,472,270; 9,041,462; 8,665,627; 8,917,099; 6,892,576; 9,297,825; and 7,956,621.

The ADF5000 prescaler is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input to a PLL IC, such as the?ADF4156 or the ADF4106. The ADF5000 provides a divide-by-2 function. The ADF5000 operates from a 3.3 V supply and has differential 100 ? RF outputs to allow direct interface to the differential RF inputs of PLLs such as the ADF4156 and ADF4106.Applications PLL frequency range extender Point-to-point radios VSAT radios Communications test equipment?

Demonstration circuit 1807A is a dual output, dual phase synchronous buck converter featuring the LTC3869EUFD. The input voltage range is 4.5V to 14V, output voltages and currents are 1.5V/15A and 1.2V/15A. Two versions of the board are available. DC1807A-A has an on-board sense resistor for current feedback, while the DC1807A-B is configured with a DCR sense circuit that allows the converter to use the inductors DCR as the sense element instead of the on-board sense resistors to save cost and board space and improves efficiency.

The ADM2461E/ADM2463E are 500 kbps, 5.7 kV rms, signal isolated RS-485 transceivers that pass radiated emissions testing to the EN55032 Class B standard with margin on a 2-layer printed circuit board (PCB). The ADM2461E/ADM2463E isolation barrier provides robust immunity to noise and system level EMC events. The devices are protected against ??12 kV contact and ? ?15 kV air IEC61000-4-2 electrostatic discharge (ESD) events on the RS-485 A, B, Y, and Z pins. The devices feature cable invert pins to allow quick correction of the reversed cable connection on the A, B, Y, and Z bus pins while maintaining full receiver fail-safe performance.?These devices are optimized for low speed over long cable runs and have a maximum data rate of 500 kbps. The high differential output voltage makes these devices suitable for Profibus nodes when powered with 5 V on the VDD2 supply. The VDD1 primary supply and VDD2 isolated supply both support a wide range of voltages (1.7 V to 5.5 V and 3 V to 5.5 V, respectively). Half-duplex and full duplex device options are available in the industry standard 16-lead, wide-body, standard SOIC_W package with >8.0 mm creepage and clearance.?Applications Heating, ventilation, and air conditioning (HVAC) networks Industrial field buses Building automation Utility networks

DC391A-A: Demo Board for LTC5505 RF Power Detector with Buffered Output and >40dB Dynamic Range.

The ADN4620/ADN4621 are dual-channel, signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 2.5 Gbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high speed signals, such as current mode logic (CML).The ADN4620/ADN4621 include a refresh mechanism to monitor the input and output states and ensure that they remain the same in the absence of data transitions (for example, at power-on). For lower power consumption and high speed operation with low jitter, the isolator circuits rely on 1.8 V supplies, while 3.3 V supplies are used for LVDS receivers to support the full common-mode range with an input voltage range (input common mode plus differential input voltage) of 0 V to 2.4 V per Table 2 in the data sheet.The devices are fully specified over a wide industrial temperature range and are available in a compact SSOP package with 5.3 mm creepage (for reinforced insulation at ac mains voltages).APPLICATIONS Analog front-end isolation Data plane isolation Isolated high speed clock and data links Multigigabit serialization/deserialization (SERDES) PCB-to-PCB optical replacement (for example, short reach fiber)Protected by U.S. Patents 7,075,329; 9,941,565; and 10,205,442. Other patents are pending.

Demonstration circuit 1739A-B is a 150W isolated forward converter with synchronous rectification featuring the LTC3765/LTC3766. This circuit demonstrates a high level of performance, efficiency, and small solution size attainable using these parts in an active-clamp-reset forward converter power supply. It operates at 240kHz and produces a regulated 12V, 12.5A output from an input voltage range of 18V to 72V, making it well suited for telecom, industrial, and other applications.