The AD7405 is a high performance, second-order, ?-? modulatorthat converts an analog input signal into a high speed, single-bitLVDS data stream, with on-chip digital isolation based onAnalog Devices, Inc., iCoupler? technology. The AD7405operates from a 5 V (VDD1) power supply and accepts adifferential input signal of ?250 mV (?320 mV full-scale). Thedifferential input is ideally suited to shunt voltage monitoring inhigh voltage applications where galvanic isolation is required.The analog input is continuously sampled by a high performanceanalog modulator, and converted to a ones density digital outputstream with a data rate of up to 20 MHz. The originalinformation can be reconstructed with an appropriate digitalfilter to achieve 88 dB signal to noise ratio (SNR) at 78.1 kSPS.The LVDS input/output can use a 5 V or a 3.3 V supply (VDD2).The LVDS interface is digitally isolated. The LVDS interfacetechnology, combined with monolithic transformer technology,means the on-chip isolation provides outstanding performancecharacteristics, superior to alternatives such as optocouplerdevices. The AD7405 device is offered in a 16-lead, wide-bodySOIC package and has an operating temperature range of ?40?Cto +125?C.Applications Shunt current monitoring AC motor controls Power and solar inverters Wind turbine inverters Data acquisition systems Analog-to-digital and opto-isolator replacements

The HMC835LP6GE is a low noise, wide band, Fractional-N PLL that features an integrated VCO with a fundamental frequency of 2020 to 4100 MHz, and an integrated VCO Output Divider (divide by 2/4/6/.../60/62) that together enable the HMC835LP6GE to generate frequencies from 33 MHz to 4100 MHz. Integrated Phase Detector (PD) and a deltasigma modulator capable of operating at up to 100 MHz enable wider loop-bandwidths, faster frequency changes along with excellent spectral performance.Two independent RF outputs, with independent gain control, enable the HMC835LP6GE to distribute identical frequency and phase signals to multiple destinations, at optimal signal levels tailored to each output.External VCO input, allows the HMC835LP6GE to lock external VCOs, and enables cascaded LO architectures for MIMO radio applications. Two separate Charge Pump (CP) outputs enable separate loop filters optimized for both integrated and external VCOs, and seamless switching between integrated or external VCOs during operation. Programmable RF output phase feature can further phase adjust and synchronize multiple HMC835LP6GEs enabling scalable MIMO and beam-forming radio architectures.Additional features include configurable output mute function that mutes RF outputs during frequency changes, Exact Frequency Mode that enables the HMC835LP6GE to generate fractional frequencies with 0 Hz frequency error, and the ability to synchronously change frequencies without changing the phase of the output signal.Applications MIMO Radio Architectures Cellular Infrastructure Cellular backhaul Communications Test Equipment CATV Equipment Phased Array Applications? DDS Replacement

DC1826A-E Demo Board for: LTC2389-16 16-Bit, 2.5Msps SAR ADC with Pin-Configurable Analog Input Range and 96dB SNR LTC6655 0.25ppm Noise, Low Drift Precision References LT6201 Dual 165MHz, Rail-to-Rail Input and Output, 0.95nV/√Hz Low Noise, Op Amp Family

Demonstration circuit SCP-LT1956-IEVALZ is a 48V, 1.5A buck regulator configured as an inverting buck topology for positive to negative DC voltage conversion. This board has ample current output to drive multiple signal chains. Like all boards in the Signal Chain Power series, this board is designed to be easily plugged into other SCP boards to form a complete signal chain power system, enabling fast evaluation of low power signal chains. To evaluate this board, some universal SCP hardware is required, namely: SCP-INPUT-EVALZ SCP-OUTPUT-EVALZ SCP-1X5BKOUT-EVALZ SCP-THRUBRD-EVALZ SCP-FILTER-EVALZ SCP-1X2BKOUT-EVALZ SCP-5X1-EVALZ   To properly evaluate SCP series demo boards, you will need the SCP Configurator companion software. SCP Configurator can help you choose the right board and topology for your design. Note that this Demo Manual does not cover details important to the operation and configuration regarding the LT1956. Please refer to the LT1956 datasheet for a complete description of the part.

The AD9152 is a dual, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.25 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF6720 analog quadrature modulator (AQM)from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. The full-scale output current can be programmed over a range of 4 mA to 20 mA. The AD9152 isavailable in a 56-lead LFCSP. The AD9152 is a member of theTxDAC+? family.Product Highlights Ultrawide signal bandwidth enables emerging wideband and multiband wireless applications. Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies. JESD204B Subclass 1 support simplifies multichip synchronization in software and hardware design. Fewer pins for data interface width with the serializer/deserializer (SERDES) JESD204B four-lane interface. Programmable transmit enable function allows easy design balance between power consumption and wake-up time. Small package size with an 8 mm ? 8 mm footprint. ?Applications Wireless communications Multicarrier LTE and GSM base stations Wideband repeaters Software defined radios Wideband communications Point to point microwave radios LMDS/MMDS Transmit diversity, multiple input/multiple output (MIMO) Instrumentation Automated test equipment

The AD9114/AD9115/AD9116/AD9117 are pin-compatible dual, 8-/10-/12-/14-bit, low power digital-to-analog converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC? converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.The AD9114/AD9115/AD9116/AD9117 offer exceptional ac and dc performance and support update rates up to 125 MSPS.The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9114/AD9115/AD9116/AD9117 make them well suited for portable and low power applications.PRODUCT HIGHLIGHTS Low Power. DACs operate on a single 1.8 V to 3.3 V supply; total power consumption reduces to 225 mW at 100 MSPS. Sleep and power-down modes are provided for low power idle periods. CMOS Clock Input. High speed, single-ended CMOS clock input supports a 125 MSPS conversion rate. Easy Interfacing to Other Components. Adjustable output common mode from 0 V to 1.2 V allows for easy interfacing to other components that accept common-mode levels greater than 0 V.?APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD4695/AD4696 are compact, high accuracy, low power, 16-channel, 16-bit, 500 kSPS/1 MSPS, multiplexed input precision, successive approximation register (SAR) analog-to-digital converters (ADCs) with Easy Drive features and extensive digital functionality.The AD4695/AD4696 are optimal for use in space constrained, multichannel, precision data acquisition systems and monitoring circuits. The AD4695/AD4696 feature a true 16-bit SAR ADC core with no missing codes, a 16-channel, low crosstalk multiplexer, a flexible channel sequencer, overvoltage protection clamp circuits on each analog input, on-chip oversampling and decimation, threshold detection and alert indicators, and an autonomous conversion (autocycle) mode.The AD4695/AD4696 Easy Drive features relax the drive requirements of the analog front end (AFE) and reference circuitry. Analog input high-Z mode and reference input high?Z mode simplify system designs, reduce component count, and increase channel density by removing the need for dedicated high speed ADC drivers and reference buffers. The WLCSP option of the AD4695/AD4696 includes an internal reference buffer, which provides a true, buffered reference input.Input overvoltage protection clamps on each analog input protect the AD4695/AD4696 from overvoltage events and prevent overvoltage events on one channel from degrading performance on other channels (see Figure 27 in the data sheet).Advanced digital functionality makes the AD4695/AD4696 compatible with a variety of low power digital hosts. The low serial peripheral interface (SPI) clock rate requirements, on-chip customizable channel sequencers, and oversampling and decimation reduce the burden on the digital host system. Autocycle mode and threshold detection features enable low power, interrupt driven firmware design by performing conversions autonomously and generating alerts based on channel specific threshold limits.The AD4695/AD4696 are available in a 5 mm ? 5 mm 32-lead lead frame chip scale package (LFCSP) and a 2.96 mm ? 2.96 mm 36-ball wafer level chip scale package (WLCSP) with operation specified from ?40?C to +125?C.APPLICATIONS Photodiode monitoring Medical instrumentation Vital signs monitoring Electronic test and measurement Automated test equipment Instrumentation and process control Battery-powered equipment

The LTC3612 is a low quiescent current monolithic synchronous buck regulator using a current mode, constant frequency architecture. The no-load DC supply current in sleep mode is only 70?A while maintaining the output voltage (Burst Mode operation) at no load, dropping to zero current in shutdown. The 2.25V to 5.5V input supply voltage range makes the LTC3612 ideally suited for single Li-Ion as well as fixed low voltage input applications. 100% duty cycle capability provides low dropout operation, extending the operating time in battery-powered systems.The operating frequency is externally programmable up to 4MHz, allowing the use of small surface mount inductors. For switching noise-sensitive applications, the LTC3612 can be synchronized to an external clock at up to 4MHz.Forced continuous mode operation in the LTC3612 reduces noise and RF interference. Adjustable compensation allows the transient response to be optimized over a wide range of loads and output capacitors.The internal synchronous switch increases efficiency and eliminates the need for an external catch diode, saving external components and board space. The LTC3612 is offered in a leadless 20-pin 3mm ? 4mm QFN or a thermally enhanced 20-pin TSSOP package.APPLICATIONS Point-of-Load Supplies Distributed Power Supplies Portable Computer Systems DDR Memory Termination Handheld Devices

The LT5506 is a 40MHz to 500MHz monolithic integrated quadrature demodulator with variable gain amplifier (VGA), designed for low voltage operation. It supports standards that use a linear modulation format. The chip consists of a VGA, quadrature down-converting mixers and lowpass noise filters. The LO port consists of a divide-by-two stage and LO buffers. The IC provides all building blocks for IF down-conversion to I and Q baseband signals with a single supply voltage of 1.8V to 5.25V. The VGA gain has a linear-in- dB relationship to the control input voltage. Hard-clipping amplifiers at the mixer outputs reduce the recovery time from a signal overload condition. The lowpass filters reduce the out-of-band noise and spurious frequency components. The cut-off frequency of the noise filters is approximately 8.8MHz. The external 2xLO frequency is required to be twice the IF input frequency for the mixers. The standby mode provides reduced supply current and fast transient response into the normal operating mode when the I/Q outputs are AC-coupled to a baseband chip.Applications IEEE802.11 High Speed Wireless LAN Wireless Local Loop

The LTC5584 is a direct conversion quadrature demodulator optimized for high linearity receiver applications in the 30MHz to 1.4GHz frequency range. It is also usable in the 10MHz to 30MHz and 1.4GHz to 2GHz ranges with reduced performance. It is suitable for communications receivers where an RF signal is directly converted into I and Q baseband signals with bandwidth of 530MHz or higher. The LTC5584 incorporates balanced I and Q mixers, LO buffer amplifiers and a precision, high frequency quadrature phase shifter. In addition, the LTC5584 provides four analog control voltage interface pins for IIP2 and DC offset correction, greatly simplifying system calibration.The high linearity of the LTC5584 provides excellent spurfree dynamic range for the receiver. This direct conversion demodulator can eliminate the need for intermediate frequency (IF) signal processing, as well as the corresponding requirements for image filtering and IF filtering. These I/Q outputs can interface directly to channel-select filters (LPFs) or to baseband amplifiers.Applications LTE/W-CDMA/TD-SCDMA Base Station Receivers Wideband DPD Receivers Point-To-Point Broadband Radios High Linearity Direct Conversion I/Q Receivers Image Rejection Receivers