DC1826A-E Demo Board for: LTC2389-16 16-Bit, 2.5Msps SAR ADC with Pin-Configurable Analog Input Range and 96dB SNR LTC6655 0.25ppm Noise, Low Drift Precision References LT6201 Dual 165MHz, Rail-to-Rail Input and Output, 0.95nV/√Hz Low Noise, Op Amp Family

The ADM3055E/ADM3057E are 5 kV rms and 3 kV rms isolated controller area network (CAN) physical layer transceivers with integrated isolated dc-to-dc converters. The ADM3055E/ADM3057E meet flexible data rate (CAN FD) requirements for operation to 5 Mbps and higher and comply with the ISO 11898-2: 2016 standard. The ADM3055E/ADM3057E are capable of supporting data rates as high as 12 Mbps.The devices employ Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, a CAN transceiver, and an Analog Devices isoPower? dc-to-dc converter into a single, surface-mount, small outline integrated circuit (SOIC) package. The devices are powered by a single 5 V supply, realizing a fully isolated solution for CAN and CAN FD. Radiated emissions from the high frequency switching of the dc-to-dc convertors are kept below EN 55022 Class B limits by continuous adjustments to the switching frequency.The ADM3055E/ADM3057E provide complete isolation between the CAN controller and physical layer bus. Safety and regulatory approvals (pending) for 5 kV rms isolation voltage, 10 kV surge test, and 8.3 mm creepage and clearance ensure the ADM3055E meets application reinforced isolation requirements. The ADM3057E has an isolation voltage of 3 kV rms and 7.8 mm creepage in a 20-lead, wide body SOIC.Low propagation delays through the isolation support longer bus cables. Slope control mode is available for standard CAN at low data rates. Standby mode minimizes power consumption when the bus is idle or if the node goes offline. Silent mode allows the TXD input to be ignored for listen only mode.Dominant timeout functionality protects against bus lock up in a fault condition. The current limiting and thermal shutdown features protect against output short circuits. The devices are fully specified over an industrial temperature range of ?40?C to +105?C.Applications CANOpen, DeviceNet, and other CAN bus implementations Industrial automation Process control and building control Transport and infrastructure

The LTC3862-2 is a two-phase constant frequency, current mode boost and SEPIC controller that drives N-channel power MOSFETs. Two-phase operation reduces system filtering capacitance and inductance requirements.The operating frequency can be set with an external resistor over a 75kHz to 500kHz range and can be synchronized to an external clock using the internal PLL. Multiphase operation is possible using the SYNC input, the CLKOUT output and the PHASEMODE control pin allowing 2-, 3-, 4-, 6- or 12-phase operation.Other features include an internal 10V LDO with undervoltage lockout protection for the gate drivers, a precision RUN pin threshold with programmable hysteresis, soft-start and programmable leading edge blanking and maximum duty cycle. Part Number Vin Range INTVcc UV+ UV- LTC3862 4V to 36V 5V 3.3V 2.9V LTC3862-1 8.5V to 36V 10V 7.5V 7.0V LTC3862-2 5.5V to 36V 10V 4.4V 3.9V Applications Automotive, Telecom and Industrial Power Supplies

Demonstration circuit 1294A exercises four adjustable linear regulators in parallel using the LT3080. A small 20 mΩ ballast resistor is required for parallel operation. A short PCB trace can easily serve that purpose. The paralleled devices provide up to 4.4A of output current at 3.3V. Architected as a precision current source and voltage follower, the LT3080 can be used in many applications requiring high current, adjustability to zero output, and no heat sink. The device brings out the collector of the pass transistor to allow low dropout operation when used with multiple supplies. The LT3080's output voltage can be programmed to any level between 0V and 36V; however the demo board has a reduced input voltage range from 3.8V to 25V due to the input capacitor voltage rating.

The LTC5507 is an RF power detector for applications operating from 100kHz to 1000MHz. The input frequency range is determined by an external capacitor. A temperature-compensated Schottky diode peak detector and buffer amplifier are combined in a small 6-pin ThinSOT package.The RF input voltage is peak detected using an on-chip Schottky diode and external capacitor. The detected voltage is buffered and supplied to the VOUT pin. A power saving shutdown mode reduces supply current to less than 2?A.Applications Wireless Transceivers Wireless and Cable Infrastructure RF Power Alarm Envelope Detector

LTC2175-14 14-Bit, 125Msps Low Power Quad ADCs.

The digital output ADXL3591 is a low noise density, low 0 g offset drift, low power, 3-axis microelectromechanical system (MEMS) accelerometer with selectable measurement ranges. The ADXL359 supports the ?10 g, ?20 g, and ?40 g ranges.The ADXL359 offers industry leading noise, minimal offset drift over temperature, and long-term stability, enabling precision applications with minimal calibration.The low drift, low noise, and low power ADXL359 enables accurate tilt measurement in an environment with high vibration, such as airborne inertial measurement units (IMUs). The low noise over higher frequencies is ideal for wireless condition monitoring.The ADXL359 multifunction pin names may be referenced only by their relevant function for either the serial peripheral interface (SPI) or limited I2C interface.APPLICATIONS IMUs and altitude and heading reference systems (AHRSs) Platform stabilization systems Vibration sensing Structural health monitoring Tilt sensing Robotics Condition monitoringProtected by U.S. Patents 8,472,270; 9,041,462; 8,665,627; 8,917,099; 6,892,576; 9,297,825; and 7,956,621.

The HMC835LP6GE is a low noise, wide band, Fractional-N PLL that features an integrated VCO with a fundamental frequency of 2020 to 4100 MHz, and an integrated VCO Output Divider (divide by 2/4/6/.../60/62) that together enable the HMC835LP6GE to generate frequencies from 33 MHz to 4100 MHz. Integrated Phase Detector (PD) and a deltasigma modulator capable of operating at up to 100 MHz enable wider loop-bandwidths, faster frequency changes along with excellent spectral performance.Two independent RF outputs, with independent gain control, enable the HMC835LP6GE to distribute identical frequency and phase signals to multiple destinations, at optimal signal levels tailored to each output.External VCO input, allows the HMC835LP6GE to lock external VCOs, and enables cascaded LO architectures for MIMO radio applications. Two separate Charge Pump (CP) outputs enable separate loop filters optimized for both integrated and external VCOs, and seamless switching between integrated or external VCOs during operation. Programmable RF output phase feature can further phase adjust and synchronize multiple HMC835LP6GEs enabling scalable MIMO and beam-forming radio architectures.Additional features include configurable output mute function that mutes RF outputs during frequency changes, Exact Frequency Mode that enables the HMC835LP6GE to generate fractional frequencies with 0 Hz frequency error, and the ability to synchronously change frequencies without changing the phase of the output signal.Applications MIMO Radio Architectures Cellular Infrastructure Cellular backhaul Communications Test Equipment CATV Equipment Phased Array Applications? DDS Replacement

The ADRV9008-2 is a highly integrated, RF agile transmit subsystem offering dual channel transmitters, observation path receiver, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption demanded by 2G, 3G and 4G macro-cell base stations, and active antenna, applications.The transmitters use an innovative direct conversion modulator that achieves multi-carrier macro-base-station quality performance and very low power. In 3G/4G mode, the maximum large-signal bandwidth is 200MHz. In MC-GSM mode, which has higher in-band SFDR, the maximum large-signal bandwidth is 75MHz.The observation path consists of a wide bandwidth direct-conversion receiver with state-of-the-art dynamic range. The complete receive subsystem includes dc offset correction, quadrature correction, and digital filtering thus eliminating the need for these functions in the digital baseband. Several auxiliary functions such as ADCs, DACs, and GPIOs for PA and RF-front-end control are also integrated. The fully integrated phase locked loops (PLLs) provide high performance, low power fractional-N RF frequency synthesis for the transmitter and receiver sections. An additional synthesizer is used to generate the clocks needed for the converters, digital circuits, and the serial interface. Special precautions have been taken to provide the isolation demanded in high performance base station applications. All VCO and loop filter components are integrated.The high-speed JESD204B interface supports up to 12.288 Gbps lane rates resulting in two lanes per transmitter in the widest bandwidth mode and two lanes for the observation path receiver in the widest bandwidth mode. The core of the ADRV9008-2 can be powered directly from 1.3 V and 1.8 V regulators and is controlled via a standard 4 wire serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9008-2 is packaged in a 12mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).

Demonstration circuit 1212A-B is a monolithic step-dwon DC/DC switching regulatro featuring the LT3685 in the 3x3 DFN-10 package. The demo board provides 5V@2A from a 6.3V to 38V input and has transient protection up to 60V. The demo boards default switching frequency is 800kHz, but the LT3685 has a SYNC pin which allows frequency synchronization to an external clock over a 250kHz to 2MHz range. The LT3685's quiescent current is 0.9mA, while the LT3480 has a 70uA quiescent current. An EMC filter at the input makes the circuit compatible with EMC standard EN55022 Class B.