Demonstration circuit 1830B is a battery charger controller and PowerPath™ manager with maximum power point control (MPPC) featuring the LTC4000-1. MPPC extracts near maximum power from high impedance sources such as solar panels, wind turbines or fuel cells. MPPC is achieved by means of an input voltage regulation control loop. This board should be connected to a front-end DC/DC power supply for a complete charger solution.

DC1836A-B: Demo Board for the LTC2955 Pushbutton On/Off Controller with Automatic Turn-On.

DC183A: Demo Board for the LTC1598 8-Channel, Micropower Sampling 12-Bit Serial I/O A/D Converter.

The LTC6947 is a high performance, low noise, 6GHz phase-locked loop (PLL), including a reference divider, phase-frequency detector (PFD), ultralow noise charge pump, fractional feedback divider, and VCO output divider.The fractional divider uses an advanced, 4th order ?? modulator which provides exceptionally low spurious levels. This allows wide loop bandwidths, producing extremely low integrated phase noise values.The programmable VCO output divider, with a range of 1 through 6, extends the output frequency range. The differential, low-noise output buffer has user-programmable output power ranging from ?4.3dBm to +4.5dBm, and may be muted through either a digital input pin or software.The ultralow noise charge pump contains selectable high and low voltage clamps useful for VCO monitoring, and also may be set to provide a V+/2 bias.All device settings are controlled through a SPI-compatible serial port.Applications Wireless Basestations (LTE, WiMAX, W-CDMA, PCS) Broadband Wireless Access Microwave Data Links Military and Secure Radio Test and Measurement

DC1851A: Demo Board for the LTC2872 RS232/RS485 Dual Multiprotocol Transceiver with Integrated Termination.

Demonstration circuit 1852A is a combined step-up and step-down DC/DC converter, using the LTC3536 monolithic synchronous buck-boost regulator in the MSOP package. The DC1852A has wide input voltage range of 1.8V to 5.5V and is capable of delivering up to 1A of output current. The output voltage of the DC1852A can be set as low as 1.8V and can go as high as 5.5V. DC1852A supports two operation modes: fixed-frequency pulse-width modulation (PWM) and Burst Mode® operation.

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The AD8278 and AD8279 are general-purpose difference amplifiers intended for precision signal conditioning in power critical applications that require both high performance and low power. The AD8278 and AD8279 provide exceptional common-mode rejection ratio (80 dB) and high bandwidth while amplifying input signals that are well beyond the supply rails. The on-chip resistors are laser trimmed for excellent gain accuracy and high CMRR. They also have extremely low gain drift vs. temperature.The common-mode range of the amplifier extends to almost triple the supply voltage (for G = ?), making the amplifer ideal for single-supply applications that require a high common-mode voltage range. The internal resistors and ESD circuitry at the inputs also provide overvoltage protection to the op amp.The AD8278 and AD8279 can be used as difference amplifiers with G = ? or G = 2. They can also be connected in a high precision, single-ended configuration for non inverting and inverting gains of ??, ?2, +3, +2, +1?, +1, or +?. The AD8278 and AD8279 provide an integrated precision solution that has a smaller size, lower cost, and better performance than a discrete alternative.The AD8278 and AD8279 operate on single supplies (2.0 V to 36 V) or dual supplies (?2 V to ?18 V). The maximum quiescent supply current is 200 ?A, which is ideal for battery-operated and portable systems. For unity-gain difference amplifiers with similar performance, refer to the AD8276 and AD8277 data sheets.The AD8278 is available in the space-saving 8-lead MSOP and SOIC packages, and the AD8279 is offered in a 14-lead SOIC package. Both are specified for performance over the industrial temperature range of ?40?C to +85?C and are fully RoHS compliant.ApplicationsVoltage measurement and monitoringCurrent measurement and monitoringInstrumentation amplifier building blockPortable, battery-powered equipmentTest and measurement

The digital output ADXL3591 is a low noise density, low 0 g offset drift, low power, 3-axis microelectromechanical system (MEMS) accelerometer with selectable measurement ranges. The ADXL359 supports the ?10 g, ?20 g, and ?40 g ranges.The ADXL359 offers industry leading noise, minimal offset drift over temperature, and long-term stability, enabling precision applications with minimal calibration.The low drift, low noise, and low power ADXL359 enables accurate tilt measurement in an environment with high vibration, such as airborne inertial measurement units (IMUs). The low noise over higher frequencies is ideal for wireless condition monitoring.The ADXL359 multifunction pin names may be referenced only by their relevant function for either the serial peripheral interface (SPI) or limited I2C interface.APPLICATIONS IMUs and altitude and heading reference systems (AHRSs) Platform stabilization systems Vibration sensing Structural health monitoring Tilt sensing Robotics Condition monitoringProtected by U.S. Patents 8,472,270; 9,041,462; 8,665,627; 8,917,099; 6,892,576; 9,297,825; and 7,956,621.

The ADF5000 prescaler is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input to a PLL IC, such as the?ADF4156 or the ADF4106. The ADF5000 provides a divide-by-2 function. The ADF5000 operates from a 3.3 V supply and has differential 100 ? RF outputs to allow direct interface to the differential RF inputs of PLLs such as the ADF4156 and ADF4106.Applications PLL frequency range extender Point-to-point radios VSAT radios Communications test equipment?