The AD5668 device is a low power, octal, 16-bit, buffered voltage-output DAC. All devicesoperate from a single 2.7 V to 5.5 V supply and are guaranteedmonotonic by design. The AD5668 and AD5628 are available inboth a 4 mm ? 4 mm LFCSP and a 16-lead TSSOP, while theAD5648 is available in both a 14-lead and 16-lead TSSOP.The AD5628/AD5648/AD5668 have an on-chip reference withan internal gain of 2. The AD5628-1/AD5648-1/AD5668-1 havea 1.25 V 5 ppm/?C reference, giving a full-scale output rangeof 2.5 V; the AD5628-2/AD5648-2/AD5668-2 and AD5668-3 havea 2.5 V 5 ppm/?C reference, giving a full-scale output range of5 V. The on-board reference is off at power-up, allowing the useof an external reference. The internal reference is enabled via asoftware write.The part incorporates a power-on reset circuit that ensures that theDAC output powers up to 0 V (AD5628-1/AD5648-1/AD5668-1,AD5628-2/AD5648-2/AD5668-2) or midscale (AD5668-3) andremains powered up at this level until a valid write takes place.The part contains a power-down feature that reduces the currentconsumption of the device to 400 nA at 5 V and provides software-selectable output loads while in power-down mode for any or allDAC channels. The outputs of all DACs can be updated simultaneouslyusing the LDAC function, with the added functionalityof user-selectable DAC channels to simultaneously update. Thereis also an asynchronous CLR that updates all DACs to a userprogrammablecode?zero scale, midscale, or full scale.The AD5628/AD5648/AD5668 utilize a versatile 3-wire serialinterface that operates at clock rates of up to 50 MHz and iscompatible with standard SPI?, QSPI?, MICROWIRE?, andDSP interface standards. The on-chip precision output amplifierenables rail-to-rail output swing.Product Highlights Octal, 12-/14-/16-bit DAC. On-chip 1.25 V/2.5 V, 5 ppm/?C reference. Available in 14-lead/16-lead TSSOP, 16-lead LFCSP, and 16-ball WLCSP. Power-on reset to 0 V or midscale. Power-down capability. When powered down, the DAC typically consumes 200 nA at 3 V and 400 nA at 5 V. Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

Demonstration circuit 1379B is a step-down DC/DC switching regulator featuring the LTM8025 μModule® regulator. The demo board is designed to deliver a 3.3V @ 3A output from a 5.5V to 36V input. The wide input range of the LTM8025 allows a variety of input sources such as automotive batteries, wall adaptors and industrial supplies. The modes of operation (Burst Mode® operation or synchronization) are jumper-selectable. Burst Mode operation improves efficiency at light loads. The LTM8025 can be synchronized over a 250kHz to 2MHz range.

The AD9287 is a quad, 8-bit, 100 MSPS analog-to-digital con-verter (ADC) with an on-chip sample-and-hold circuit designedfor low cost, low power, small size, and ease of use. The productoperates at a conversion rate of up to 100 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximizeflexibility and minimize system cost, such as programmableclock and data alignment and programmable digital test patterngeneration. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9287 is available in an RoHS compliant, 48-lead LFCSP. It isspecified over the industrial temperature range of ?40?C to +85?C.Product Highlights Small Footprint. Four ADCs are contained in a small, space-saving package. Low power of 133 mW/channel at 100 MSPS. Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 400 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. Pin-Compatible Family. This includes the AD9219 (10-bit), AD9228 (12-bit), and AD9259 (14-bit).ApplicationsMedical imaging and nondestructive ultrasoundPortable ultrasound and digital beam-forming systemsQuadrature radio receiversDiversity radio receiversTape drivesOptical networkingTest equipment

The AD91661 is a high performance, wideband, on-chip vector signal generator composed of a high speed JESD204B serializer/deserializer (SERDES) interface, a flexible 16-bit digital datapath, a inphase/quadrature (I/Q) digital-to-analog converter (DAC) core, and an integrated differential to single-ended outputbuffer amplifier, matched to a 50 ? load up to 10 GHz.The DAC core is based on a quad-switch architecture, which is configurable to increase the effective DAC core update rate of up to 12.8 GSPS from a 6.4 GHz DAC sampling clock, with an analog output bandwidth of true dc to 9.0 GHz, typically. The digital datapath includes multiple interpolation filter stages, a direct digital synthesizer (DDS) block with multiple numerically controlled oscillators (NCOs) supporting fast frequency hopping (FFH), and additional FIR85 and inverse sinc filter stages to allow flexible spectrum planning.The differential to single-ended buffer eliminates the need for a wideband balun, and supports the full analog output bandwidth of the DAC core. DC coupling the output allows baseband waveform generation without the need for external bias tees or similar circuitry, which makes the AD9166 uniquely suited for the mostdemanding high speed ultrawideband RF transmit applications. The various filter stages enable the AD9166 to be configured for lower data rates, while maintaining higher DAC clock rates to ease the filtering requirements and reduce the overall system size, weight, and power.The data interface receiver consists of up to eight JESD204B SERDES lanes, each capable of carrying up to 12.5 Gbps. To enable maximum flexibility, the receiver is fully configurable according to the data rate, number of SERDES lanes, and lane mapping required by the JESD204B transmitter.In 2? nonreturn-to-zero (NRZ) mode of operation (with FIR85 enabled), the AD9166 can reconstruct RF carriers from true dc to the edge of the third Nyquist zone, or an analog bandwidth of true dc up to 9 GHz.In mix mode, the AD9166 can reconstruct RF carriers in the second and third Nyquist zones while consuming lower power and maintaining a performance comparable to 2? NRZ mode.In baseband modes, such as return-to-zero (RZ) and 1? NRZ, the AD9166 is ideal to reconstruct RF carriers from true dc to the edge of the first Nyquist zone while consuming lower power compared to 2? NRZ mode.The quadrature DDS block can be configured as a digital upconverter to upconvert I/Q data samples to the desired location across the spectrum, in all three Nyquist zones.The DDS also consists of a bank of 32 numerically controlled oscillators (NCOs), each with its own 32-bit phase accumulator. When combined with a 100 MHz serial peripheral interface (SPI), the DDS allows a phase coherent FFH, with a phase settling time as low as 300 ns.The AD9166 is configured using a common SPI interface that monitors the status of all registers. The AD9166 is offered in a 324-ball, 15 mm ? 15 mm, 0.8 mm pitch BGA_ED package.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 9 GHz. Fully supports zero IF and other dc-coupled applications. Up to an eight-lane JESD204B SERDES interface, with various features to allow flexibility when interfacing to a JESD204B transmitter.Applications Instrumentation: automated test equipment, electronic test and measurement, arbitrary waveform generators Electronic warfare: radars, jammers Broadband communications systems Local oscillator drivers1 Protected by U.S. Patents 6,842,132 and 7,796,971.

The AD5270 /?AD5271 are single-channel, 1024-/256-position digital rheostats that combine industry leading variable resistor performance with nonvolatile memory (NVM) in a compact package.The AD5270 / AD5271 ensure less than 1% end-to-end resistor tolerance error and offer 50-times programmable (50-TP) memory.The guaranteed industry leading low resistor tolerance error feature simplifies open-loop applications as well as precision calibration and tolerance matching applications.The AD5270 / AD5271 device wiper settings are controllable through the SPI digital interface. Unlimited adjustments are allowed before programming the resistance value into the 50-TP memory. The AD5270/AD5271 do not require any external voltage supply to facilitate fuse blow and there are 50 opportunities for permanent programming. During 50-TP activation, a permanent blow fuse command freezes the resistance position (analogous to placing epoxy on a mechanical trimmer).The AD5270 / AD5271 are available in a 3 mm x 3 mm, 10-lead LFCSP package and in a 10-lead MSOP package. The parts are guaranteed to operate over the extended industrial temperature range of ?40?C to +125?C.APPLICATIONS Mechanical potentiometer replacements Op-amp: variable gain control Instrumentation: gain, offset adjustment Programmable voltage-to-current conversions Programmable filters, delays, time constants Programmable power supply Sensor calibration

The LTC6954 is a family of very low phase noise clock distribution parts. Each part has three outputs and each output has an individually programmable frequency divider and delay. There are four members of the family, differing in their output logic signal type:LTC6954-1: Three LVPECL outputsLTC6954-2: Two LVPECL and one LVDS/CMOS outputsLTC6954-3: One LVPECL and two LVDS/CMOS outputsLTC6954-4: Three LVDS/CMOS outputsEach output is individually programmable to divide the input frequency by any integer from 1 to 63, and to delay each output by 0 to 63 input clock cycles. The output duty cycle is always 50%, regardless of the divide number. The LVDS/CMOS outputs are jumper selectable via the OUTxSEL pins to provide either an LVDS logic output or a CMOS logic output.The LTC6954 also features Linear Technology?s EZSync system for perfect clock synchronization and alignment every time.All device settings are controlled through an SPI-compatible serial port.Applications Clocking High Speed, High Resolution ADCs, DACs?and Data Acquisition Systems Low Jitter Clock Distribution

The ADL5501 is a mean-responding power detector for use in high frequency receiver and transmitter signal chains from 50 MHz to 6 GHz. It is easy to apply, requiring only a single supply between 2.7 V and 5.5 V and a power supply decoupling capacitor. The input is internally ac-coupled and has a nominal input impedance of 50 ?. The output is a linear-responding dc voltage with a conversion gain of 6.3 V/V rms at 900 MHz.The ADL5501 is intended for true power measurement of simple and complex waveforms. The device is particularly useful for measuring high crest factor (high peak-to-rms ratio) signals, such as CDMA-, CDMA2000-, W-CDMA-, and QPSK-/QAM-based OFDM waveforms. The on-chip modulation filter provides adequate averaging for most waveforms.The on-chip, 100 ? series resistance at the output, combined with an external shunt capacitor, creates a low-pass filter response that reduces the residual ripple in the dc output voltage. For more complex waveforms, an external capacitor at the FLTR pin can be used for supplementary signal demodulation.The ADL5501 offers excellent temperature stability across a 30 dB range and near 0 dB measurement error across temperature over the top portion of the dynamic range. In addition to its temperature stability, the ADL5501 offers low process variations that further reduce calibration complexity.The ADL5501 operates from ?40?C to +85?C and is available in a small 6-lead SC-70 package. It is fabricated on a proprietary high fT silicon bipolar process.ApplicationsMeasurement of CDMA-, CDMA2000-, W-CDMA-, and QPSK-/ QAM-based OFDM, and other complex modulationwaveforms RF transmitter or receiver power measurement

The LTC1605 is a 100ksps, sampling 16-bit A/D converter that draws only 55mW (typical) from a single 5V supply. This easy-to-use device includes sample-and-hold, precision reference, switched capacitor successive approximation A/D and trimmed internal clock.The LTC1605?s input range is an industry standard ?10V. Maximum DC specs include ?2.0LSB INL and 16-bits no missing codes over temperature. An external reference can be used if greater accuracy over temperature is needed.The ADC has a microprocessor compatible, 16-bit or two byte parallel output port. A convert start input and a data ready signal (BUSY) ease connections to FIFOs, DSPs and microprocessors. Input Voltage Range LTC1605 Bipolar ?10V LTC1605-1 Unipolar 0V to 4V LTC1605-2 Bipolar ?4V Applications Industrial Process Control Multiplexed Data Acquisition Systems High Speed Data Acquisition for PCs Digital Signal Processing

The AD8556 is a zero-drift, sensor signal amplifier withdigitally programmable gain and output offset. Designed toeasily and accurately convert variable pressure sensor andstrain bridge outputsto a well-defined output voltage range,the AD8556 accurately amplifies many other differential orsingle-ended sensor outputs. The AD8556 uses the ADIpatented low noise auto-zero and DigiTrim? technologies tocreate an incredibly accurate and flexible signal processingsolution in a very compact footprint.Gain is digitally programmable in a wide range from 70 to1,280 through a serial data interface. Gain adjustment canbe fully simulated in-circuit and then permanently programmedwith reliable polyfuse technology. Output offsetvoltage is also digitally programmable and is ratiometric to thesupply voltage. AD8556 also features internal EMI filters on theVNEG, VPOS, FILT and VCLAMP pins.In addition to extremely low input offset voltage, low inputoffset voltage drift, and very high dc and ac CMRR, the AD8556 also includes a pull-up current source at the input pinsand a pull-down current source at the VCLAMP pin. Thisallows open wire and shorted wire fault detection. A low-passfilter function is implemented via a single low cost externalcapacitor. Output clamping set via an external reference voltageallows the AD8556 to drive lower voltage ADCs safely andaccurately.When used in conjunction with an ADC referenced to the samesupply, the system accuracy becomes immune to normal supplyvoltage variations. Output offset voltage can be adjusted with aresolution of better than 0.4% of the difference between VDDand VSS. A lockout trim after gain and offset adjustmentfurther ensures field reliability.The AD8556 is fully specified from ?40?C to +140?C.Operating from single-supply voltages of 2.7 V to 5.5 V, theAD8556 is offered in the 8-lead SOIC_N, and 4 mm ? 4 mm16-lead LFCSP_VQ.ApplicationsAutomotive SensorsPressure and Position SensorsPrecision Current SensingStrain Gages

The ADL9006 is a gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), low noise amplifier that operates between 2 GHz and 28 GHz. The amplifier provides 15.5 dB of gain, 2.5 dB noise figure, 26 dBm output third-order intercept (OIP3), and 20 dBm of output power for 1 dB compression (P1dB) while requiring 53 mA from a 5 V supply. The ADL9006 is self biased with only a single positive supply needed to achieve a supply current (IDD) of 53 mA.The ADL9006 amplifier input and output are internally matched to 50 ?.ADL9006CHIPSThe ADL9006CHIPS is a gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), low noise amplifier that operates from 2 GHz to 28 GHz. The amplifier provides 15.5 dB of gain, 2.2 dB of noise figure, 24 dBm of output third-order intercept (IP3), 20 dBm of output saturated power (PSAT), and 19 dB of power output for 1 dB compression (P1dB) while requiring a 55 mA power supply current (IDD) from a 5 V total supply voltage. The ADL9006CHIPS is self biased with only a single positive supply needed to achieve an IDD of 55 mA.The ADL9006CHIPS amplifier input and output are internally matched to 50 ? facilitating integration into multichip modules (MCMs).APPLICATIONS Test instrumentation Military and space Local oscillator driver amp ADL9006CHIPS Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military and space