SN74SSQEA32882ZAL

Texas Instruments

JEDEC SSTE32882 Compliant 28-Bit to 56-Bit egistered Buffer with Address-Parity Test 176-NFBGA 0 to 85

Parts in family

Technical Specifications

Lead Free Status Yes
ROHS Compliance Compliant
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter)(ps) 40
Approx. Price (US$) 3.90 1ku
Estimated Package Size (WxL)(mm2) [pf]176NFBGA[/pf]
No. of Outputs 60
Operating Frequency ange(Max)(MHz) 810
Operating Frequency ange(Min)(MHz) 300
Operating Temperature ange(C) 0 to 85
Output Drive(mA) N/A
Package Group NFBGA
VCC(V) 1.5,1.35
tsk(o)(ps) N/A