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|
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TLV2462QPWRG4
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TAS5342DDV
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OPA132UA/2K5E4
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INA217AIDWTE4
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TL441CNSRG4
|
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THS3112CDRG4
|
| Price |
|
|
|
|
|
$7.55 |
|
|
|
|
|
| RoHS |
|
Compliant |
Yes |
Compliant |
Compliant |
Compliant |
Yes |
Compliant |
Compliant |
Compliant |
Compliant |
| Lead Status |
|
No |
Yes |
No |
No |
No |
Yes |
No |
Yes |
|
No |
| Vn at 1kHz(Typ)(nV/rtHz) |
|
11 |
|
39 |
|
3 |
|
8 |
|
|
2.2 |
| Architecture |
|
Bipolar |
|
CMOS |
|
Bipolar |
|
FET |
|
|
Bipolar,Current FB |
| CMRR(Typ)(dB) |
|
85 |
|
72 |
|
138 |
|
94 |
|
|
67 |
| Iq per channel(Typ)(mA) |
|
0.55 |
|
0.55 |
|
3.7 |
|
4 |
|
|
4.9 |
| Offset Drift(Typ)(uV/C) |
|
2 |
|
2 |
|
0.1 |
|
2 |
|
|
10 |
| Rating |
|
Catalog |
|
Catalog |
|
Catalog |
Catalog |
Catalog |
Catalog |
|
Catalog |
| GBW(Typ)(MHz) |
|
6.4 |
|
3 |
|
8 |
|
8 |
|
|
110 |
| Vos (Offset Voltage @ 25C)(Max)(mV) |
|
2 |
|
4.5 |
|
0.075 |
|
0.5 |
|
|
10 |
| Approx. Price (US$) |
|
0.89 | 1ku |
|
0.80 | 1ku |
|
2.07 | 1ku |
2.30 | 1ku |
1.45 | 1ku |
2.80 | 1ku |
|
2.88 | 1ku |
| Slew Rate(Typ)(V/us) |
|
1.6 |
|
2.4 |
|
2.3 |
|
20 |
|
|
1550 |
| Package Size |
|
mm2 |
|
mm2 |
|
mm2 |
mm2 |
mm2 |
mm2 |
|
mm2 |
| Input Bias Current(Max)(pA) |
|
14000 |
|
60 |
|
10000 |
|
50 |
|
|
2000000 |
| Rail-to-Rail |
|
In,Out |
|
In,Out |
|
In,Out |
|
In,Out |
|
|
No |
| Number of Channels(#) |
|
2 |
|
2 |
|
2 |
|
1 |
1 |
|
2 |
| Package Group |
|
SOIC,PDIP,VSSOP,TSSOP |
|
PDIP,SOIC,VSSOP |
|
PDIP,SOIC |
HTSSOP |
SOIC |
PDIP,SOIC |
|
SO PowerPAD,SOIC |
| Total Supply Voltage(Min)(+5V=5, +/-5V=10) |
|
2.7 |
|
2.7 |
|
5 |
|
5 |
|
|
10 |
| Output Current(Typ)(mA) |
|
60 |
|
7 |
|
45 |
|
40 |
|
|
270 |
| CMRR(Min)(dB) |
|
71 |
|
55 |
|
120 |
|
86 |
100 |
|
63 |
| Additional Features |
|
N/A |
|
Shutdown |
|
Vos Adj Pin |
|
Vos Adj Pin |
|
|
|
| Iq per channel(Max)(mA) |
|
0.65 |
|
0.66 |
|
3.8 |
|
4.8 |
|
|
6.5 |
| Operating Temperature Range(C) |
|
-40 to 125,0 to 70 |
|
-40 to 125 |
|
-40 to 85 |
-40 to 85 |
-40 to 125 |
-40 to 125,-40 to 85 |
|
-40 to 85,0 to 70 |
| Total Supply Voltage(Max)(+5V=5, +/-5V=10) |
|
6 |
|
16 |
|
36 |
|
36 |
|
|
30 |
| Analog Supply (V)(Max) |
|
|
|
|
|
|
26 |
|
|
|
|
| Input Type |
|
|
|
|
|
|
PWM |
|
|
|
|
| Power Stage Supply(Max)(V) |
|
|
|
|
|
|
26 |
|
|
|
|
| Analog Supply (V)(Min) |
|
|
|
|
|
|
10 |
|
|
|
|
| Power to Bridge Tied Load(Max)(W) |
|
|
|
|
|
|
20 |
|
|
|
|
| Control Interface |
|
|
|
|
|
|
Hardware |
|
|
|
|
| Power Stage Supply(Min)(V) |
|
|
|
|
|
|
10 |
|
|
|
|
| Supported Bridge Tied Load(Min)(Ohms) |
|
|
|
|
|
|
6 |
|
|
|
|
| Closed/Open Loop |
|
|
|
|
|
|
Closed |
|
|
|
|
| Iq(Typ)(mA) |
|
|
|
|
|
|
|
|
10 |
|
|
| Bandwidth at Min Gain(Typ)(MHz) |
|
|
|
|
|
|
|
|
3.4 |
|
|
| Vs(Max)(V) |
|
|
|
|
|
|
|
|
36 |
|
|
| Input Offset (+/-)(Max)(uV) |
|
|
|
|
|
|
|
|
250 |
|
|
| Gain(Max)(V/V) |
|
|
|
|
|
|
|
|
10000 |
|
|
| Noise at 1kHz(Typ)(nV/rt(Hz)) |
|
|
|
|
|
|
|
|
1.3 |
|
|
| Input Bias Current (+/-)(Max)(nA) |
|
|
|
|
|
|
|
|
12000 |
|
|
| Bandwidth at Min Gain(Min)(MHz) |
|
|
|
|
|
|
|
|
800 |
|
|
| Vs(Min)(V) |
|
|
|
|
|
|
|
|
9 |
|
|
| Gain Error (+/-)(Max)(%) |
|
|
|
|
|
|
|
|
0.7 |
|
|
| Gain Non-Linearity (+/-)(Max)(%) |
|
|
|
|
|
|
|
|
0.0006 |
|
|
| Noise at 0.1 Hz - 10 Hz(Typ)(uVpp) |
|
|
|
|
|
|
|
|
2 |
|
|
| Gain(Min)(V/V) |
|
|
|
|
|
|
|
|
1 |
|
|
| Gain(V/V) |
|
|
|
|
|
|
|
|
1 to 10000 |
|
|
| Input Offset Drift (+/-)(Max)(uV/Degrees Celsius) |
|
|
|
|
|
|
|
|
1 |
|
|
| Vn at Flatband(Typ)(nV/rtHz) |
|
|
|
|
|
|
|
|
|
|
2.8 |
| 2nd Harmonic(dBc) |
|
|
|
|
|
|
|
|
|
|
78 |
| 3rd Harmonic(dBc) |
|
|
|
|
|
|
|
|
|
|
78 |
| Features |
|
|
|
|
|
|
|
|
|
|
N/A |
| @ MHz |
|
|
|
|
|
|
|
|
|
|
1 |
| Acl, min spec gain(V/V) |
|
|
|
|
|
|
|
|
|
|
1 |
| BW @ Acl(MHz) |
|
|
|
|
|
|
|
|
|
|
110 |
