Dual DPLL, Quad Input, 10 Output, Multiservice Line Card Clock Translator and Jitter Cleaner Features:Dual DPLL synchronizes 2 kHz to 750 MHz physical layer clocks providing frequency translation with jitter cleaning of noisy referencesComplies with ITU-T G.8262 and Telcordia GR-253Supports Telcordia GR-1244, ITU-T G.812, G.813, G.823, G.824, and G.825Continuous frequency monitoring and reference validation for frequency deviation as low as 50 ppbBoth DPLLs feature a 24-bit fractional divider with 24-bit programmable modulusProgrammable digital loop filter bandwidth: 104 Hz to 1850 HzAutomatic and manual holdover and reference switchover, providing zero delay, hitless, or phase buildout operationProgrammable priority-based reference switching with manual, automatic revertive, and automatic nonrevertive modes supported5 pairs of clock output pins with each pair useable as differential LVDS/HCSL/CML or as 2 single-ended outputs (1 Hz to 500 MHz)2 differential or 4 single-ended input referencesCrosspoint mux interconnects reference inputs to PLLsSupports embedded (modulated) input/output clock signalsFast DPLL locking modesProvides internal capability to combine the low phase noise of a crystal resonator or crystal oscillator with the frequency stability and accuracy of a TCXO or OCXOExternal EEPROM support for autonomous initializationSingle 1.8 V power supply operation with internal regulationBuilt in temperature monitor/alarm and temperature compensation for enhanced zero delay performance

EVALUATION BOARD VCO W/HALF FREQ O/P; Silicon Manufacturer:Analog Devices; Silicon Core Number:HMC1160; Kit Application Type:Clock & Timing; Application Sub Type:Voltage Controlled Oscillator; Kit Contents:Eval Board HMC1160; Product Range:HMC1160 Series; SVHC:No SVHC (20-Jun-2016); Features:VCO with Half Frequency O/P 8.45-9.3GHz Fo & 4.225-4.65GHz Fo/2 O/P 12dBm Power SMA 5V Supply; MSL:MSL 3 - 168 hours

Dual Channel asynchronous evaluation boa ;RoHS Compliant: Yes

EVALUATION BOARD FRACTIONAL-N PLL; Silicon Manufacturer:Analog Devices; Silicon Core Number:HMC834; Kit Application Type:RF / IF; Kit Contents:Eval Board HMC834 USB Interface Board 6ft USB Cable CD ROM; Product Range:- ;RoHS Compliant: Yes

BBU DERIVATIVE FOR AD9545 / TRAY ;ROHS COMPLIANT: YES

Clock & Timer Development Tools LTC6994-2 Demo Board 100ms, Output Rising Edge Delayed from Trigger Rising Edge

2:12/24 LVDS/CMOS Clock Fanout Buffer

IC/CLK FANOUT BUFFER, 2.97V-3.63V, LFCSP ROHS COMPLIANT: YES

The AD9510 provides a multi-output clock distribution functionalong with an on-chip phase-locked loop (PLL) core. The designemphasizes low jitter and phase noise to maximize data converterperformance. Other applications with demanding phase noiseand jitter requirements also benefit from this device.The PLL section consists of a programmable reference divider(R); a low noise, phase frequency detector (PFD); a precisioncharge pump (CP); and a programmable feedback divider (N).By connecting an external voltage-controlled crystal oscillator(VCXO) or voltage-controlled oscillator (VCO) to the CLK2and CLK2B pins, frequencies of up to 1.6 GHz can be synchronizedto the input reference.There are eight independent clock outputs. Four outputs are lowvoltage positive emitter-coupled logic (LVPECL) at 1.2 GHz,and four are selectable as either LVDS (800 MHz) or CMOS(250 MHz) levels.Each output has a programmable divider that can be bypassedor set to divide by any integer up to 32. The phase of one clockoutput relative to another clock output can be varied by meansof a divider phase select function that serves as a coarse timingadjustment. Two of the LVDS/CMOS outputs feature programmabledelay elements with full-scale ranges up to 8 ns of delay.This fine tuning delay block has 5-bit resolution, giving 25possible delays from which to choose for each full-scale setting(Register 0x36 and Register 0x3A = 00000b to 11000b).The AD9510 is ideally suited for data converter clockingapplications where maximum converter performance isachieved by encode signals with subpicosecond jitter.The AD9510 is available in a 64-lead LFCSP and can be operatedfrom a single 3.3 V supply. An external VCO, which requires anextended voltage range, can be accommodated by connectingthe charge pump supply (VCP) to 5.5 V. The temperature rangeis −40°C to +85°C.Applications Low jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, and mixed-signal front ends (MxFEs) High performance wireless transceivers High performance instrumentation Broadband infrastructure

The ADF4360-2 is a fully integrated integer-N synthesizerand voltage-controlled oscillator (VCO). The ADF4360-2 isdesigned for a center frequency of 2000 MHz. In addition, adivide-by-2 option is available, whereby the user gets an RFoutput of between 925 MHz and 1085 MHz.Control of all the on-chip registers is through a simple 3-wireinterface. The device operates with a power supply rangingfrom 3.0 V to 3.6 V and can be powered down when not in use.Applications Wireless handsets (DECT, GSM, PCS, DCS, WCDMA) Test equipment Wireless LANs CATV equipment