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CDC421212RGERG4
|
Price |
|
|
$11.32 |
|
|
|
|
|
$2.07 |
|
|
RoHS |
|
Compliant |
Yes |
Yes |
Yes |
Compliant |
Yes |
Yes |
Compliant |
Compliant |
Compliant |
Lead Status |
|
No |
Yes |
Yes |
Yes |
No |
Yes |
Yes |
No |
No |
No |
Package Group |
|
TSSOP |
PLCC |
TSSOP |
TSSOP |
TSSOP,VQFN |
VQFN |
|
TSSOP |
TSSOP |
|
Rating |
|
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
|
Operating Temperature Range(C) |
|
0 to 70 |
-40 to 85 |
0 to 85 |
0 to 85 |
0 to 70 |
-40 to 85 |
-40 to 85 |
-20 to 75 |
-40 to 85 |
|
Operating Frequency Range(Min)(MHz) |
|
60 |
|
50 |
50 |
0 |
|
|
60 |
|
|
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter)(ps) |
|
35 |
|
50 |
50 |
N/A |
|
|
|
|
|
VCC(V) |
|
2.5 |
3.3 |
3.3 |
3.3 |
2.5 |
3.3 |
4.5 to 5.25 |
|
1.8 |
|
Approx. Price (US$) |
|
3.65 | 1ku |
9.19 | 1ku |
4.80 | 1ku |
4.80 | 1ku |
3.29 | 1ku |
6.00 | 1ku |
6.81 | 1ku |
1.74 | 1ku |
2.14 | 1ku |
|
t(phase error)(ps) |
|
100 |
|
125 |
125 |
N/A |
|
|
|
|
|
tsk(o)(ps) |
|
100 |
|
100 |
100 |
N/A |
|
|
|
|
|
Operating Frequency Range(Max)(MHz) |
|
200 |
|
175 |
175 |
500 |
|
|
|
|
|
No. of Outputs |
|
10 |
9 |
9 |
9 |
|
|
|
|
7 |
|
Package Size |
|
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
|
Input Frequency(Max)(MHz) |
|
|
650 |
|
|
|
1500 |
|
|
|
|
Output Frequency(Max)(MHz) |
|
|
650 |
|
|
|
1500 |
1984 |
|
230 |
|
Input Level |
|
|
LVPECL |
|
|
|
LVPECL |
|
|
Crystal,LVCMOS |
|
VCC Out(V) |
|
|
3.3 |
|
|
|
3.3 |
|
|
2.5,3.3 |
|
Output Level |
|
|
LVPECL |
|
|
|
LVPECL |
|
|
LVCMOS |
|
Output Drive(mA) |
|
|
|
12 |
12 |
16 |
|
|
|
|
|
Number of Outputs |
|
|
|
|
|
26 |
5 |
|
|
|
|
Function |
|
|
|
|
|
DDR Register |
|
|
|
Clock Synthesizer |
|
Additive RMS Jitter(Typ)(fs) |
|
|
|
|
|
|
200 |
|
|
|
|
Integrated VCO |
|
|
|
|
|
|
|
Yes |
|
|
|
Output Frequency(Min)(MHz) |
|
|
|
|
|
|
|
1850 |
|
|
|
Lock Time(Typ)(us) |
|
|
|
|
|
|
|
>350 |
|
|
|
Programmability |
|
|
|
|
|
|
|
|
|
EEPROM |
|
Output Skew(ps) |
|
|
|
|
|
|
|
|
|
150 |
|
VCC Core(V) |
|
|
|
|
|
|
|
|
|
1.8 |
|
Special Features |
|
|
|
|
|
|
|
|
|
Integrated EEPROM,Multiplier/Divider,Spread Spectrum Clocking (SSC) |
|
Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C) |
|
|
|
|
|
|
|
|
|
60 ps |
|
Divider Ratio |
|
|
|
|
|
|
|
|
|
Universal |
|