The LTC6948 is a high performance, low noise, 6.39GHz phase-locked loop (PLL) with a fully integrated VCO, including a reference divider, phase-frequency detector (PFD), ultralow noise charge pump, fractional feedback divider, and VCO output divider.The fractional divider uses an advanced, 4th order ?? modulator which provides exceptionally low spurious levels. This allows wide loop bandwidths, producing extremely low integrated phase noise values.The programmable VCO output divider, with a range of 1 through 6, extends the output frequency range.Applications Wireless Basestations (LTE, WiMAX, W-CDMA, PCS) Microwave Data Links Military and Secure Radio Test and Measurement

The LTC1799 is a precision oscillator that is easy to use and occupies very little PC board space. The oscillator frequency is programmed by a single external resistor (RSET). The LTC1799 has been designed for high accuracy operation (?1.5% frequency error) without the need for external trim components.The LTC1799 operates with a single 2.7V to 5.5V power supply and provides a rail-to-rail, 50% duty cycle square wave output. The CMOS output driver ensures fast rise/fall times and rail-to-rail switching. The frequency-setting resistor can vary from 3k to 1M to select a master oscillator frequency between 100kHz and 33MHz (5V supply). The three-state DIV input determines whether the master clock is divided by 1, 10 or 100 before driving the output, providing three frequency ranges spanning 1kHz to 33MHz (5V supply). The LTC1799 features a proprietary feedback loop that linearizes the relationship between RSET and frequency, eliminating the need for tables to calculate frequency.Applications Low Cost Precision Oscillator Switching Power Supply Clock Reference Clocking Switched Capacitor Filters Fixed Crystal Oscillator Replacement Ceramic Oscillator Replacement

The LTC6905-X series of parts are precision, fixed frequency, silicon oscillators designed to minimize board space while maximizing accuracy and ease of use.Programmed at the factory to a fixed frequency, the LTC6905-X series of parts need no external trim components. An internal three-state divider allows for division of the master clock by 1, 2 or 4, providing 3 frequencies (for each device).The LTC6905-X series operate with a single 2.7V to 5.5V power supply and provide a rail-to-rail, 50% duty cycle, square wave output. The OE pin will disable the output when brought low and synchronously enable the output when brought high, avoiding pulse slivers.The four products of the LTC6905-X family are: LTC6905-133: fOSC = 133MHz, 66.7MHz, 33.3MHz LTC6905-100: fOSC = 100MHz, 50MHz, 25MHz LTC6905-96: fOSC = 96MHz, 48MHz, 24MHz LTC6905-80: fOSC = 80MHz, 40MHz, 20MHz?The LTC6905-X series of parts are designed with a factory trim option to modify the divider ratios from 1, 2, 4 to 8, 16, 32. A second trim option allows for additional master clock frequencies. For the alternate divider ratios and unlisted frequencies, contact LTC marketing.Protected by U.S. Patents, including 6614313, 6342817.Applications Data Clocks for High Reliability Applications High Vibration, High Acceleration Environments Replacement for Fixed Crystal and Ceramic Oscillators

The HMC7043 is designed to meet the requirements of multicarrier GSM and LTE base station designs, and offers a wide range of clock management and distribution features to simplify baseband and radio card clock tree designs.The HMC7043 provides 14 low noise and configurable outputs to offer flexibility in interfacing with many different components in a base transceiver station (BTS) system, such as data converters, local oscillators, transmit/receive modules, field programmable gate arrays (FPGAs), and digital front-end ASICs. The HMC7043 can generate up to seven DCLK and SYSREF clock pairs per the JESD204B/JESD204C interface requirements.The system designer can generate a lower number of DCLK and SYSREF pairs, and configure the remaining output signal paths for independent phase and frequency. Both the DCLK and SYSREF clock outputs can be configured to support different signaling standards, including CML, LVDS, LVPECL, and LVCMOS, and different bias conditions to adjust for varying board insertion losses. One of the unique features of the HMC7043 is the independent flexible phase management of each of the 14 channels. All 14 channels feature both frequency and phase adjustment. The outputs can also be programmed for 50 ? or 100 ? internal and external termination options. The HMC7043 device features an RF SYNC feature that synchronizes multiple HMC7043 devices deterministically, that is, ensures that all clock outputs start with the same edge. This operation is achieved by rephrasing the nested HMC7043 or SYSREF control unit/divider, deterministically, and then restarting the output dividers with this new phase. The HMC7043 is offered in a 48-lead, 7 mm ? 7 mm LFCSP package with an exposed pad connected to ground. Applications JESD204B/JESD204C clock generation Cellular infrastructure (multicarrier GSM, LTE, W-CDMA) Data converter clocking Phase array reference distribution Microwave baseband cards

The HMC1033LP6GE is a low-noise, wide-band 3.3 V clock generator IC with a fractional-N Phase Locked Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between 25 MHz and 550 MHz range. The HMC1033LP6GE features a low noise Phase Detector (PD) and Delta- Sigma modulator, capable of operating at up to 100 MHz which permits wider loop-bandwidths and excellent spurious performance.The HMC1033LP6GE features industry leading phase noise and jitter performance, across the operating range, that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior noise floor (<-162 dBc/Hz) makes the HMC1033LP6GE an ideal source for a variety of applications?such as clock references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SER DES) circuits, FPGAs and processors. The HMC1033LP6GE can also be used as an LO for 10G/40G/100G optical modules and transponders, as well as primary reference clock for 10G/40G/100G line cards, and for jitter attenuation and frequency translation.The differential output of the HMC1033LP6GE can be set to either an LVPECL or LVDS compatible mode, with further output swing which makes the device flexible and compatible with a wide variety of signal level requirements. The output can be internally terminated to reduce component count and cost. The outputs could be terminated externally in LVPECL mode using standard methods such as resistors to ground. An Output Mute function allows the user to shut off the outputs, such as may be required for board testing or debugging. The LVPECL/LVDS, amplitude select and Output Mute function are all programmed SPI serial programming.The HMC1033LP6GE is designed to select between a Power Priority or a Performance Priority mode. The Power Priority setting reduces the current consumption of the part, whereas the Performance Priority setting improves the Jitter and Phase Noise performance.The 24 bit Delta-Sigma Modulator further enhances Hittite?s Exact Frequency Mode, which enables users to generate output frequencies with 0 Hz frequency error in many applications.APPLICATIONS 10G/40G/100G Optical Modules,?Transponders, Line Cards OTN and SONET /SDH Applications Data Converters,?Sample Clock Generation Cellular/4G Infrastructure High Frequency Processor/FPGA Clocks Any Frequency Clock Rate Generation Low Jitter SAW Oscillator Replacement DDS Replacement Frequency Translation Frequency Margining

The HMC385LP4(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO with integrated resonator, negative resistance device, varactor diode, and buffer amplifier. Covering 2.25 to 2.5 GHz, the VCO?s phase noise performance is excellent over temperature, shock, vibration and process due to the oscillator?s monolithic structure. Power output is 4.5 dBm typical from a single supply of 3V @ 35mA. The voltage controlled oscillator is packaged in a low cost leadless QFN 4x4 mm surface mount package.APPLICATIONS Wireless Infrastructure Industrial Controls Test Equipment Military

The HMC386LP4(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO with integrated resonator, negative resistance device, varactor diode, and buffer amplifiers. Covering 2.6 to 2.8 GHz, the VCO?s phase noise performance is excellent over temperature, shock, vibration and process due to the oscillator?s monolithic structure. Power output is 5 dBm typical from a single supply of 3V @ 35mA. The voltage controlled oscillator is packaged in a low cost leadless QFN 4x4 mm surface mount package.APPLICATIONS Wireless Infrastructure Industrial Controls Test Equipment Military

The HMC440QS16G(E) is an integer-n synthesizer that incorporates a 10 to 1300 MHz digital Phase-Frequency Detector with 10 to 2800 MHz 5-Bit frequency counter (continuous division from 2 to 32) in miniature 16 lead QSOP plastic packages. It is intended for use in low phase noise offset-synthesizer app-lications.The HMC440QS16G(E) combines high frequency operation along with ultra low phase noise floor making possible synthesizers with wide loop bandwidth and low N resulting in fast settling and very low phase noise. When used in conjunction with a differential loop amplifier, the HMC440QS16G(E) generates an output voltage that can be used to phase lock a VCO to a reference oscillator.Applications Satellite Communication Systems? Point-to-Point Radios? Military Applications? Sonet Clock Generation Test Equipment

The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ?-? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase- locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A simple 3-wire interface controls all on-chip registers. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.Applications CATV equipment Base stations for mobile radio (GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA, W-CDMA) Wireless handsets (GSM, PCS, DCS, CDMA, W-CDMA) Wireless LANs, PMR Communications test equipment

The ADF4155 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter, external voltage controlled oscillator (VCO), and external reference frequency.The ADF4155 is for use with external VCO parts up to an 8 GHz operating frequency. The high resolution programmable modulus allows synthesis of exact frequencies with 0 Hz error.The VCO frequency can be divided by 1, 2, 4, 8, 16, 32, or 64 to allow the user to generate RF output frequencies as low as 7.8125 MHz.Control of all on-chip registers is through a simple 3-wire interface. The device operates with a nominal power supply of 3.3 V ? 5% and can be powered down when not in use.The ADF4155 is available in a 24-lead, 4 mm ? 4 mm LFCSP package.APPLICATIONS Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Test equipment Wireless LANs, CATV equipment Clock generation