The HMC440QS16G(E) is an integer-n synthesizer that incorporates a 10 to 1300 MHz digital Phase-Frequency Detector with 10 to 2800 MHz 5-Bit frequency counter (continuous division from 2 to 32) in miniature 16 lead QSOP plastic packages. It is intended for use in low phase noise offset-synthesizer app-lications.The HMC440QS16G(E) combines high frequency operation along with ultra low phase noise floor making possible synthesizers with wide loop bandwidth and low N resulting in fast settling and very low phase noise. When used in conjunction with a differential loop amplifier, the HMC440QS16G(E) generates an output voltage that can be used to phase lock a VCO to a reference oscillator.Applications Satellite Communication Systems? Point-to-Point Radios? Military Applications? Sonet Clock Generation Test Equipment

The HMC510LP5(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO. The HMC510LP5(E) integrates resonators, negative resistance devices, varactor diodes and feature half frequency and divide-by-4 outputs. The VCO?s phase noise performance is excellent over temperature, shock, and process due to the oscillator?s monolithic structure. Power output is +13 dBm typical from a +5V supply voltage. The prescaler and RF/2 functions can be disabled to conserve current if not required. The voltage controlled oscillator is packaged in a leadless QFN 5?5 mm surface mount package, and requires no external matching components.APPLICATIONS Point-to-Point/Multi-Point Radio? Test Equipment & Industrial Controls? SATCOM? Military End-Use

The HMC584LP5(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO. The HMC584LP5(E) integrates resonators, negative resistance devices, varactor diodes and feature half frequency and divide-by-4 outputs. The VCO?s phase noise performance is excellent over temperature, shock, and process due to the oscillator?s monolithic structure. Power output is +10 dBm typical from a +5V supply voltage. The prescaler and RF/2 functions can be disabled to conserve current if not required. The voltage controlled oscillator is packaged in a leadless QFN 5x5 mm surface mount package, and requires no external matching components.APPLICATIONS Point to Point/Multipoint Radio Test Equipment & Industrial Controls SATCOM Military End-Use

The HMC737 is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO. The HMC737 integrate a resonator, negative resistance device, varactor diode and feature half frequency output. The VCO's phase noise performance is excellent over temperature, shock, and process due to the oscillator's monolithic structure. Power output is +9 dBm typical from a +4.2V supply voltage. The voltage controlled oscillator is packaged in a leadless QFN 4x4 mm surface mount package, and requires no external matching components.APPLICATIONS Point-to-Multi-Point Radios Test Equipment & Industrial Controls SATCOM Military End-Use

The ADCLK905 (one input, one output), ADCLK907 (dual oneinput, one output), and ADCLK925 (one input, two outputs) areultrafast clock/data buffers fabricated on the Analog Devices, Inc.,proprietary XFCB3 silicon germanium (SiGe) bipolar process.The ADCLK905/ADCLK907/ADCLK925 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For NECL (negative ECL) operation, bias VCC to ground and VEE to the negative supply.The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate, 10 Gbps data rate, and 60 fs random jitter (RJ).The inputs have center tapped, 100 ?, on-chip termination resistors. A VREF pin is available for biasing ac-coupled inputs.The ECL output stages are designed to directly drive 800 mV each side into 50 ? terminated to VCC ? 2 V for a total differential output swing of 1.6 V.The ADCLK905/ADCLK907/ADCLK925 are available in 16-lead LFCSP packages.Applications Clock and data signal restoration and level shifting Automated test equipment (ATE) High speed instrumentation High speed line receivers Threshold detection Converter clocking

The ADCLK946 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.The device has a differential input equipped with center-tapped, differential, 100 ? on-chip termination resistors. The input accepts dc-coupled LVPECL, CML, 3.3 V CMOS (single ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREF pin is available for biasing ac-coupled inputs.The ADCLK946 features six full-swing emitter-coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply.The ECL output stages are designed to directly drive 800 mV each side into 50 ? terminated to VCC ? 2 V for a total differen-tial output swing of 1.6 V.The ADCLK946 is available in a 24-lead LFCSP and is specified for operation over the standard industrial temperature range of ?40?C to +85?C.ApplicationsLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation

The ADCLK954 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 ? on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFx pin is available for biasing ac-coupled inputs.The ADCLK954 features 12 full-swing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias Vcc to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply.The output stages are designed to directly drive 800 mV each side into 50 ? terminated to VCC ? 2 V for a total differential output swing of 1.6 V.The ADCLK954 is available in a 40-lead LFCSP and specified for operation over the standard industrial temperature range of ?40?C to +85?C.APPLICATIONS Low jitter clock distribution Clock and data signal restoration Level translation Wireless communications Wired communications Medical and industrial imaging ATE and high performance instrumentation

The ADF4007 is a high frequency divider/PLL synthesizer that can be used in a variety of communications applications. It can operate to 7.5 GHz on the RF side and to 120 MHz at the PFD. It consists of a low noise digital PFD (phase frequency detec-tor), a precision charge pump, and a divider/prescaler. The divider/prescaler value can be set by two external control pins to one of four values (8, 16, 32, or 64). The reference divider is permanently set to 2, allowing an external REFIN frequency of up to 240 MHz.A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and a VCO (voltage controlled oscillator). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.Applications Satellite communications Broadband wireless access CATV Instrumentation Wireless LANs

The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a ?-?-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment

The HMC7043 is designed to meet the requirements of multicarrier GSM and LTE base station designs, and offers a wide range of clock management and distribution features to simplify baseband and radio card clock tree designs.The HMC7043 provides 14 low noise and configurable outputs to offer flexibility in interfacing with many different components in a base transceiver station (BTS) system, such as data converters, local oscillators, transmit/receive modules, field programmable gate arrays (FPGAs), and digital front-end ASICs. The HMC7043 can generate up to seven DCLK and SYSREF clock pairs per the JESD204B/JESD204C interface requirements.The system designer can generate a lower number of DCLK and SYSREF pairs, and configure the remaining output signal paths for independent phase and frequency. Both the DCLK and SYSREF clock outputs can be configured to support different signaling standards, including CML, LVDS, LVPECL, and LVCMOS, and different bias conditions to adjust for varying board insertion losses. One of the unique features of the HMC7043 is the independent flexible phase management of each of the 14 channels. All 14 channels feature both frequency and phase adjustment. The outputs can also be programmed for 50 ? or 100 ? internal and external termination options. The HMC7043 device features an RF SYNC feature that synchronizes multiple HMC7043 devices deterministically, that is, ensures that all clock outputs start with the same edge. This operation is achieved by rephrasing the nested HMC7043 or SYSREF control unit/divider, deterministically, and then restarting the output dividers with this new phase. The HMC7043 is offered in a 48-lead, 7 mm ? 7 mm LFCSP package with an exposed pad connected to ground. Applications JESD204B/JESD204C clock generation Cellular infrastructure (multicarrier GSM, LTE, W-CDMA) Data converter clocking Phase array reference distribution Microwave baseband cards