The AD9543 supports existing and emerging ITU standards for the delivery of frequency, phase, and time of day over service provider packet networks.The 10 clock outputs of the AD9543 are synchronized to any one of up to four input references. The digital phase-locked loops (DPLLs) reduce timing jitter associated with the external references. The digitally controlled loop and holdover circuitry continuously generate a low jitter output signal, even when all reference inputs fail.The AD9543 is available in a 48-lead LFCSP (7 mm ? 7 mm) package and operates over the ?40?C to +85?C temperature range.Note that throughout this data sheet, multifunction pins, such as SDO/M5, are referred to either by the entire pin name or by a single function of the pin, for example, M5, when only that function is relevant.Appliations PTP (IEEE 1588), and SyncE jitter cleanup and synchronization Optical transport networks (OTN), SDH, and macro and small cell base stations OTN mapping/demapping with jitter cleaning Small base station clocking, including baseband and radio Stratum 2, Stratum 3e, and Stratum 3 holdover, jitter cleanup, and phase transient control JESD204B support for analog-to-digital converter (ADC) and digital-to-analog converter (DAC) clocking Cable infrastructures Carrier Ethernet

The AD9552 is a fractional-N phase locked loop (PLL) based clock generator designed specifically to replace high frequency crystal oscillators and resonators. The device employs a sigma-delta (?-?) modulator (SDM) to accommodate fractional frequency synthesis. The user supplies an input reference signal by connecting a single-ended clock signal directly to the REF pin or by connecting a crystal resonator across the XTAL pins.The AD9552 is pin programmable, providing one of 64 standard output frequencies based on one of eight common input frequencies. The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency ratios.The AD9552 relies on an external capacitor to complete the loop filter of the PLL. The output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9552 is implemented in a strictly CMOS process.The AD9552 is specified to operate over the extended industrial temperature range of ?40?C to +85?C.APPLICATIONS Cost effective replacement of high frequency VCXO, OCXO, and SAW resonators Extremely flexible frequency translation with low jitter for SONET/SDH (including FEC) , 10 Gb Ethernet, Fibre Channel, and DRFI/DOCSIS High-definition video frequency translation Wireless infrastructure Test and measurement (including handheld devices)

The AD9553 is a phase-locked loop (PLL) based clock translator designed to address the needs of passive optical networks (PON) and base stations. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. The user supplies up to two single-ended input reference signals or one differential input reference signal via the REFA and REFB inputs. The device supports holdover applications by allowing the user to connect a 25 MHz crystal resonator to the XTAL input.The AD9553 is pin programmable, providing a matrix of standard input/output frequency translations from a list of 15 possible input frequencies to a list of 52 possible output frequency pairs (OUT1 and OUT2). The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency translations.The AD9553 output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9553 is implemented in a strictly CMOS process.The AD9553 operates over the extended industrial temperature range of ?40?C to +85?C.APPLICATIONS Cost effective replacement of high frequency VCXO, OCXO, and SAW resonators Extremely flexible frequency translation for SONET/SDH, Ethernet, Fibre Channel, DRFI/DOCSIS, and PON/EPON/GPON Wireless infrastructure Test and measurement (including handheld devices)

The ADF4158 is a 6.1 GHz, fractional-N frequency synthesizer with modulation and waveform generation capability. It contains a 25-bit fixed modulus, allowing subhertz resolution at 6.1 GHz. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a sigma-delta (?-?) based fractional interpolator to allow programmable fractional-N division. The INT and FRAC registers define an overall N-divider as N = INT + (FRAC/225).The ADF4158 can be used to implement frequency shift keying (FSK) and phase shift keying (PSK) modulation. There are also a number of frequency sweep modes available, which generate various waveforms in the frequency domain, for example, sawtooth and triangular waveforms. Sweeps can be set to run automatically, or each step manually triggered by an external pulse. The ADF4158 features cycle slip reduction circuitry, which leads to faster lock times, without the need for modifications to the loop filter.Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.Applications Frequency modulated continuous wave (FMCW) radar Communications test equipment

The ADF4350 allows implementation of fractional-N orinteger-N phase-locked loop (PLL) frequency synthesizersif used with an external loop filter and external referencefrequency.The ADF4350 has an integrated voltage controlled oscillator(VCO) with a fundamental output frequency ranging from2200 MHz to 4400 MHz. In addition, divide-by-1/2/4/8 or 16circuits allow the user to generate RF output frequencies as lowas 137.5 MHz. For applications that require isolation, the RFoutput stage can be muted. The mute function is both pin- andsoftware-controllable. An auxiliary RF output is also available,which can be powered down if not in use.Control of all the on-chip registers is through a simple 3-wireinterface. The device operates with a power supply rangingfrom 3.0 V to 3.6 V and can be powered down when not in use.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Test equipment Wireless LANs, CATV equipment Clock generation

The LTC6954 is a family of very low phase noise clock distribution parts. Each part has three outputs and each output has an individually programmable frequency divider and delay. There are four members of the family, differing in their output logic signal type:LTC6954-1: Three LVPECL outputsLTC6954-2: Two LVPECL and one LVDS/CMOS outputsLTC6954-3: One LVPECL and two LVDS/CMOS outputsLTC6954-4: Three LVDS/CMOS outputsEach output is individually programmable to divide the input frequency by any integer from 1 to 63, and to delay each output by 0 to 63 input clock cycles. The output duty cycle is always 50%, regardless of the divide number. The LVDS/CMOS outputs are jumper selectable via the OUTxSEL pins to provide either an LVDS logic output or a CMOS logic output.The LTC6954 also features Linear Technology?s EZSync system for perfect clock synchronization and alignment every time.All device settings are controlled through an SPI-compatible serial port.Applications Clocking High Speed, High Resolution ADCs, DACs?and Data Acquisition Systems Low Jitter Clock Distribution

The LTC6905 precision, programmable silicon oscillator is easy to use and occupies very little board space. It requires only a single resistor to set the output frequency from 17MHz to 170MHz with a typical frequency error of 0.5% or less.The LTC6905 operates with a single 2.7V to 5.5V power supply and provides a rail-to-rail, 50% duty cycle square wave output. The CMOS output driver ensures fast rise/fall times and rail-to-rail switching. Operation is simple: A single resistor, RSET, between 10K to 25K is used to set the frequency, and an internal three-state divider (DIV input) allows for division of the master clock by 1, 2 or 4, providing three frequencies for each RSET value.The LTC6905 features a proprietary feedback loop that linearizes the relationship between RSET and frequency, eliminating the need for tables to calculate frequency. The oscillator can be easily programmed using the simple formula outlined below:See first page of Data Sheet for formula?For higher accuracy, fixed frequency versions that includean internal frequency-setting resistor, see the LTC6905-XXX Series datasheet.Applications High Frequency Precision Oscillator High Speed Data Bus Clock Fixed Crystal Oscillator Replacement Ceramic Oscillator Replacement

The LTC6905-X series of parts are precision, fixed frequency, silicon oscillators designed to minimize board space while maximizing accuracy and ease of use.Programmed at the factory to a fixed frequency, the LTC6905-X series of parts need no external trim components. An internal three-state divider allows for division of the master clock by 1, 2 or 4, providing 3 frequencies (for each device).The LTC6905-X series operate with a single 2.7V to 5.5V power supply and provide a rail-to-rail, 50% duty cycle, square wave output. The OE pin will disable the output when brought low and synchronously enable the output when brought high, avoiding pulse slivers.The four products of the LTC6905-X family are: LTC6905-133: fOSC = 133MHz, 66.7MHz, 33.3MHz LTC6905-100: fOSC = 100MHz, 50MHz, 25MHz LTC6905-96: fOSC = 96MHz, 48MHz, 24MHz LTC6905-80: fOSC = 80MHz, 40MHz, 20MHz?The LTC6905-X series of parts are designed with a factory trim option to modify the divider ratios from 1, 2, 4 to 8, 16, 32. A second trim option allows for additional master clock frequencies. For the alternate divider ratios and unlisted frequencies, contact LTC marketing.Protected by U.S. Patents, including 6614313, 6342817.Applications Data Clocks for High Reliability Applications High Vibration, High Acceleration Environments Replacement for Fixed Crystal and Ceramic Oscillators

The LTC6906 is a precision programmable oscillator that is versatile, compact and easy-to-use. Micropower operation benefits portable and battery-powered equipment. At 100kHz, the LTC6906 consumes 12?A on a 3.3V supply.A single resistor programs the oscillator frequency over a 10:1 range with better than 0.5% initial accuracy. The output frequency can be divided by 1, 3 or 10 to span a 100:1 total frequency range, 10kHz to 1MHz.No decoupling capacitor is needed in most cases, yielding an extremely compact solution occupying less than 20mm2.? Contact LTC Marketing for a version of the part with a shutdown feature or lower frequency operation.The LTC6906 is available in the 6-lead SOT-23 (ThinSOT) package.APPLICATIONS Low Cost Precision Programmable Oscillator Rugged, Compact Micropower Replacement for Crystal and Ceramic Oscillators High Shock and Vibration Environments Portable and Battery-Powered Equipment PDAs and Cellular Phones

The ADF41020 frequency synthesizer can be used to implement local oscillators as high as 18 GHz in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and high frequency programmable feedback dividers (A, B, and P). A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). The synthesizer can be used to drive external microwave VCOs via an active loop filter. Its very high bandwidth means a frequency doubler stage can be eliminated, simplifying system architecture and reducing cost. The ADF41020 is software-compatible with the existing?ADF4106/ADF4107/ADF4108 family of devices from Analog Devices, Inc. Their pinouts match very closely with the exception of the ADF41020?s single-ended RF input pin, meaning only a minor layout change is required when updating current designs.Applications Microwave point-to-point/multipoint radios Wireless infrastructure VSAT radios Test equipment Instrumentation