Dual, 14-Bit, 1230 MSPS, TxDAC+ Digital-to-Analog Converter Features: Flexible LVDS interface allows word or byte load Single-carrier W-CDMA ACLR = 82 dBc at 122.88 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Integrated 2×/4×/8× interpolator/complex modulator allows carrier placement anywhere in the DAC bandwidth Gain, dc offset, and phase adjustment for sideband suppression Multiple chip synchronization interfaces High performance, low noise PLL clock multiplier Digital inverse sinc filter Low power: 1.5 W at 1.2 GSPS, 800 mW at 500 MSPS, full operating conditions 72-lead, exposed paddle LFCSP

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2.5 V to 5.5 V, 120 A, 2-Wire Interface, Voltage-Output 12-Bit DAC Features: Buffered voltage output 12-bit DAC 6-lead SOT-23 and 8-lead MSOP packages Micropower operation: 120 μA at 3 V 2-wire (I2C-compatible) serial interface Data readback capability 2.5 V to 5.5 V power supply Guaranteed monotonic by design over all codes Power-down to 50 nA at 3 V Reference derived from power supply Power-on reset to 0 V On-chip rail-to-rail output buffer amplifier 3 power-down functions

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Dual 12-Bit nanoDAC with 5 ppm/C On-Chip Reference Features: Low power, smallest pin-compatible, dual nanoDAC AD5663R: 16 bits AD5643R: 14 bits AD5623R: 12 bits User-selectable external or internal reference External reference default On-chip 1.25 V/2.5 V, 5 ppm/°C reference 10-lead MSOP and 3 mm × 3 mm LFCSP 2.7 V to 5.5 V power supply Guaranteed monotonic by design See data sheet for additional featuresAD5623R-EP supports defense and aerospace applications (AQEC standard) Download AD5623R-EP Data Sheet (pdf) Extended temperature range: −55°C to +105°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/14633-01XE DSCC Drawing Number