Digital to Analog Converters - DAC 8-BIT DAC IC

2.7 V to 5.5 V, 140 A, Rail-to-Rail Voltage Output 12-Bit DAC in SOT-23 and MicroSOIC Packages Features: Micropower: 140 µA @ 5 V, 115 µA @ 3 V Power-Down to 200 nA @ 5 V, 50 nA @ 3 V Guaranteed Monotonic by design Power-On-Reset to Zero Volts Three Power-Down Functions SYNC (active low) Interrupt Facility Low Power, SPI™, QSPI™, MICROWIRE™ and DSP-Compatible 3-Wire Serial Interface Output Buffer Amplifier with Rail-to-Rail Operation Temperature Range: -40°C to 105°C Three Power-Down Functions

Dual, 16-Bit nanoDAC with 5 ppm/C On-Chip Reference, I2C Interface Features: Low power, smallest pin-compatible, dual nanoDACs AD5627R/AD5647R/AD5667R 12-/14-/16-bit On-chip 1.25 V/2.5 V, 5 ppm/°C reference AD5627/AD5667 12-/16-bit External reference only 3 mm × 3 mm LFCSP and 10-lead MSOP 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to zero scale Per channel power-down Hardware LDAC and CLR functions I2C-compatible serial interface supports standard (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes

Tiny 16-Bit SPI nanoDAC+, with 2 (16-Bit) LSB INL and 2 ppm/C Reference Features: Ultrasmall package: 2 mm × 2 mm, 8-lead LFCSP High relative accuracy (INL): ±2 LSB maximum at 16 bits AD5683R/AD5682R/AD5681R Low drift, 2.5 V reference: 2 ppm/°C typical Selectable span output: 2.5 V or 5 V Total unadjusted error (TUE): 0.06% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.05% of FSR maximum Low glitch: 0.1 nV-sec High drive capability: 20 mA Low power: 1.2 mW at 3.3 V Independent logic supply: 1.62 V logic compatible Wide operating temperature range: −40°C to +105°C Robust 4 kV HBM ESD protection

Low Cost 10-Bit Monolithic D/A Converter Features: Complete Current Output Converted High Stability Buried Zener Reference Laser Trimmed to High Accuracy (1/4 LSB Max Error, AD561K, T) Trimmed Output Application Resistors for 0 V to +10 V, ±5 V Ranges Fast Settling - 250 ns to 1/2 LSB Guaranteed Monotonocity Over Full Operating Temperature Range TTL/DTL and CMOS Compatible (Positive True Logic) Single Chip Monolithic Construction Available in Chip Form MIL-STD-883-Compliant Versions Available

12-Bit High Speed Multiplying D/A Converter Features: Differential Nonlinearity: ±1/2 LSB Nonlinearity: 0.05% Fast Settling Time: 250 ns High Compliance: -5 V to +10 V Differential Outputs: 0 to 4 mA Guaranteed Monotonicity: 12 bits Low Full-Scale Tempco: 10 ppm/°C Circuit Interface to TTL, CMOS, ECL, PMOS/NMOS Low Power Consumption: 225 mW Industry Standard AM6012 Pinout Available in Die Form

Quad 8-Bit Multiplying CMOS D/A Converter with Memory Features: Four DACs in a 28 Pin, 0.6 Inch Wide DIP or 28-Pin JEDEC Plastic Chip Carrier ±1/4 LSB Endpoint Linearity Guaranteed Monotonic DACs Matched to Within 1% Microprocessor Compatible Read/Write Capability (with Memory) TTL/CMOS Compatible Four-Quadrant Multiplication Single-Supply Operation (+5 V) Low Power Consumption Latch-Up Resistant Available in Die Form

10-Bit, 100 MSPS+ TxDAC D/A Converter Features: Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 10-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 40 MHz Output: 52 dBc Differential Current Outputs: 2 ma to 20 mA Edge-Triggered Latches See datasheet for additional features

16-Bit 160 MSPS 2x/4x/8x Interpolating Dual TxDAC+ D/A Converter Features: 16-bit resolution, 160 MSPS/400 MSPS input/output data rate Selectable 2×/4×/8× interpolating filter Programmable channel gain and offset adjustment fS/4, fS/8 digital quadrature modulation capability Fully compatible SPI® port Direct IF transmission mode for 70 MHz + IFs Enables image rejection architecture See datasheet for additional features

Dual, 12-Bit, 1 GSPS, Digital-to-Analog Converter Features: Low power: 1.0 W @ 1 GSPS, 600 mW @ 500 MSPS, full operating conditions Single carrier W-CDMA ACLR = 80 dBc @ 80 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Novel 2×, 4×, and 8× interpolator/coarse complex modulator allows carrier placement anywhere in DAC bandwidth Auxiliary DACs allow control of external VGA and offset control Multiple chip synchronization interface High performance, low noise PLL clock multiplier Digital inverse sinc filter 100-lead, exposed paddle TQFP