Low Cost 10-Bit Monolithic D/A Converter Features: Complete Current Output Converted High Stability Buried Zener Reference Laser Trimmed to High Accuracy (1/4 LSB Max Error, AD561K, T) Trimmed Output Application Resistors for 0 V to +10 V, ±5 V Ranges Fast Settling - 250 ns to 1/2 LSB Guaranteed Monotonocity Over Full Operating Temperature Range TTL/DTL and CMOS Compatible (Positive True Logic) Single Chip Monolithic Construction Available in Chip Form MIL-STD-883-Compliant Versions Available

Dual, 16-Bit nanoDAC with 5 ppm/C On-Chip Reference, I2C Interface Features: Low power, smallest pin-compatible, dual nanoDACs AD5627R/AD5647R/AD5667R 12-/14-/16-bit On-chip 1.25 V/2.5 V, 5 ppm/°C reference AD5627/AD5667 12-/16-bit External reference only 3 mm × 3 mm LFCSP and 10-lead MSOP 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to zero scale Per channel power-down Hardware LDAC and CLR functions I2C-compatible serial interface supports standard (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes

Data Conversion IC Development Tools EVAL-ADAS1000

Digital to Analog Converters - DAC 25V 12-BIT MULT DAC IC

Dual 12-Bit nanoDAC with 5 ppm/C On-Chip Reference Features: Low power, smallest pin-compatible, dual nanoDAC AD5663R: 16 bits AD5643R: 14 bits AD5623R: 12 bits User-selectable external or internal reference External reference default On-chip 1.25 V/2.5 V, 5 ppm/°C reference 10-lead MSOP and 3 mm × 3 mm LFCSP 2.7 V to 5.5 V power supply Guaranteed monotonic by design See data sheet for additional featuresAD5623R-EP supports defense and aerospace applications (AQEC standard) Download AD5623R-EP Data Sheet (pdf) Extended temperature range: −55°C to +105°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/14633-01XE DSCC Drawing Number

Digital to Analog Converters - DAC MULTIPLYING DAC IC

Dual, 14-Bit, 1230 MSPS, TxDAC+ Digital-to-Analog Converter Features: Flexible LVDS interface allows word or byte load Single-carrier W-CDMA ACLR = 82 dBc at 122.88 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Integrated 2×/4×/8× interpolator/complex modulator allows carrier placement anywhere in the DAC bandwidth Gain, dc offset, and phase adjustment for sideband suppression Multiple chip synchronization interfaces High performance, low noise PLL clock multiplier Digital inverse sinc filter Low power: 1.5 W at 1.2 GSPS, 800 mW at 500 MSPS, full operating conditions 72-lead, exposed paddle LFCSP

Digital to Analog Converters - DAC 12-BIT 125 MSPS+ TxDAC DAC

Analog to Digital Converters - ADC 1.8V 12Bit 80 Msps ADC

Digital to Analog Converters - DAC Single 5V 12bit SPI DAC with reference