14 Bit 250 msps dual ADC w/JESD204B

16-bit octal SPI nanoDAC

16 CHANNEL DAC IC ;ROHS COMPLIANT: YES

IC MONO 8-BIT D/A CONV

Dual 14 bit 3Gsps ADC w/JESD204B

24-Bit, 312 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers and Serial Interface Features: High performance 24-bit Σ-Δ ADC 115 dB dynamic range at 78.125 kHz output data rate 109 dB dynamic range at 312.5 kHz output data rate 312.5 kHz maximum fully filtered output word rate Pin-selectable oversampling rates of 64×, 128×, and 256× Low power mode Flexible serial peripheral interface (SPI) Fully differential modulator input On-chip differential amplifier for signal buffering On-chip reference buffer Full band, low-pass, finite impulse response (FIR) filter Overrange alert pin Digital gain correction registers Power-down mode Synchronization of multiple devices via the SYNC pin Daisy chaining

500 kSPS, 2-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC Features: 12-bit plus sign SAR ADC True bipolar input ranges Software-selectable input ranges: ±10 V, ±5 V, ±2.5 V, 0 V to +10 V 2 analog input channels with channel sequencer Single-ended, true differential, and pseudo differential analog input capability 500 kSPS throughput rate High analog input impedance Low power: 18 mW Full power signal bandwidth: 22 MHz Internal 2.5 V reference High speed serial interface See data sheet for additional features

ADC, Successive Approximation, 12-Bit, 1 Func, 1 Channel, Serial, Parallel, Word Access, CMOS, PDSO24

2.7 V to 5.5 V, <100 A, 12-BitnanoDAC, SPI Interface in LFCSP and SC70 Features: 6-lead SC70 and LFCSP packages Micropower operation: 100 μA maximum at 5 V Power-down typically to 0.2 μA at 3 V 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to 0 V with brownout detection 3 power-down functions Low power serial interface with Schmitt-triggered inputs On-chip output buffer amplifier, rail-to-rail operation SYNC interrupt facility Minimized zero-code error AD5601 buffered 8-bit DAC B version: ±0.5 LSB INL AD5611 buffered 10-bit DAC B version: ±0.5 LSB INL A version: ±4 LSB INL AD5621 buffered 12-bit DAC B version: ±1 LSB INL A version: ±6 LSB INL

8-Channel, 1.5 MSPS, 12-Bit Parallel ADCs with a Sequencer Features: Throughput rate: 1.5 MSPS Specified for VDD of 2.7 V to 5.25 V 8 analog input channels with a sequencer Software-configurable analog inputs 8-channel single-ended inputs 4-channel fully differential inputs 4-channel pseudo differential inputs 7-channel pseudo differential inputs Accurate on-chip 2.5 V reference ±0.2% maximum at 25°C, 25 ppm/°C maximumPower consumption 6 mW maximum at 1.5 MSPS with 3 V supplies 13.5 mW maximum at 1.5 MSPS with 5 V supplies 69 dB SINAD at 50 kHz input frequency No pipeline delays High speed parallel interface—word/byte modes Full shutdown mode: 2 μA maximum 32-lead LFCSP and TQFP packages