The AD5308 / AD5318 / AD5328 are octal 8-, 10-, and 12-bit buffered voltage output DACs in a 16-lead TSSOP. They operate from a single 2.5 V to 5.5 V supply, consuming 0.7 mA typical at 3 V. Their on-chipoutput amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5308/ AD5318/AD5328 use a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.The references for the eight DACs are derived from two reference pins (one per DAC quad). These reference inputs can be configured as buffered, unbuffered, or VDD inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. The outputs of all DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 400 nA at 5 V (120 nA at 3 V). The eight channels of the DAC may be powered down individually.All three parts are offered in the same pinout, which allows users to select the resolution appropriate for their application without redesigning their circuit board.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Optical networking Automatic test equipment Mobile communications Programmable attenuators Industrial process control

The AD5303 / AD5313 / AD5323 are dual 8-/10-/12-bit buffered voltage output DACs in a 16-lead TSSOP package that operate from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5313 / AD5323 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards The references for the two DACs are derived from two reference pins (one per DAC). These reference inputs may be configured as buffered or unbuffered inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. There is also an asynchronous active low CLR pin that clears both DACs to 0 V. The outputs of both DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 200 nA at 5 V (50 nA at 3 V) and provides software-selectable output loads while in power-down mode. The parts may also be used in daisy-chaining applications using the SDO pin.The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is 1.5 mW at 5 V and 0.7 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5303 / AD5313 / AD5323 are dual 8-/10-/12-bit buffered voltage output DACs in a 16-lead TSSOP package that operate from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5313 / AD5323 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards The references for the two DACs are derived from two reference pins (one per DAC). These reference inputs may be configured as buffered or unbuffered inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. There is also an asynchronous active low CLR pin that clears both DACs to 0 V. The outputs of both DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 200 nA at 5 V (50 nA at 3 V) and provides software-selectable output loads while in power-down mode. The parts may also be used in daisy-chaining applications using the SDO pin.The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is 1.5 mW at 5 V and 0.7 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5337 / AD5338 / AD5339 are dual 8-, 10-, and 12-bit buffered voltage output DACs, respectively. Each part is housed in an 8-lead MSOP package and operates from a single 2.5 V to 5.5 V supply, consuming 250 μA at 3 V. On-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-wire serial interface operates at clock rates up to 400 kHz. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus.The references for the two DACs are derived from one reference pin. The outputs of all DACs can be updated simultaneously using the software LDAC function. The parts incorporate a power-on reset circuit to ensure that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. A software clear function resets all input and DAC registers to 0 V. A power-down feature reduces the current consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is typically 1.5 mW at 5 V and 0.75 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators Industrial process control

The AD5337 / AD5338 / AD5339 are dual 8-, 10-, and 12-bit buffered voltage output DACs, respectively. Each part is housed in an 8-lead MSOP package and operates from a single 2.5 V to 5.5 V supply, consuming 250 μA at 3 V. On-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-wire serial interface operates at clock rates up to 400 kHz. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus.The references for the two DACs are derived from one reference pin. The outputs of all DACs can be updated simultaneously using the software LDAC function. The parts incorporate a power-on reset circuit to ensure that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. A software clear function resets all input and DAC registers to 0 V. A power-down feature reduces the current consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is typically 1.5 mW at 5 V and 0.75 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators Industrial process control

The AD5337 / AD5338 / AD5339 are dual 8-, 10-, and 12-bit buffered voltage output DACs, respectively. Each part is housed in an 8-lead MSOP package and operates from a single 2.5 V to 5.5 V supply, consuming 250 μA at 3 V. On-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-wire serial interface operates at clock rates up to 400 kHz. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus.The references for the two DACs are derived from one reference pin. The outputs of all DACs can be updated simultaneously using the software LDAC function. The parts incorporate a power-on reset circuit to ensure that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. A software clear function resets all input and DAC registers to 0 V. A power-down feature reduces the current consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is typically 1.5 mW at 5 V and 0.75 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators Industrial process control

The AD5360 / AD5361 contain 16, 16-/14-bit DACs in a single 52-lead LQFP package. It provides buffered voltage outputs with a span four times the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into two groups of eight DACs, and the output range of each group can be independently adjusted by an offset DAC.The AD5360 / AD5361 offer guaranteed operation over a wide supply range with VSS from −4.5 V to −16.5 V and VDD from +8 V to +16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The AD5360 / AD5361 have a high speed 4-wire serial interface, which is compatible with SPI, QSPI™, MICROWIRE™, and DSPinterface standards and can handle clock speeds of up to 50 MHz. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register.Each DAC output is amplified and buffered on-chip with respect to an external SIGGND input. The DAC outputs can also be switched to SIGGND via the CLR pin.APPLICATIONS Instrumentation Industrial control systems Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical line cards

The AD5370* contains forty 16-bit DACs in a single 64-lead LFCSP and a 64-lead LQFP. The device provides buffered voltage outputs with a span that is 4× the reference voltage. The gain and offset of each DAC channel can be independently trimmed to remove errors. For even greater flexibility, the device is divided into five groups of eight DACs. Three offset DAC channels allow the output range of blocks to be adjusted. Group 0 can be adjusted by Offset DAC 0, Group 1 can be adjusted by Offset DAC 1, and Group 2 to Group 4 can be adjusted by Offset DAC 2.The AD5370 offers guaranteed operation over a wide supply range, with VSS from −16.5 V to −4.5 V and VDD from +9 V to +16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The AD5370 has a high speed serial interface that is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards and can handle clock speeds of up to 50 MHz.The DAC registers are updated on receipt of new data. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register to allow removal of gain and offset errors.Each DAC output is gained and buffered on chip with respect to an external SIGGNDx input. The DAC outputs can also be switched to SIGGNDx via the CLR pin.Applications Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical switches Industrial control systems Instrumentation * Protected by U.S. Patent No. 5,969,657; other patents pending.  

The AD5372 / AD5373 contain 32, 16-bit or 14-bit digital-to-analog converters (DACs) in a single 64-lead LQFP. The devices provide buffered voltage outputs with a nominal span of 4× the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into four groups of eight DACs. Two offset DACs allow the output range of the groups to be altered. Group 0 can be adjusted by Offset DAC 0, and Group 1 to Group 3 can be adjusted by Offset DAC 1.The AD5372 / AD5373 offer guaranteed operation over a wide supply range: VSS from −16.5 V to −4.5 V and VDD from 9 V to 16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The ADAD5372 / AD5373 have a high-speed serial inter- face, which is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards and can handle clock speeds of up to 50 MHz.The DAC registers are updated on reception of new data. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register.Each DAC output is gained and buffered on-chip with respect to an external SIGGNDx input. The DAC outputs can also be switched to SIGGNDx via the CLR pin.APPLICATIONS Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical switches Industrial control systems Instrumentation

The AD5410/AD5420 are low cost, precision, fully integrated 12-/16-bit converters offering a programmable current source output designed to meet the requirements of industrial process control applications. The output current range is programmable at 4 mA to 20 mA, 0 mA to 20 mA, or an overrange function of 0 mA to 24 mA. The output is open-circuit protected. The device operates with a power supply (AVDD) range from 10.8 V to 60 V. Output loop compliance is 0 V to AVDD − 2.5 V.The flexible serial interface is SPI, MICROWIRE™, QSPI™, and DSP compatible and can be operated in 3-wire mode to minimize the digital isolation required in isolated applications.The device also includes a power-on reset function, ensuring that the device powers up in a known state, and an asynchronous CLEAR pin that sets the output to the low end of the selected current range.The total unadjusted error is typically ±0.01% FSR.Applications Process control Actuator control PLC HART network connectivity