Gate Drivers 6A MOSFET Driver (Noninverting)

Interface Development Tools LTC2871 RS232/RS485 Multiprotocol Transceiver with Integrated Termination

RS-232 Interface IC

The LTC4302-1/LTC4302-2 addressable I2C bus and SMBus compatible bus buffers allow a peripheral board to be inserted and removed from a live backplane without corruption of the bus. The LTC4302-1/LTC4302-2 maintain electrical isolation between the backplane and peripheral board until their VCC supply is valid and a master device on the backplane side addresses the LTC4302-1/LTC4302-2 and commands them to connect. The LTC4302-1/LTC4302-2’s ADDRESS pin provides 32 possible addresses set by an external resistive divider between VCC and GND. The LTC4302-1/LTC4302-2 work with supply voltages ranging from 2.7V to 5.5V. The SDA and SCL inputs and outputs do not load the bus lines when VCC is low.Rise time accelerator circuitry allows for heavier capacitive bus loading while still meeting system timing requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Two general purpose input/output pins (GPIOs) on the LTC4302-1 can be configured as inputs, open-drain outputs or push-pull outputs. The LTC4302-2 option replaces one GPIO pin with a second supply voltage pin VCC2, providing level shifting between systems with different supply voltages. The LTC4302-1/LTC4302-2 are available in a 10-pin MSOP package.Applications Live Board Insertion 5V/3.3V Level Translator Servers Capacitance Buffer/Bus Extender Nested Addressing

The AD1937 is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with differential input and eight digital-to-analog converters (DACs) with differential output, using the Analog Devices, Inc., patented multibit sigma-delta (Σ-Δ) architecture. An I2C® port is included, allowing a microcontroller to adjust volume and many other parameters. The AD1937 operates from 3.3 V digital and analog supplies. The AD1937 is available in a 64-lead (differential output) LQFP.The AD1937 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR (frame) clock or from an external crystal, the AD1937 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The DACs and ADCs are designed using the latest Analog Devices continuous time architecture to further minimize EMI. By using 3.3 V supplies, power consumption is minimized and further reduces emissions.ApplicationsAutomotive audio systems Home theater systemsSet-top boxesDigital audio effects processorsData Sheet, Rev. 0, 9/08

The ADM1486 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission, complies with EIA Standards RS-485 and RS-422 and is recommended for PROFIBUS applications. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver may be enabled independently. When disabled or with power off, the driver outputs are tristated.

The ADM2483 differential bus transceiver is an integrated,galvanically isolated component designed for bidirectional datacommunication on balanced, multipoint bus transmission lines.It complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E).Using the iCoupler technology from Analog Devices, Inc., theADM2483 combines a 3-channel isolator, a three-state differentialline driver, and a differential input receiver into a single package.The logic side of the device is powered with either a 5 V or 3 Vsupply, and the bus side uses a 5 V supply only.The ADM2483 is slew-limited to reduce reflections withimproperly terminated transmission lines. The controlled slewrate limits the data rate to 500 kbps. The device’s input impedanceis 96 kΩ, allowing up to 256 transceivers on the bus. Its driverhas an active-high enable feature. The driver differential outputsand receiver differential inputs are connected internally to forma differential input/output (I/O) port.When the driver is disabled or when VDD1 or VDD2 = 0 V, thisimposes minimal loading on the bus. An active-high receiverdisable feature, which causes the receive output to enter a highimpedance state, is provided as well.The receiver inputs have a true fail-safe feature that ensures alogic-high receiver output level when the inputs are open orshorted. This guarantees that the receiver outputs are in aknown state before communication begins and at the pointwhen communication ends.Current limiting and thermal shutdown features protect againstoutput short circuits and bus contention situations that mightcause excessive power dissipation. The part is fully specifiedover the industrial temperature range and is available in a16-lead, wide body SOIC package.Applications Low power RS-485/RS-422 networks Isolated interfaces Building control networks Multipoint data transmission systems

The ADM307xE are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards: RS-485 and RS-422.The devices have a ⅛ unit load receiver input impedance, which allows up to 256 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which eliminates the need for external bias resistors and ensures a logic high output level when the inputs are open or shorted. This guarantees that the receiver outputs are in a known state before communication begins and when communication ceases.Applications Power/energy metering Industrial control Lighting systems Telecommunications Security systems Instrumentation

The ADM307xE are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards: RS-485 and RS-422.The devices have a ⅛ unit load receiver input impedance, which allows up to 256 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which eliminates the need for external bias resistors and ensures a logic high output level when the inputs are open or shorted. This guarantees that the receiver outputs are in a known state before communication begins and when communication ceases.Applications Power/energy metering Industrial control Lighting systems Telecommunications Security systems Instrumentation

The ADM3202 / ADM3222 / ADM1385 are high speed, 2-channel RS232/V.28 interface devices which operate from a single +3.3 V power supply. Low power consumption and a shutdown facility (ADM3222 / ADM1385) makes them ideal for battery powered portable instruments.The ADM3202 / ADM3222 / ADM1385 conform to the EIA-232E and CCITT V.28 specifications and operate at data rates up to 230 kbps. Four external 0.1 µF charge pump capacitors are used for the voltage doubler/inverter permitting operation from a single +3.3 V supply.The ADM3222 / ADM1385 contain additional enable and shutdown circuitry. The EN input may be used to three-state the receiver outputs. The SD input is used to power down the charge pump and transmitter outputs reducing the quiescent current to less than 1 µA. The receivers remain enabled during shutdown unless disabled using EN.The ADM3202 is available in a 16-lead DIP, narrow and wide SO as well as a space saving TSSOP package. The ADM3222 is available in 18 lead DIP , SO and in 20 lead SSOP and TSSOP. The ADM1385 is available in a 20 lead SSOP package and is pin compatible with the LTC1385 CG.