The AD8016 is a 2nd generation DSL line driver capable of delivering full rate ADSL from the Central Office on a cool 1.5 W total power dissipation.With the addition of a flexible Standby functionality, and packaged in a 20-Lead PSOP, a 24-Lead SOIC, and a 28-Lead TSSOP package, the AD8016 is optimized for DSL line driving at both ends of the line. Novel circuit design and a new ±12 V, high speed bipolar process enable each amplifier in the dual AD8016 to deliver 20 V pk-to-pk output voltage and more than 400 mA typical output current.The combination of a breakthrough in two stage current gain and high speed bipolar process technology means that the AD8016 can deliver low distortion output voltages to within 2 V of the power supply rail, setting the standard in high efficiency.

The ADM307xE are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards: RS-485 and RS-422.The devices have a ⅛ unit load receiver input impedance, which allows up to 256 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which eliminates the need for external bias resistors and ensures a logic high output level when the inputs are open or shorted. This guarantees that the receiver outputs are in a known state before communication begins and when communication ceases.Applications Power/energy metering Industrial control Lighting systems Telecommunications Security systems Instrumentation

The ADM307xE are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards: RS-485 and RS-422.The devices have a ⅛ unit load receiver input impedance, which allows up to 256 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which eliminates the need for external bias resistors and ensures a logic high output level when the inputs are open or shorted. This guarantees that the receiver outputs are in a known state before communication begins and when communication ceases.Applications Power/energy metering Industrial control Lighting systems Telecommunications Security systems Instrumentation

The ADM3202 / ADM3222 / ADM1385 are high speed, 2-channel RS232/V.28 interface devices which operate from a single +3.3 V power supply. Low power consumption and a shutdown facility (ADM3222 / ADM1385) makes them ideal for battery powered portable instruments.The ADM3202 / ADM3222 / ADM1385 conform to the EIA-232E and CCITT V.28 specifications and operate at data rates up to 230 kbps. Four external 0.1 µF charge pump capacitors are used for the voltage doubler/inverter permitting operation from a single +3.3 V supply.The ADM3222 / ADM1385 contain additional enable and shutdown circuitry. The EN input may be used to three-state the receiver outputs. The SD input is used to power down the charge pump and transmitter outputs reducing the quiescent current to less than 1 µA. The receivers remain enabled during shutdown unless disabled using EN.The ADM3202 is available in a 16-lead DIP, narrow and wide SO as well as a space saving TSSOP package. The ADM3222 is available in 18 lead DIP , SO and in 20 lead SSOP and TSSOP. The ADM1385 is available in a 20 lead SSOP package and is pin compatible with the LTC1385 CG.

The ADM3310E is a three-driver/five-receiver serial port transceiver, which meets EIA-232 standards while operating from a single power supply as low as +2.7V. It is similar to the ADM3311E but with two of the Receivers remain Active during Shutdown. It features an on-board, charge pump dc-to-dc converter, which eliminates the need for dual power supplies.This dc-to-dc converter also contains a voltage tripler and voltage inverter for internally generating positive and negative supplies from the power supply. It operates in Green Idle Mode, where the charge pump oscillator is gated on and off to maintain output voltage to +/-6 V, regardless of the load conditions. Another key feature is its ESD protection: up to +/−15kV on all I/O lines. The ADM3310E is available in a 28-pin TSSOP package as well as a space-saving 5×5mm 32-pin LFCSP package.APPLICATIONS Mobile phone handsets/data cables Laptop and notebook computers Printers Peripherals Modems PDAs/Hand-Held Devices/Palmtop Computers

The ADM3312E is a three-driver/three-receiver serial port transceiver, which meets full EIA-232 standards while operating from a single power supply as low as +2.7V. It features an on-board, charge pump dc-to-dc converter, which eliminates the need for dual power supplies. This dc-to-dc converter also contains a voltage tripler and voltage inverter for internally generating positive and negative supplies from the power supply. It operates in Green Idle Mode, where the charge pump oscillator is gated on and off to maintain output voltage to +/-7.25 V, regardless of the load conditions. Another key feature is its ESD protection: up to +/-15kV on all I/O lines. The ADM3312E is available in a 24-pin TSSOP package as well as a space-saving 32-pin LFCSP package.APPLICATIONS Mobile phone handsets/data cables Laptop and notebook computers Printers Peripherals Modems PDAs/Hand-Held Devices/Palmtop Computers

The ADM3483E / ADM3486E / ADM3488E / ADM3490E / ADM3491E are 3.3 V low power data transceivers with ±15 kV ESD protection suitable for full and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission and comply with TIA/EIA standards RS-485 and RS-422. The ADM3483E / ADM3486E are half-duplex transceiver that shares differential lines and has separate enable inputs for the driver and receiver. The full-duplex ADM3488E / ADM3490E / ADM3491E transceivers have dedicated differential line driver outputs and receiver inputs. The ADM3491E also features enable inputs for the driver and receiver.The devices have a 12 kΩ receiver input impedance which allows up to 32 transceivers on a bus. Since only one driver should be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus. The driver outputs of the ADM3483E / ADM3486E / ADM3488E are slew rate limited, in order to reduce EMI and data errors caused by reflections from improperly terminated buses. The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating.Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit. The parts are fully specified over the commercial and industrial temperature ranges and are available in narrow 8-lead and 14-lead (ADM3491E) SOIC packages.

The ADM3483E / ADM3486E / ADM3488E / ADM3490E / ADM3491E are 3.3 V low power data transceivers with ±15 kV ESD protection suitable for full andhalf-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission and comply with TIA/EIA standards RS-485 and RS-422. The ADM3483E / ADM3486E is a half-duplex transceiver that shares differential lines and has separate enable inputs for the driver and receiver. The full-duplex ADM3488E / ADM3490E / ADM3491E transceivers have dedicated differential line driver outputs and receiver inputs. The ADM3491E also features enable inputs for the driver and receiver.The devices have a 12 kΩ receiver input impedance which allows up to 32 transceivers on a bus. Since only one driver should be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus. The driver outputs of the ADM3483E / ADM3486E / ADM3488E are slew rate limited in order to reduce EMI and data errors caused by reflections from improperly terminated buses. The receiver has a failsafe feature which ensures a logic high output when the inputs are floating. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit. The parts are fully specified over the industrialtemperature ranges and are available in narrow 8-lead and 14-lead (ADM3491E) SOIC packages.

The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.Applications Smartphones/Multimedia phones Digital Still Cameras/Digital Video Cameras Portable Media Players/Portable Audio Players Phone accessories products

The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.Applications Smartphones/Multimedia phones Digital Still Cameras/Digital Video Cameras Portable Media Players/Portable Audio Players Phone accessories products