SPECIAL FUNCTION IC ROHS COMPLIANT: YES

Up-Down Converters Hi IP3 Dual Dwncon, w/LO Swt, 1.7-2.2GHz

3GHz HDMI 2:2 cross point Transceiver with On-Screen Display Features: 2-input, 2-output cross-point HDMI® transceiver HDMI support 3 GHz video support (e.g. 4k × 2k) Audio return channel (ARC) 3D TV support Content type bits CEC 1.4-compatible Extended colorimetry High-Bandwidth Digital Content Protection (HDCP 1.4) Ultralow jitter digital PLL (100% deskew) Character- and icon-based on-screen display (OSD) 3D OSD overlay on all mandatory 3D formats Support for OSD overlay on 3 GHz video formats HDCP repeater support: up to 127 KSVs supported 300 MHz maximum TMDS clock frequency (up to 4k × 2k) 48-, 36-, 30-bit deep colour input modes supported See data sheet for additional features

SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs Features: 28-/56-bit, 50 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of −83 dB 4 DACs: SNR of 104 dB, THD + N of −90 dB Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC with 4-input mux for analog control GPIOs for digital controls and outputs Fully programmable with SigmaStudio graphical tool 28-bit × 28-bit multiplier with 56-bit accumulator for full double-precision processing Clock oscillator for generating master clock from crystal See Data Sheet for Additional Information

GaAs MMIC I/Q Upconverter, 37 - 40 GHz Features: Conversion Gain: 10 dB Sideband Rejection: 17 dBc High Output IP3: +27 dBm 16 Lead 5x5 mm SMT Ceramic Package: 25 mm2

Single/Dual, +15 V/5 V, 256-Position, I2C-Compatible Digital Potentiometer Features: AD5280: 1 channel AD5282: 2 channels 256 positions +10 V to +15 V single supply; ±5.5 V dual-supply operation 20 kΩ, 50 kΩ, 200 kΩ fixed terminal resistance Low temperature coefficient: 30 ppm/°C Power-on midscale preset1  Programmable reset Operating temperature: −40°C to +85°C I2C-compatible interface

The ADV3200/ADV3201 are 32 × 32 analog crosspoint switch matrices. They feature a selectable sync-tip clamp input forac-coupled applications and an on-screen display (OSD) insertion mux. With −48 dB of crosstalk and −80 dB isolationat 5 MHz, the ADV3200/ADV3201 are useful in many high density routing applications. The 0.1 dB flatness out to 60 MHz makes the ADV3200/ADV3201 ideal for composite video switching.The 32 independent output buffers of the ADV3200/ADV3201 can be placed into a high impedance state for paralleling crosspoint outputs so that off-channels present minimal loading to an output bus if building a larger array. The part is available in gain of +1 (ADV3200) or +2 (ADV3201) for ease of use in back-terminated load applications. A single 5 V supply, dual ±2.5 V supplies, or dual ±3.3 V supplies (G = +2) can be used while consuming only 250 mA of idle current with all outputs enabled. The channel switching is performed via a double buffered, serial digital control, which can accommodate daisy chaining of several devices. The ADV3200/ADV3201 are packaged in a 176-lead exposed pad LQFP (24 mm × 24 mm) and are available over the extended industrial temperature range of −40°C to +85°C.Applications CCTV surveillance Routing of high speed signals including         Composite video (NTSC, PAL, S, SECAM)         RGB and component video routing         Compressed video (MPEG, Wavelet) Video conferencing 

The AD8400 / AD8402 / AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.APPLICATIONS Mechanical potentiometer replacement Programmable filters, delays, time constants Volume control, panning Line impedance matching Power supply adjustment

The AD8400/AD8402/AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The AD8400/AD8402/AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.