A2B Main 4xPDM XCVR wI2S/TDM Features:A2B BUS FEATURES Line topology Single main node, multiple subordinate nodes Up to 15 m between nodes and up to 40 m overall cable length Communication over distance Synchronous data Multichannel I2S/TDM to I2S/TDM Synchronous clock, phase aligned in all nodes Low latency node to node communication Control and status information I2C to I2C GPIO and interrupt Bus power or local power subordinate nodes Configurable with SigmaStudio/SigmaStudio+ graphical software tool AEC-Q100 qualified for automotive applicationsA2B TRANSCEIVER FEATURES Configurable A2B bus main node or subordinate node Programmable via I2C interface 8-bit to 32-bit multichannel I2S/TDM interface Programmable I2S/TDM data rate Up to 32 upstream and 32 downstream channels PDM interface Programmable PDM clock rate Up to 4 high dynamic range microphone inputs Simultaneous reception of I2S data with up to 4 PDM microphones Unique ID register for each transceiver Crossover or straight-through cabling Programmable settings to optimize EMC performance

Single/Dual, +15 V/5 V, 256-Position, I2C-Compatible Digital Potentiometer Features: AD5280: 1 channel AD5282: 2 channels 256 positions +10 V to +15 V single supply; ±5.5 V dual-supply operation 20 kΩ, 50 kΩ, 200 kΩ fixed terminal resistance Low temperature coefficient: 30 ppm/°C Power-on midscale preset1  Programmable reset Operating temperature: −40°C to +85°C I2C-compatible interface

The Blackfin® Processor family has been expanded to address the ever-increasing need for pervasive embedded network connectivity with two new family members. This connectivity is powerful when utilized in conjunction with the high performance 16-/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the Dynamic Power Management (DPM) functionality. System designers can take advantage of the combined control and signal processing capabilities of the processor core across a wide range of end applications through the scalability of the pin and code compatibility of these new family members. The ADSP-BF536 and ADSP-BF537 are a functional extension of the popular ADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors, and they are ideally suited for a variety of networked applications. The ADSP-BF537 is the higher performance series member, with more embedded memory enabling higher throughput needs for embedded applications suchas video security/surveillance and industrial-environment-based distributed control/factory automation applications. The ADSP-BF536 offers exceptional performance and is designed for low cost connected devices such as remote monitoring devices, VoIP, point-of-saleterminals, and biometrics/security applications. Both devices are ideally suited for a broad range of industrial, instrumentation, medical, and consumer appliance applications— allowing for scalability based upon the required network bandwidth and mix of control, plus signal processing needed in the end product.

The ADN8833 is a monolithic H-bridge TEC driver with integrat-ed 1 A power MOSFETs. It has a linear power stage with the linear driver (LDR) output and a pulse-width modulation (PWM) power stage with the SW output. Depending on the control voltage at the CONT input, the ADN8833 drives current through a TEC to settle the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.The control voltage applied to the CONT input is generated by a digital-to-analog converter (DAC) closing the digital proportional, integral, derivative (PID) loop of temperature control system.The internal 2.5 V reference voltage provides a 1% accurate output that is used to bias a voltage divider network to program the maximum TEC current and voltage limits for both the heating and cooling modes. It can also be a reference voltage for the DAC and the temperature sensing circuit, including a thermistor bridge and an analog-to-digital converter (ADC).APPLICATIONS TEC temperature control Optical modules Optical fiber amplifiers Optical networking systems Instruments requiring TEC temperature control

The ADN88341 is a monolithic TEC controller with an integrated TEC controller. It has a linear power stage, a pulse-width modulation (PWM) power stage, and two zero-drift, rail-to-rail operational amplifiers. The linear controller works with the PWM driver to control the internal power MOSFETs in an H-bridge configuration. By measuring the thermal sensor feedback voltage and using the integrated operational amplifiers as a proportional integral differential (PID) compensator to condition the signal, the ADN8834 drives current through a TEC to settle the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.The ADN8834 supports negative temperature coefficient (NTC) thermistors as well as positive temperature coefficient (PTC) resistive temperature detectors (RTD). The target temperature is set as an analog voltage input either from a digital-to-analog converter (DAC) or from an external resistor divider.The temperature control loop of the ADN8834 is stabilized by PID compensation utilizing the built in, zero drift chopper amplifiers. The internal 2.50 V reference voltage provides a 1% accurate output that is used to bias a thermistor temperature sensing bridge as well as a voltage divider network to program the maximum TEC current and voltage limits for both the heating and cooling modes. With the zero drift chopper amplifiers, extremely good long-term temperature stability is maintained via an autonomous analog temperature control loop.APPLICATIONS TEC temperature control Optical modules Optical fiber amplifiers Optical networking systems Instruments requiring TEC temperature control1 Product is covered by U.S. Patent No. 6,486,643.

The ADRF6658 is a high performance, low power, wideband, dual-channel radio frequency (RF) downconverter with integrated intermediate frequency (IF) digitally controlled amplifiers (DGAs) for wideband, low distortion base station radio receivers.The dual Rx mixers are doubly balanced Gilbert cell mixers with high linearity and excellent image rejection. Both mixers convert 50 Ω RF inputs to open-collector broadband IF outputs. Internal tunable baluns on the RF inputs enable suppression of RF signal harmonics and attenuation of out-of-band signals before the mixer inputs, reducing input reflections and out-of-band interference signals. A flexible local oscillator (LO) architecture allows the use of differential or single-ended LO signals.The dual-channel IF DGAs are based on the ADL5201 and ADL5202 and have a fixed, differential output impedance of 100 Ω. The gain is adjustable over a 31.5 dB range with a 0.5 dB step size via the on-chip SPI, or through independent, 6-bit parallel ports that support latch functionality. Each channel, from the mixer inputs to the IF amplifier outputs, together with an LC interstage band-pass filter, achieves a maximum voltage conversion gain of 26.5 dB.Fabricated with the Analog Devices, Inc., high speed SiGe process, the ADRF6658 is available in a compact, 7 mm × 7 mm, 48-lead LFCSP package, and operates over the −40°C to +105°C temperature range.APPLICATIONS Cellular base stations and wireless infrastructure receivers (W-CDMA, TD-SCDMA, WiMAX, GSM, LTE, PCS, DCS, DECT) Active antenna systems PTP radio link down converters Wireless LANs and CATV equipment

The AD8400 / AD8402 / AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.APPLICATIONS Mechanical potentiometer replacement Programmable filters, delays, time constants Volume control, panning Line impedance matching Power supply adjustment

The AD8400/AD8402/AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The AD8400/AD8402/AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The AD9835 is a numerically-controlled oscillator employing a phase accumulator, a COS lookup table, and a 10-bit digital-to-analog converter integrated on a single CMOS chip. Modulation capabilities are provided for phase modulation and frequency modulation.Clock rates of up to 50 MHz are supported. Frequency accuracycan be controlled to one part in 4 billion. Modulation is effected by loading registers through the serial interface. A power-down bit allows the user to power down the AD9835 when it is not in use, the power consumption reduces to 1.75 mW.The part is available in a 16-lead TSSOP package.APPLICATIONS Frequency stimulus/waveform generation Frequency phase tuning and modulation Low power RF/communications systems Liquid and gas flow measurement Sensory applications: proximity, motion, and defect detection Test and medical equipment