The ADN88341 is a monolithic TEC controller with an integrated TEC controller. It has a linear power stage, a pulse-width modulation (PWM) power stage, and two zero-drift, rail-to-rail operational amplifiers. The linear controller works with the PWM driver to control the internal power MOSFETs in an H-bridge configuration. By measuring the thermal sensor feedback voltage and using the integrated operational amplifiers as a proportional integral differential (PID) compensator to condition the signal, the ADN8834 drives current through a TEC to settle the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.The ADN8834 supports negative temperature coefficient (NTC) thermistors as well as positive temperature coefficient (PTC) resistive temperature detectors (RTD). The target temperature is set as an analog voltage input either from a digital-to-analog converter (DAC) or from an external resistor divider.The temperature control loop of the ADN8834 is stabilized by PID compensation utilizing the built in, zero drift chopper amplifiers. The internal 2.50 V reference voltage provides a 1% accurate output that is used to bias a thermistor temperature sensing bridge as well as a voltage divider network to program the maximum TEC current and voltage limits for both the heating and cooling modes. With the zero drift chopper amplifiers, extremely good long-term temperature stability is maintained via an autonomous analog temperature control loop.APPLICATIONS TEC temperature control Optical modules Optical fiber amplifiers Optical networking systems Instruments requiring TEC temperature control1 Product is covered by U.S. Patent No. 6,486,643.

The ADRF6658 is a high performance, low power, wideband, dual-channel radio frequency (RF) downconverter with integrated intermediate frequency (IF) digitally controlled amplifiers (DGAs) for wideband, low distortion base station radio receivers.The dual Rx mixers are doubly balanced Gilbert cell mixers with high linearity and excellent image rejection. Both mixers convert 50 Ω RF inputs to open-collector broadband IF outputs. Internal tunable baluns on the RF inputs enable suppression of RF signal harmonics and attenuation of out-of-band signals before the mixer inputs, reducing input reflections and out-of-band interference signals. A flexible local oscillator (LO) architecture allows the use of differential or single-ended LO signals.The dual-channel IF DGAs are based on the ADL5201 and ADL5202 and have a fixed, differential output impedance of 100 Ω. The gain is adjustable over a 31.5 dB range with a 0.5 dB step size via the on-chip SPI, or through independent, 6-bit parallel ports that support latch functionality. Each channel, from the mixer inputs to the IF amplifier outputs, together with an LC interstage band-pass filter, achieves a maximum voltage conversion gain of 26.5 dB.Fabricated with the Analog Devices, Inc., high speed SiGe process, the ADRF6658 is available in a compact, 7 mm × 7 mm, 48-lead LFCSP package, and operates over the −40°C to +105°C temperature range.APPLICATIONS Cellular base stations and wireless infrastructure receivers (W-CDMA, TD-SCDMA, WiMAX, GSM, LTE, PCS, DCS, DECT) Active antenna systems PTP radio link down converters Wireless LANs and CATV equipment

Telecom Interface ICs 3.3/5V E1 Single Chip Transceiver

GaAs MMIC I/Q Upconverter, 37 - 40 GHz Features: Conversion Gain: 10 dB Sideband Rejection: 17 dBc High Output IP3: +27 dBm 16 Lead 5x5 mm SMT Ceramic Package: 25 mm2

9 GHz to 12 GHz, GaAs, MMIC, I/Q Downconverter Features: Conversion gain: 11 dB (typical) at IFOUT = 100 MHz Image rejection: 25 dB (typical) at IFOUT = 100 MHz LO to RF isolation: 46 dB (typical) LO to IF isolation: 26 dB (typical) IF output frequency: dc to 3.5 GHz 32-lead, 4.9 mm × 4.9 mm ceramic leadless chip carrier

A2B Main 4xPDM XCVR wI2S/TDM Features:A2B BUS FEATURES Line topology Single main node, multiple subordinate nodes Up to 15 m between nodes and up to 40 m overall cable length Communication over distance Synchronous data Multichannel I2S/TDM to I2S/TDM Synchronous clock, phase aligned in all nodes Low latency node to node communication Control and status information I2C to I2C GPIO and interrupt Bus power or local power subordinate nodes Configurable with SigmaStudio/SigmaStudio+ graphical software tool AEC-Q100 qualified for automotive applicationsA2B TRANSCEIVER FEATURES Configurable A2B bus main node or subordinate node Programmable via I2C interface 8-bit to 32-bit multichannel I2S/TDM interface Programmable I2S/TDM data rate Up to 32 upstream and 32 downstream channels PDM interface Programmable PDM clock rate Up to 4 high dynamic range microphone inputs Simultaneous reception of I2S data with up to 4 PDM microphones Unique ID register for each transceiver Crossover or straight-through cabling Programmable settings to optimize EMC performance

3GHz HDMI 2:2 cross point Transceiver with On-Screen Display Features: 2-input, 2-output cross-point HDMI® transceiver HDMI support 3 GHz video support (e.g. 4k × 2k) Audio return channel (ARC) 3D TV support Content type bits CEC 1.4-compatible Extended colorimetry High-Bandwidth Digital Content Protection (HDCP 1.4) Ultralow jitter digital PLL (100% deskew) Character- and icon-based on-screen display (OSD) 3D OSD overlay on all mandatory 3D formats Support for OSD overlay on 3 GHz video formats HDCP repeater support: up to 127 KSVs supported 300 MHz maximum TMDS clock frequency (up to 4k × 2k) 48-, 36-, 30-bit deep colour input modes supported See data sheet for additional features

Clock-Tunable, Quad Second Order, Filter Building Blocks Features: Four Identical 2nd Order Filter Sections in an SSOP Package 2nd Order Section Center Frequency Error: ±0.3% Typical and ±0.8% Maximum Low Noise per 2nd Order Section, Q ≤ 5: LTC1068-200 50µVRMS, LTC1068 50µVRMS  LTC1068-50 70µVRMS, LTC1068-25 90µVRMS Low Power Supply Current: 4.5mA, Single 5V, LTC1068-50 Operation with ±5V Power Supply, Single 5V Supply or Single 3.3V Supply

5.9 GHz to 23.6 GHz, Wideband, Microwave Upconverter Features: Wideband RF output frequency range: 5.9 GHz to 23.6 GHz Two upconversion modes Direct conversion from baseband I/Q to RF Single sideband upconversion from real IF LO input frequency range: 5.4 GHz to 14 GHz LO doubler for up to 28 GHz Matched 100 Ω balanced RF output, LO input, and IF input High impedance baseband inputs Sideband suppression and carrier feedthrough optimization Variable attenuator and power detector for Tx power control Programmable via 4-wire SPI interface 32-lead, 5 mm × 5 mm LFCSP microwave packaging

Single/Dual, +15 V/5 V, 256-Position, I2C-Compatible Digital Potentiometer Features: AD5280: 1 channel AD5282: 2 channels 256 positions +10 V to +15 V single supply; ±5.5 V dual-supply operation 20 kΩ, 50 kΩ, 200 kΩ fixed terminal resistance Low temperature coefficient: 30 ppm/°C Power-on midscale preset1  Programmable reset Operating temperature: −40°C to +85°C I2C-compatible interface