SPECIAL FUNCTION IC;

SPECIAL FUNCTION IC;

SPECIAL FUNCTION IC;

SPECIAL FUNCTION IC;

SPECIAL FUNCTION IC;

AUDIO / VIDEO ANALOG DEVELOPMENT KITS;

Ultracompact 1.5 A Thermoelectric Cooler (TEC) Controller Features: Patented high efficiency single inductor architecture Integrated low RDSON MOSFETs for the TEC controller TEC voltage and current operation monitoring No external sense resistor required Independent TEC heating and cooling current limits settings Programmable maximum TEC voltage 2.0 MHz PWM driver switching frequency External synchronization Two integrated zero drift, rail-to-rail chopper amplifiers Capable of NTC or RTD thermal sensors 2.50 V reference output with 1% accuracy Temperature lock indicator Available in a 25-ball, 2.5 mm × 2.5 mm WLCSP or in a 24-lead, 4 mm × 4 mm LFCSP AEC-Q100 qualified for automotive applications

Four ADC, Two DAC, Low Power Codec with Audio DSPs Features: Programmable FastDSP audio processing engine Up to 768 kHz sample rate Biquad filters, limiters, volume controls, mixing 28-bit SigmaDSP audio processing core Visually programmable using SigmaStudio Up to 50 MIPS performance Low latency, 24-bit ADCs and DACs 96 dB SNR (signal through PGA and ADC with A-weighted filter) 105 dB combined SNR (signal through DAC and headphone with A-weighted filter) Serial port fSYNC frequency from 8 kHz to 768 kHz 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions) 4 single-ended analog inputs, configurable as microphone or line inputs 8 digital microphone inputs 2 analog differential audio outputs, configurable as either line output or headphone driver PLL supporting any input clock rate from 30 kHz to 27 MHz Full-duplex, 4-channel ASRCs 2, 16-channel serial audio ports supporting I2S, left justified, or up to TDM16 8 interpolators and 8 decimators with flexible routing Power supplies Analog AVDD at 1.8 V typical Digital I/O IOVDD at 1.1 V to 1.98 V Digital DVDD at 0.9 V typical Low power (11.079 mW for typical stereo ANC settings) I2C and SPI control interfaces, self boot from I2C EEPROM Flexible GPIO 42-ball, 0.35 mm pitch, 2.695 mm × 2.320 mm WLCSP

SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs Features: 28-/56-bit, 50 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of −83 dB 4 DACs: SNR of 104 dB, THD + N of −90 dB Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC with 4-input mux for analog control GPIOs for digital controls and outputs Fully programmable with SigmaStudio graphical tool 28-bit × 28-bit multiplier with 56-bit accumulator for full double-precision processing Clock oscillator for generating master clock from crystal See Data Sheet for Additional Information

Clock-Tunable, Quad Second Order, Filter Building Blocks Features: Four Identical 2nd Order Filter Sections in an SSOP Package 2nd Order Section Center Frequency Error: ±0.3% Typical and ±0.8% Maximum Low Noise per 2nd Order Section, Q ≤ 5: LTC1068-200 50µVRMS, LTC1068 50µVRMS  LTC1068-50 70µVRMS, LTC1068-25 90µVRMS Low Power Supply Current: 4.5mA, Single 5V, LTC1068-50 Operation with ±5V Power Supply, Single 5V Supply or Single 3.3V Supply