Video Switch ICs

Telecom Interface ICs

Telecom Interface ICs 8-Port E1/T1/J1 Transceiver

The SSM2380 is a fully integrated, high efficiency, stereo, Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 2 W of continuous output power with 100 dB.Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures. An added benefit of spread-spectrum ?-? modu-lation is that no synchronization (SYNC) is needed when using multiple Class-D amplifiers. For applications that require long speaker cables (>10 cm), the SSM2380 includes a user-selectable ultralow EMI emissions mode that eliminates the need for EMI filters at the Class-D outputs.The SSM2380 has a micropower shutdown mode with a typicalshutdown current of 20 nA. Shutdown is enabled by applying alogic low to the SD pin or through an optional independent channel soft shutdown via I2C.The device also includes pop-and-click suppression circuitry. Thissuppression circuitry minimizes voltage glitches at the outputduring turn-on and turn-off, reducing audible noise on activationand deactivation.The fully differential inputs of the SSM2380 provides excellentrejection of common-mode noise on the input. Input couplingcapacitors can be omitted if the dc input common-mode voltage isapproximately VDD/2.The SSM2380 is specified over the commercial temperature range(?40?C to +85?C). It has built-in thermal shutdown and outputshort-circuit protection. It is available in a 16-ball, 2 mm ? 2 mmwafer level chip scale package (WLCSP).Applications Mobile phones MP3 players Portable electronics

The ADuC831 is a fully integrated 247 kSPS data acquisitionsystem incorporating a high performance self-calibrating multi-channel12-bit ADC, dual 12-bit DACs, and programmable8-bit MCU on a single chip.The microcontroller core is an 8052, and therefore 8051-instruction-set compatible with 12 core clock periods per machinecycle. 62 kBytes of nonvolatile Flash/EE program memory areprovided on-chip. Four kBytes of nonvolatile Flash/EE datamemory, 256 bytes RAM and 2 kBytes of extended RAM arealso integrated on-chip.The ADuC831 also incorporates additional analog functionalitywith two 12-bit DACs, power supply monitor, and a band gapreference. On-chip digital peripherals include two 16-bit ?-?DACs, dual output 16-bit PWM, watchdog timer, time intervalcounter, three timers/counters, Timer 3 for baud rate generationand serial I/O ports (I2C, SPI and UART).On-chip factory firmware supports in-circuit serial download anddebug modes (via UART), as well as single-pin emulation modevia the EA pin. The ADuC831 is supported by QuickStart? andQuickStart Plus development systems featuring low cost softwareand hardware development tools.?The part is specified for 3 V and 5 V operation over the extendedindustrial temperature range, and is available in a 52-lead plasticquad flatpack package and in a 56-lead chip scale package.Applications Optical networking?laser power control Base station systems Precision instrumentation, smart sensors Transient capture systems DAS and communications systems

The SSM2518 is a digital input, Class-D power amplifier that combinesa digital-to-analog converter (DAC) and a sigma-delta(?-?) Class-D modulator. This unique architecture enablesextremely low real-world power consumption from digitalaudio sources with excellent audio performance. The SSM2518is ideal for power sensitive applications, such as mobile phonesand portable media players, where system noise can corruptsmall analog signals such as those sent to an analog input audioamplifier.Using the SSM2518, audio data can be transmitted to the amplifierover a standard digital audio serial interface, thereby significantlyreducing the effect of noise sources such as GSM interference orother digital signals on the transmitted audio. The closed-loopdigital input design retains the benefits of an all digital amplifier,yet enables very good PSRR and audio performance. The threelevel, ?-? Class-D modulator is designed to provide the leastamount of EMI interference, the lowest quiescent power dissipation,and the highest audio efficiency without sacrificingaudio quality.Input is provided via a serial audio interface, programmable toaccept all common audio formats including I2S and TDM. Controlof the IC is provided via an I2C control interface. The SSM2518can accept a variety of input MCLK frequencies and can useBCLK as the clock source in some configurations.Additional features include a soft digital volume control, deemphasis,and a programmable digital dynamic rangecompressor.The architecture of the SSM2518 provides a solution that offerslower power and higher performance than existing DAC plusClass-D solutions. Its digital interface also offers a better systemsolution for other products whose sole audio source is digital,such as wireless speakers, laptop PCs, portable digital televisions,and navigation systems.Applications Mobile phones Portable media players Laptop PCs Wireless speakers Portable gaming Small LCD televisions Navigation systems

Reaching speeds of up to 1 GHz, the ADSP-SC59x processors are members of the SHARC? family of products. The ADSP-SC59x?processor is a dual-SHARC+? core DSP that doubles the audio performance of its single-SHARC+ core ADSP-2156x predecessor and adds an integrated Arm Cortex-A5 core, also running at up to 1 GHz. The A5 processor, with FPU and Neon? DSP extensions, handles additional real-time processing tasks and manages peripherals used to interface to time-critical data in audio applications. These interfaces include Gigabit Ethernet, USB High-Speed, CAN FD, and a rich variety of other connectivity options for a flexible and simplified system design.The ADSP-SC59x?SHARC processors are members of the SIMD SHARC family of digital signal processors (DSPs) that feature Analog Devices, Inc., Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.By integrating a rich set of industry-leading system peripherals and memory (see Table 1 in the data sheet), the SHARC+ processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.APPLICATIONS Automotive: audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADAS Consumer & Professional Audio: speakers, sound bars, AVRs, conferencing systems, mixing consoles, microphone arrays, headphones

The ADAU1452 /?ADAU1451?/?ADAU1450 are automotive qualified audio processors that far exceed the digital signal processing capabilities of earlier SigmaDSP? devices. The restructured hardware architecture is optimized for efficient audio processing. The audio processing algorithms are realized in sample-by-sample and block-by-block paradigms that can both be executed simultaneously in a signal processing flow created using the graphical programming tool, SigmaStudio?. The restructured digital signal processor (DSP) core architecture enables some types of audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency.The 1.2 V, 32-bit DSP core can run at frequencies of up to 294.912 MHz and execute up to 6144 instructions per sample at the standard sample rate of 48 kHz. However, in addition to industry-standard rates, a wide range of sample rates are available. The integer PLL and flexible clock generator hardware can generate up to 15 audio sample rates simultaneously. These clock generators, along with the on-board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1452 / ADAU1451 / ADAU1450 ideal audio hubs that greatly simplify the design of complex multirate audio systems.The ADAU1452 / ADAU1451 / ADAU1450 interface with a wide range of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), digital audio devices, amplifiers, and control circuitry, due to their highly configurable serial ports, S/PDIF interfaces (on the ADAU1452 and ADAU1451), and multipurpose input/output pins. The devices can also directly interface with pulse density modulation (PDM) output microelectromechanical (MEMS) microphones, due to integrated decimation filters specifically designed for that purpose.Independent slave and master I2C/serial peripheral interface (SPI) control ports allow the ADAU1452 / ADAU1451 / ADAU1450 not only to be programmed and configured by an external master device, but also to act as masters that can program and configure external slave devices directly. This flexibility, combined with self boot functionality, enables the design of standalone systems that do not require any external input to operate.The power efficient DSP core executes full programs, consumes only a few hundred milliwatts (mW) of power, and can run at a maximum program load while consuming less than a watt, even in worst case temperatures exceeding 100?C. This relatively low power consumption and small footprint make the ADAU1452 / ADAU1451 / ADAU1450 ideal replacements for large, general-purpose DSPs that consume more power at the same processing load.Differences between the ADAU1452, ADAU1451, and ADAU1450The five variants of this device are differentiated by memory, DSP core frequency, availability of S/PDIF interfaces, ASRC configuration, and temperature range.Because the ADAU1450 does not contain an S/PDIF receiver or transmitter, the SPDIFIN and SPDIFOUT pins are nonfunctional. Additionally, the settings of any registers related to the S/PDIF input or output in the ADAU1450 do not have any effect on the operation of the device.Because the ADAU1450 does not contain ASRCs, the settings of any registers related to the ASRCs in the ADAU1450 do not have any effect on the operation of the device.APPLICATIONS Automotive audio processing Head units Navigation systems Rear seat entertainment systems DSP amplifiers (sound system amplifiers) Commercial and professional audio processing Consumer audio processing

The ADAU7002 converts a stereo PDM bit stream into a PCMoutput. The source for the PDM data can be two microphonesor other PDM sources. The PCM audio data is output on aserial audio interface port in either I2S or TDM format.The ADAU7002 is specified over the commercial temperaturerange (?40?C to +85?C). It is available in a halide-free, 8-ball,1.56 mm ? 0.76 mm, wafer level chip scale package (WLCSP).Applications Mobile computing Portable electronics Consumer electronics

IC ROBUST QUAD ISO 3:1 CH