Synchronous Buck-Boost High Power White LED Driver Features: High Efficiency: 90% Typical Over Entire Li-Ion Battery Range Wide VIN Range: 2.7V to 5.5V Up to 500mA Continuous Output Current Internal Soft-Start Open/Shorted LED Protection LED Current Matching Typically <2% Constant Frequency 1MHz Operation Low Shutdown Current: 6µA Overtemperature Protection Small Thermally Enhanced 16-Lead (4mm x 4mm) QFN Package

60V, 1.5A LED Driver with Internal Exponential Scale Dimming Features: Operates in Boost, SEPIC, Buck Mode and Buck-Boost Mode 128:1 Internal Exponential Scale PWM Dimming Wide Input Voltage Range (3V to 60V) 1.5A, 60V Internal Switch 20000:1 External PWM Dimming at 100Hz ±2% LED Current and Output Voltage Regulation PMOS Switch Driver for PWM Dimming LED Short/Open Protection and Indication Constant Voltage and Constant Current Regulation Adjustable 300kHz to 2MHz Switching Frequency Adjustable 100Hz to 1kHz PWM Generator Frequency Internal Spread Spectrum Frequency Modulation Easy Synchronization to External Clock Programmable VIN UVLO with Hysteresis Available in 16-Lead MSOP Package

IC Multidisplay LED Controller Features: Step-Up/Direct-Connect Fractional Charge Pump Provides Up to 92% Efficiency Up to 400mA Continuous Output Current Independent Current and Dimming Control for 1-6 LED MAIN, 1-4 LED SUB and RGB LED Displays LED Currents Programmable Using 2-Wire I2C™ Serial Interface 1% LED Current Matching Low Noise Constant Frequency Operation* Minimal Component Count Automatic Soft-Start Limits Inrush Current 16 Exponentially Spaced Dimming States Provides 128:1 Brightness Range for MAIN and SUB Displays Up to 4096 Color Combinations for RGB Display Low Operating Current: IVIN = 180µA Tiny, Low Profile 24-Lead (4mm × 4mm × 0.75mm) QFN Package

DISPLAY INTERFACE, 10BIT, 1.9V, LQFP-80; IC Interface Type:I2C; Interface Applications:LCD Monitors and Projectors, Plasma Display Panels, RGB Graphics Processing; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V; No. of Pins:80Pins RoHS Compliant: Yes

The LT3592 is a fixed frequency step-down DC/DC converter designed to operate as a constant-current source. An external sense resistor monitors the output current allowing accurate current regulation, ideal for driving high current LEDs. The output current can be dimmed by a factor of 10 using an external signal for nighttime brake lights. The high switching frequency offers several advantages by permitting the use of a small inductor and small ceramic capacitors. Small components combined with the LT3592’s 10-pin DFN leadless surface mount package save space and cost versus alternative solutions. The constant switching frequency combined with low-impedance ceramic capacitors result in low, predictable output ripple. A wide input voltage range of 3.6V to 36V makes the LT3592 useful in a variety of applications. Current mode PWM architecture provides fast transient response and cycle-by-cycle current limiting. Thermal shutdown provides additional protection.Applications Automotive Signal Lighting Industrial Lighting Constant-Current, Constant Voltage Supplies

The AD9880 offers designers the flexibility of an analog interface and High-Definition Multimedia Interface (HDMI™) receiver integrated on a single chip. Also included is support for High bandwidth Digital Content Protection (HDCP).ANALOG INTERFACEThe AD9880 is a complete 8-bit 150 MSPS monolithic analog interface optimized for capturing Component Video (YPbPr) and RGB graphics signals. Its 150 MSPS encode rate capability and full power analog bandwidth of 300 MHz supports all HDTV formats (up to 1080p) and FPD resolutions up to SXGA (1280 × 1024 at 75 Hz).The analog interface includes a 150 MHz triple ADC with internal 1.25V reference, a Phase Locked Loop (PLL), and programmable gain, offset, and clamp control. The user provides only 1.8V and 3.3V power supply, analog input, and Hsync. Three-state CMOS outputs may be powered from 1.8V to 3.3V. The AD9880’s on-chip PLL generates a pixel clock from Hsync. Pixel clock output frequencies range from 12 MHz to 150 MHz. PLL clock jitter is typically less than 500 ps p-p at 150 MHz. The AD9880 also offers full sync processing for composite sync and Sync-on-Green (SOG) applications.DIGITAL INTERFACEThe AD9880 contains a HDMI v1.1 compatible receiver and supports all HDTV formats (up to 1080p) and display resolutions up to SXGA (1280 × 1024 at 75 Hz). The receiver features an intra-pair skew tolerance of up to one full clock cycle. With the inclusion of HDCP, displays may now receive encrypted video content. The AD9880 allows for authentication of a video receiver, decryption of encoded data at the receiver, and renewability of that authentication during transmission as specified by the HDCP v1.1 protocol.Fabricated in an advanced CMOS process, the AD9880 is provided in a space-saving 100-lead LQFP surface-mount Pb-free plastic package and is specified over the 0 ºC to 70 ºC temperature range.APPLICATIONS Advanced TV HDTV Projectors LCD Monitor

The AD9888 is a complete 8-bit, 170 MSPS, monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 170 MSPS encode rate capability and full-power analog bandwidth of 500 MHz supports resolutions of up to 1600 × 1200 (UXGA) at 75 Hz.For ease of design and to minimize cost, the AD9888 is a fully integrated interface solution for flat panel displays. The AD9888 includes an analog interface that has a 170 MHz triple ADC with an internal 1.25 V reference phase-locked loop (PLL) to generate a pixel clock from HSYNC and COAST; midscale clamping; and programmable gain, offset, and clamp controls. The user provides only a 3.3 V power supply, analog input, and HSYNC and COAST signals. Three-state CMOS outputs can be powered from 2.5 V to 3.3 V.The on-chip PLL of the AD9888 generates a pixel clock from the HSYNC and COAST inputs. Pixel clock output frequencies range from 10 MHz to 170 MHz. PLL clock jitter is typically less than 450 ps p-p at 170 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of HSYNC. A sampling phase adjustment is provided. Data, HSYNC, and clock output phase relationships are maintained. The PLL can be disabled, and an external clock input can be provided as the pixel clock. The AD9888 also offers full sync processing for composite sync and sync-on-green applications.A CLAMP signal is generated internally or can be provided by the user through the CLAMP input pin. This device is fully programmable via a 2-wire serial port.Fabricated in an advanced CMOS process, the AD9888 is provided in a space-saving, 128-lead, MQFP, surface-mount, plastic package and is specified over the 0°C to 70°C temperature range. The AD9888 is also available in a Pb-free package. APPLICATIONS RGB Graphics Processing LCD Monitors and Projectors Plasma Display Panels Scan Converters Microdisplays Digital TV

The AD9887A offers an analog interface receiver and a digital visual interface (DVI) receiver integrated on a single chip, supports high bandwidth digital content protection (HDCP), and is software and pin-to-pin compatible with the AD9887.ANALOG INTERFACEThe complete 8-bit, 170 MSPS, monolithic analog interface is optimized for capturing RGB graphics signals from personal computers and workstations. Its 170 MSPS encode rate capability and full-power analog bandwidth of 330 MHz support resolutions of up to 1600 × 1200 (UXGA) at 60 Hz. The interface includes a 170 MHz triple ADC with internal 1.25 V reference; a phase-locked loop (PLL); and programmable gain, offset, and clamp controls. The user provides only a 3.3 V power supply, analog input, and Hsync. Three-state CMOS outputs can be powered from 2.5 V to 3.3 V. The analog interface also offers full sync processing for composite sync and sync-on-green (SOG) applications. The AD9887A on-chip PLL generates a pixel clock from Hsync with output frequencies ranging from 12 MHz to 170 MHz. PLL clock jitter is typically 500 ps p-p at 170 MSPS. DIGITAL INTERFACEThe AD9887A contains a DVI 1.0-compatible receiver and supports resolutions up to 1600 × 1200 (UXGA) at 60 Hz. The receiver operates with true color (24-bit) panels in one or two pixel(s) per clock mode and features an intrapair skew tolerance of up to one full clock cycle. With the inclusion of HDCP, displays can receive encrypted video content. The AD9887A allows for authentication of a video receiver, decryption of encoded data at the receiver, and renewability of authentication during transmission, as specified by the HDCP v1.0 protocol. Fabricated in an advanced CMOS process, the AD9887A is provided in a 160-lead, surface-mount, plastic MQFP and is specified over the 0°C to 70°C temperature range. The AD9887A is also available in an RoHS compliant package.APPLICATIONS RGB graphics processing LCD monitors and projectors Plasma display panels Scan converters Microdisplays Digital TVs

AD9882 - Dual Interface For Flat Panel Displays

TPS61160A White LED Driver with PWM Brightness Control in 2mm x 2mm Package. Up to 10 LEDs in Series