HBT Vector Modulator SMT, 700 - 1000 MHz Features: Continuous Phase Control: 360° Continuous Gain Control: 40 dB Low Output Noise Floor: -162 dBm/Hz High Input IP3: +34 dBm 16 Lead 3×3mm SMT Package: 9mm2

LNA with Failsafe Bypass Mode SMT, 1700 - 2200 MHz Features: Noise Figure: 1.4 dB Output IP3: +29 dBm Gain: 17 dB Failsafe Operation: Bypass is enabled when LNA is unpowered Single Supply: +3V or +5V 16 Lead 3x3mm SMT Package: 9mm²

26 GHz, T Flip-Flop w/Reset Features: Supports Clock Frequencies up to 26 GHz Differential & Singe-Ended Operation Fast Rise and Fall Times: 18/17 ps Low Power Consumption: 270 mW typ. Propagation Delay: 95 ps Single Supply: -3.3V 16 Lead Ceramic 3×3mm SMT Package: 9mm2

Fractional-N PLL with Integrated VCO SMT, 1.31 - 5.66 GHz Features: Ultra Low Phase Noise -112 dBc/Hz in Band Typ. Figure of Merit (FOM) -230 dBc Integer <180 fs RMS Jitter  24-Bit Step Size, 3 Hz Resolution Typ.  Exact Frequency Mode Built in Digital Self Test  40 Lead 6x6mm SMT Package: 36mm²

High Voltage, Latch-Up Proof, 16-Channel Multiplexer Features: Latch-up proof 3.5 pF off source capacitance 64 pF off drain capacitance 0.35 pC typical charge injection ±0.02 nA on channel leakage Low on resistance: 155 typical ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation VSS to VDD analog signal range Human body model (HBM) ESD rating - 8 kV all other pins

Dual Channel, 16-Bit, 33 MUPS, Multispan, Multi-IO SPI DAC Features: 16-bit resolution 33 MUPS single channel rate in fast mode 22 MUPS single channel rate in precision mode 65 ns small signal settling time to 0.1% accuracy 100ns large signal settling time to 0.1% accuracy Ultra small glitch: < 50 pV×s Ultra low latency: 5 ns THD: −105 dB at 1 kHz Highly configurable output voltage span and offset 1.2 V and 1.8 V logic level compatible Single (classic), dual, and quad SPI modes Multiple error detectors, both analog and digital domains 2.5 V internal voltage reference, 10 ppm/°C maximum temperature coefficient 5 mm × 5 mm LFCSP

18-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs Features: Easy Drive Greatly reduced input kickback Input current reduced to 0.5 μA/MSPS Enhanced acquisition phase, ≥79% of cycle time at 1 MSPS First conversion accurate, no latency or pipeline delay Input span compression for single-supply operation Fast conversion allows low SPI clock rates Input overvoltage clamp protection sinks up to 50 mA SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface High performance Pseudo differential analog input range 0 V to VREF with VREF from 2.4 V to 5.1 V Throughput: 2 MSPS/1 MSPS/500 kSPS options INL: ±3.2 LSB maximum Guaranteed 18-bit, no missing codes SNR: 95 dB at fIN = 1 kHz at VREF = 5 V THD: −125 dB at fIN = 1 kHz, −108 dB at fIN = 100 kHz SINAD: 84.5 dB at fIN = 1 MHz (see Figure 17 in data sheet) Oversampled dynamic range 98 dB for OSR = 2 125 dB for OSR = 1024 Low power Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface 2.5 mW at 500 kSPS (VDD only) 70 μW at 10 kSPS, 14 mW at 2 MSPS (total power) 10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP Pin compatible with AD4003/AD4007/AD4011 family Guaranteed operation: −40°C to +125°C

Single Supply, 24-Bit, Sigma-Delta ADC with 10 V and 0 mA to 20 mA Inputs Features: Internal or external clock Tested for robustness per: IEC61000-4-2, IEC61000-4-3, IEC61000-4-4, IEC61000-4-5, IEC61000-4-6, CISPR 11 24-bit ADC with integrated analog front end Fast and flexible output rate: 1.25 SPS to 31.25 kSPS Channel scan data rate of 6.21 kSPS per channel (161 μs settling) 16 noise free bits at 1 kSPS per channel 85 dB rejection of 50 Hz and 60 Hz at 20 SPS per channel ±10 V inputs, 4 differential or 8 single-ended Pin absolute maximum rating ±50 V Absolute input pin voltage up to ±20 V ≥1 MΩ impedance ±0.06% accuracy at 25°C 0 mA to 20 mA inputs, 4 single-ended Pin absolute maximum rating ±50 mA Input range from −0.5 mA to +24 mA 60 Ω impedance ±0.08% accuracy at 25°C On-chip 2.5 V reference ±0.12% accuracy at 25°C, ±5 ppm/°C (typical) drift Power supplies AVDD = 3.0 V to 5.5 V IOVDD = 2 V to 5.5 V Total IDD = 3.9 mA Temperature range: −40°C to +105°C 3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK) SPI, QSPI, MICROWIRE, and DSP compatible

2.5 V to 5.5 V, 250 A, 2-Wire Interface, Dual Voltage Output,12-Bit DACs Features: AD5337: 2 buffered 8-bit DACs in 8-lead MSOP AD5338, AD5338-1: 2 buffered 10-bit DACs in 8-lead MSOP AD5339: 2 buffered 12-bit DACs in 8-lead MSOP Low power operation: 250 μA @ 3 V, 300 μA @ 5 V 2-wire (I2C-compatible) serial interface 2.5 V to 5.5 V power supply Guaranteed monotonic by design over all codes See datasheet for additional features

16-Channel, 16-Bit, Serial Input, Voltage-Output DAC Features: 16-channel DAC in 52-lead LQFP package Guaranteed monotonic to 16/14 bits Nominal output voltage range of −10 V to +10 V Multiple output spans available Temperature monitoring function Channel monitoring multiplexer Digital reset (RESET) See Data Sheet for Additional Information