The AD9229 is a 50 or 65 MSPS quad 12-bit, analog–to–digital converter with serial LVDS outputs. An on–chip track–and–hold circuit is designed for low cost, low power, small size and ease of use. The product operates up to a 65 MSPS conversion rate and is optimized for outstanding dynamic performance where a small package size is critical.The ADC requires a single +3 V power supply. No external reference or driver components are required for many applications. A separate output power supply pin supports LVDS compatible serial digital output levels.The ADC automatically multiplies up the sample rate clock for the appropriate LVDS serial data rate. This data clock output (DCO) provides operation up to 390 MHz and supports double-data rate operation (DDR). An MSB trigger or Frame clock is also provided to signal a new output byte. Power down is supported, and the ADC consumes 3 mW when enabled.Fabricated on an advanced CMOS process, the AD9229 is available in a 48-pin chip scale 7 mm x 7 mm package (48-LFCSP) specified over the industrial temperature range (–40°C to +85°C).ApplicationsDigital beam forming systems for ultrasound Wireless and wired broadband communications Communication test equipment

The AD9283 is an 8-bit monolithic sampling analog-to-digital converter with an on-chip track-and-hold circuit and is optimized for low cost, low power, small size, and ease of use. The product operates at a 100 MSPS conversion rate, with outstanding dynamic performance over its full operating range.The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power supply and an encode clock for full performance operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS-compatible and a separate output power supply pin supports interfacing with 3.3 V or 2.5 V logic.The encoder input is TTL/CMOS-compatible. A power down function may be exercised to bring total consumption to 4.2 mW. In power down mode, the digital outputs are driven to a high impedance state.Fabricated on an advanced CMOS process, the AD9283 is available in a 20-lead surface mount plastic package (SSOP) specified over the industrial temperature range (-40°C to +85°C).

The AD9776A/AD9778A/AD9779A are dual, 12-/14-/16-bit, high dynamic range digital-to-analog converters (DACs) that provide a sample rate of 1 GSPS, permitting a multicarrier generation up to the Nyquist frequency. They include features optimized for direct conversion transmission applications, including complex digital modulation and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators such as the ADL537x FMOD series from Analog Devices, Inc. A 3-wire interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 10 mA to 30 mA. The devices are manufactured on an advanced 0.18 μm CMOS process and operate on 1.8 V and 3.3 V supplies for a total power consumption of 1.0 W. They are enclosed in a 100-lead thin quad flat package (TQFP).Product Highlights Ultralow noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies. A proprietary DAC output switching technique enhances dynamic performance. The current outputs are easily configured for various single-ended or differential circuit topologies. CMOS data input interface with adjustable setup and hold. Novel 2×, 4×, and 8× interpolator/coarse complex modulator allows carrier placement anywhere in DAC bandwidth.Applications Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMax, GSM, LTE Digital high or low IF synthesis Internal digital upconversion capability Transmit diversity Wideband communications: LMDS/MMDS, point-to-point

The AD9911 is a complete direct digital synthesizer (DDS).This device includes a high speed DAC with excellent widebandand narrowband spurious-free dynamic range (SFDR) as well asthree auxiliary DDS cores without assigned digital-to-analogconverters (DACs). These auxiliary channels are used for spurreduction, multitone generation, or test-tone modulation.The AD9911 is the first DDS to incorporate SpurKillertechnology and multitone generation capability. Multitonemode enables the generation up to four concurrent carriers;frequency, phase and amplitude can be independentlyprogrammed. Multitone generation can be used for systemtests, such as inter-modulation distortion and receiver blockersensitivity. SpurKilling enables customers to improve SFDRperformance by reducing the magnitude of harmoniccomponents and/or the aliases of those harmonic components.Test-tone modulation efficiently enables sine wave modulationof amplitude on the output signal using one of the auxiliaryDDS cores.The AD9911 can perform modulation of frequency, phase, oramplitude (FSK, PSK, ASK). Modulation is implemented bystoring profiles in the register bank and applying data to theprofile pins. In addition, the AD9911 supports linear sweep offrequency, phase, or amplitude for applications such as radarand instrumentation.The DDS acts as a high resolution frequency divider with theREF_CLK as the input and the DAC providing the output. TheREF_CLK input can be driven directly or used in combinationwith an integrated REF_CLK multiplier (PLL). The REF_CLKinput also features an oscillator circuit to support an externalcrystal as the REF_CLK source. The crystal can be used incombination with the REF_CLK multiplier.The AD9911 I/O port offers multiple configurations to providesignificant flexibility. The I/O port offers an SPI-compatiblemode of operation that is virtually identical to the SPI operationfound in earlier Analog Devices DDS products.Flexibility is provided by four data pins (Pin SDIO_0,Pin SDIO_1, Pin SDIO_2, and Pin SDIO_3) that allow fourprogrammable modes of I/O operation.The DAC output is supply referenced and must be terminatedinto AVDD by a resistor and an AVDD center-tapped transformer.The DAC has its own programmable reference to enabledifferent full-scale currents.The DDS core (the AVDD pins and the DVDD pins) is poweredby a 1.8 V supply. The digital I/O interface (SPI) operates at3.3 V and requires that the Pin DVDD_I/O (Pin 49) beconnected to 3.3 V. Applications Agile local oscillator Test and measurement equipment Commercial and amateur radio exciter Radar and sonar Test-tone generation Fast frequency hopping Clock generation

The AD9954 is a direct digital synthesizer (DDS) that uses advanced technology, coupled with an internal high speed, high performance DAC to form a complete, digitally programmable, high frequency synthesizer capable of generating a frequency-agile analog output sinusoidal waveform at up to 160 MHz. The AD9954 enables fast frequency hopping coupled with fine tuning of both frequency (0.01 Hz or better) and phase (0.022° granularity).The AD9954 is programmed via a high speed serial I/O port. The device includes static RAM to support flexible frequency sweep capability in several modes, plus a user-defined linear sweep mode of operation. Also included is an on-chip high speed comparator for applications requiring a square wave output. An on-chip oscillator and PLL circuitry provide users with multiple approaches to generate the device’s system clock.The AD9954 is specified to operate over the extended industrial temperature range.Applications Agile LO frequency synthesis Programmable clock generators FM chirp source for radar and scanning systems Automotive radars Test and measurement equipment Acousto-optic device drivers

The AD9957 functions as a universal I/Q modulator and agileupconverter for communications systems where cost, size, powerconsumption, and dynamic performance are critical. TheAD9957 integrates a high speed, direct digital synthesizer(DDS), a high performance, high speed, 14-bit digital-to-analogconverter (DAC), clock multiplier circuitry, digital filters, andother DSP functions onto a single chip. It provides basebandupconversion for data transmission in a wired or wirelesscommunications system.The AD9957 is the third offering in a family of quadraturedigital upconverters (QDUCs) that includes the AD9857 andAD9856. It offers performance gains in operating speed, powerconsumption, and spectral performance. Unlike its predecessors,it supports a 16-bit serial input mode for I/Q baseband data.The device can alternatively be programmed to operate either asa single tone, sinusoidal source or as an interpolating DAC.The reference clock input circuitry includes a crystal oscillator,a high speed, divide-by-two input, and a low noise PLL formultiplication of the reference clock frequency.The user interface to the control functions includes a serial porteasily configured to interface to the SPORT of the Blackfin®DSP and profile pins to enable fast and easy shift keying of anysignal parameter (phase, frequency, or amplitude).Applications HFC data, telephony, and video modems Wireless base station transmissions Broadband communications transmissions Internet telephony

The ADCMP604 / ADCMP605 are very fast comparators fabricated on the Analog Devices, Inc. proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE − 0.5 V to VCCI + 0.2 V, low noise, LVDS-compatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shut-down inputs.The devices offer 1.5 ns propagation delays with 1 ps rms random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps.A flexible power supply scheme allows the devices to operate with a single 2.5 V positive supply and a −0.5 V to +2.7 V input signal range up to a 5.5 V positive supply with a −0.5 V to +5.7 V input signal range. Split input/output supplies, with no sequencing restrictions on the ADCMP605, support a wide input signal range with greatly reduced power consumption.The LVDS-compatible output stage is designed to drive any standard LVDS input. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option.The ADCMP604 is available in a 6-lead SC70 package, and the ADCMP605 is available in a 12-lead LFCSP.APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE)

The ADF4154 is a fractional-N frequency synthesizer that implements local oscillators in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registersdefine an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A key feature of the ADF4154 is the fast-lock mode with a builtintimer. The user can program a predetermined count-down time value so that the PLL will remain in wide bandwidth mode, instead of having to control this time externally.Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V, and can be powered down when not in use.

The SSM2305 is a fully integrated, high efficiency, Class-Daudio amplifier designed to maximize performance for mobilephone applications. The application circuit requires a minimumof external components and operates from a single 2.5 V to 5.5 Vsupply. It is capable of delivering 2.2 W of continuous outputpower with less than 1% THD + N driving a 4 Ω load from a5.0 V supply. It has built-in thermal shutdown and output short-circuitprotection.The SSM2305 features a high efficiency, low noise modulationscheme that does not require external LC output filters. The modulationprovides high efficiency even at low output power. TheSSM2305 operates with 90% efficiency at 1.3 W into 8 Ω or 83%efficiency at 2.2 W into 4 Ω from a 5.0 V supply and has an SNR of>98 dB. Spread-spectrum pulse density modulation is used toprovide lower EMI-radiated emissions compared with otherClass-D architectures.The SSM2305 has a micropower shutdown mode with a maximumshutdown current of 30 nA. Shutdown is enabled by applyinga Logic 0 to the SD pin. The device also includes pop-and-clicksuppression circuitry. This minimizes voltage glitches at theoutput during turn-on and turn-off, thus reducing audible noiseon activation and deactivation.The fully differential input of the SSM2305 provides excellentrejection of common-mode noise on the input. Input couplingcapacitors can be omitted if the dc input common-mode voltageis approximately VDD/2.The SSM2305 has excellent rejection of power supply noise,including noise caused by GSM transmission bursts and RFrectification. PSRR is typically 60 dB at 217 Hz.The default gain of the SSM2305 is 18 dB, but users can reduce thegain by using a pair of external resistors.The SSM2305 is specified over the commercial temperature range(−40°C to +85°C). It is available in both an 8-lead, 3 mm × 3 mmlead frame chip scale package (LFCSP) and an 8-lead mini smalloutline package (MSOP). Applications Mobile phones MP3 players Portable gaming Portable electronics Educational toys

The SSM2317 is a fully integrated, high efficiency, Class-D audioamplifier. It is designed to maximize performance for mobilephone applications. The application circuit requires a minimumof external components and operates from a single 2.5 V to 5.5 Vsupply. It is capable of delivering 3 W of continuous outputpower with 93 dB. Spread-spectrum pulse density modulation is used toprovide lower EMI radiated emissions compared with otherClass-D architectures.Automatic level control (ALC) can be activated to suppressclipping and improve dynamic range. This feature only requiresone external resistor tied to GND via the VTH pin and anactivation voltage on the ALC_EN pin.The SSM2317 has a micropower shutdown mode with a typicalshutdown current of 20 nA. Shutdown is enabled by applyinga logic low to the SD pin.The device also includes pop-and-click suppression circuitry. Thisminimizes voltage glitches at the output during turn-on and turn-off,reducing audible noise on activation and deactivation.The default gain of the SSM2317 is 18 dB, but users can reduce thegain by using a pair of external resistors.The SSM2317 is specified over the commercial temperature rangeof −40°C to +85°C. It has built-in thermal shutdown and outputshort-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mmwafer level chip scale package (WLCSP).Applications Mobile phones MP3 players Portable gaming Portable electronics Educational toys