High Voltage, Latch-Up Proof, 8-Channel Differential Multiplexer Features: Latch-up proof 3.5 pF off source capacitance 33 pF off drain capacitance 0.35 pC typical charge injection ±0.02 nA on channel leakage Low on resistance: 155 typical ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation VSS to VDD analog signal range Human body model (HBM) ESD rating - 8 kV I/O port to supplies

Fault Protection, 6 RON, SPST Switch with 0.6 k Feedback Channel Features: Analog output protection and detection solution Overvoltage protection up to 60 V on S and SFB pins Power off protection up to 60 V on S and SFB pins Integrated 0.6 k secondary feedback channel Known output under all conditions User enabled, power-on condition pulls source to 0 V Known state without digital inputs present Latch-up immune Optimized resistance for measurement channel and feedback channel Low on resistance of 6 typical on signal channel Ultraflat, on resistance on signal channel 3 mm 2 mm LFCS VSS to VDD 2 V signal range Fully specified at ±15 V, ±20 V, +12 V, and +36 V ±5 V to ±22 V dual supply operation 8 V to 44 V single-supply operation

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC Features:Flexible reconfigurable common platform design 4 DACs and 2 ADCs (4D2A) and 2D2A options Supports single, dual, and quad band Datapaths and DSP blocks are fully bypassableDAC to ADC sample rate ratios of 1, 2, 3, and 4 On-chip PLL with multichip synchronization External RFCLK input option for off-chip PLL Maximum DAC sample rate up to 12 GSPS Maximum data rate up to 12 GSPS using JESD204C Useable analog bandwidth to 8 GHz Maximum ADC sample rate up to 6 GSPS Maximum data rate up to 6 GSPS using JESD204C Useable analog bandwidth to 8 GHz ADC ac performance at 6 GSPS, input at 2.7 GHz, 1 dBFS Full-scale input voltage: 1.475 V p-p Noise density: 147.5 dBFS/Hz Noise figure: 25.3 dB HD2: 72 dBFS HD3: 68 dBFS Worst other (excluding HD2 and HD3): 78 dBFS DAC ac performance at 12 GSPS, output at 2.6 GHz Full-scale output current range: 6.43 mA to 37.75 mA Two-tone IMD3 (6 dBFS per tone): 72 dBc NSD, single-tone: 160 dBc/Hz SFDR, single-tone: 75 dBc Versatile digital features Selectable interpolation and decimation filters Configurable DDC and DUC 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs 48-bit NCO per DUC or DDC Option to bypass fine and coarse DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Programable delay per data path Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Fine DUC channel gain control and delay adjust Coarse DDC delay adjust for DPD observation path Auxiliary features Fast frequency hopping Direct digital synthesis (DDS) Low latency loopback modes (receive datapath data can be routed to the transmit datapaths) ADC clock driver with selectable divide ratios Power amplifier downstream protection circuitry On-chip temperature monitoring unit Flexible GPIO pins TDD power savings option SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes JESD204B/C transmitter (JT×) and 8 lanes JESD204B/C receiver (JR×) JESD204B compliance with the maximum 15.5 Gbps JESD204C compliance with the maximum 24.75 Gbps Supports real or complex digital data (8-, 12-, 16-, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

8-Bit, 1 GSPS, JESD204B, Quad Analog-to-Digital Converter Features:JESD204B (Subclass 1 and Subclass 0) coded serial digital outputs Lane rates up to 15 Gbps 1.6 W total power at 1 GSPS 400 mW per ADC channel SFDR: 71 dBFS at 611 MHz (1.44 V p-p input range) SNR: 48.6 dBFS at 611 MHz (1.44 V p-p input range) SINAD: 48.5 dBFS at 611 MHz (1.44 V p-p input range) 0.9 V, 1.8 V, and 2.5 V dc supply operation No missing codes Internal ADC voltage reference Analog input buffer On-chip dithering to improve small signal linearityFlexible differential input range 1.44 V p-p to 2.16 V p-p (1.44 V p-p default) 1.4 GHz analog input full power bandwidth Fast detect bits for efficient AGC implementation Differential clock input Integer clock divide by 1, 2, 4, or 8 On-chip temperature diode Flexible JESD204B lane configurations

40A DC/DC Module Regulator Features: Stacked Inductor Acts as Heat Sink Wide Input Voltage Range: 4.7V to 15V 0.6V to 3.3V Output Voltage Range ±1.3% Total DC Output Voltage Error Over Line, Load and Temperature (–40°C to 125°C) Differential Remote Sense Amplifier for Precision Regulation Current Mode Control/Fast Transient Response Frequency Synchronization Parallel Current Sharing (Up to 240A) Internal or External Compensation 88% Efficiency (12VIN, 1VOUT) at 40A Overcurrent Foldback Protection 16mm × 16mm × 7.07mm BGA Package

Dual 25A or Single 50A Module Regulator with 0.8% DC and 3% Transient Accuracy Features:±0.8% Maximum Total DC Output Error Over Line and Load (LTM4650-1A)±3% Transient Output Error with Minimum Output CapacitanceDual 25A or Single 50A Output4.5V to 15V Input, 0.6V to 1.8V Output Voltage RangeDifferential Remote Sense AmplifierCurrent Mode Control/Fast Transient ResponseCurrent Sharing Up to 300A16mm × 16mm × 5.01mm BGA Package

42V, Low IQ, Quad Output Triple Monolithic Buck Converter and Boost Controller Features: Flexible Power Supply System Capable of Four Regulated Outputs with VBATT << VOUT Two High Voltage Synchronous Buck Regulators 3V to 42V Input Voltage Range Output Currents Up to 2.5A and 1.5A One Low Voltage Synchronous Buck Regulator 2.6V to 5.5V Input Voltage Range Output Currents Up to 1.8A One Boost Controller Allows Buck Converters to Regulate with VBATT << VOUT Selectable Burst Mode® Operation Allows Low 28µA IQ with High Voltage Channels Active Programmable Power-On Reset Individual Channel Power Good Indicators Step-Down Switching Frequency: 250kHz to 2.2MHz Available in 40-Lead QFN (6mm × 6mm) Package AEC-Q100 Qualified for Automotive Applications

Dual 10GHz GBW, 1.1nV/Hz Differential Amplifier/ADC Driver Features: 10GHz Gain-Bandwidth Product 85dB SFDR at 100MHz, 2VP-P 1.1nV/√Hz Input Noise Density Channel Separation 95dB at 100MHz Input Range Includes Ground External Resistors Set Gain (Min 1V/V) 3300V/μs Differential Slew Rate 52mA Supply Current (Per Amplifier) 2.7V to 5.25V Supply Voltage Range Fully Differential Input and Output Adjustable Output Common Mode Voltage Low Power Shutdown Small 20-Lead 4mm × 3mm × 0.75mm LQFN Package

Dual 25A or Single 50A Module Regulator with 0.8% DC and 3% Transient Accuracy Features:±0.8% Maximum Total DC Output Error Over Line and Load (LTM4650-1A)±3% Transient Output Error with Minimum Output CapacitanceDual 25A or Single 50A Output4.5V to 15V Input, 0.6V to 1.8V Output Voltage RangeDifferential Remote Sense AmplifierCurrent Mode Control/Fast Transient ResponseCurrent Sharing Up to 300A16mm × 16mm × 5.01mm BGA Package

Doubler Charge Pumps with Low Noise Linear Regulator Features: Low Output Noise: 60µVRMS (100kHz BW) Adjustable or Fixed Boosted Output Adjustable Output Voltage Range: 2.5V to 5.5V Fixed Output Voltages: 3.3V, 5V Wide Input Voltage Range: 1.8V to 4.4V Uses Small Ceramic Capacitors No Inductors Required Output Current up to 50mA 550kHz Switching Frequency Low Operating Current: 150µA Low Shutdown Current: 1µA Internal Thermal Shutdown and Current Limiting Available in 8-Pin MSOP and SO Packages