The ADM2xxE is a family of robust RS-232 and V.28 interface devices which operates from a single +5 V power supply. These products are suitable for operation in harsh electrical environments and are compliant with the EU directive on EMC (89/336/ EEC). Both the level of emissions and immunity are in compliance. EM immunity includes ESD protection in excess of ±15 kV on all I-O lines (1000-4-2), Fast Transient Burst protection (1000-4-4) and Radiated Immunity (1000-4-3). EM emissions include radiated and conducted emissions as required by Information Technology Equipment EN55022, CISPR22.All devices fully conform to the EIA-232E and CCITT V.28 specifications and operate at data rates up to 230 kbps. Shutdown and Enable control pins are provided on some of the products. The shutdown function on the ADM211E disables the charge pump and all transmitters and receivers. On the ADM213E the charge pump, all transmitters, and three of the five receivers are disabled. The remaining two receivers remain active thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral device begins communication. The active receivers can alert the processor which can then take the ADM213E out of the shutdown mode. Operating from a single +5 V supply, four external 0.1 µF capacitors are required. The ADM206E is available in a 24-pin SO package. The ADM207E and ADM208E are available in 24-pin DIP, SO, SSOP and TSSOP packages. The ADM211E and ADM213E are available in 28-pin SO, SSOP and TSSOP packages. All products are backward compatible with earlier ADM2xx products facilitating easy upgrading of older designs.APPLICATIONS Laptop computers Notebook computers Printers Peripherals Modems 

The ADM213E is one in a family of robust RS-232 and V.28 interface devices which operates from a single +5 V power supply. These products are suitable for operation in harsh electrical environments and are compliant with the EU directive on EMC (89/336/ EEC). Both the level of emissions and immunity are in compliance. EM immunity includes ESD protection in excess of ±15 kV on all I-O lines (1000-4-2), Fast Transient Burst protection (1000-4-4) and Radiated Immunity (1000-4-3). EM emissions include radiated and conducted emissions as required by Information Technology Equipment EN55022, CISPR22.All devices fully conform to the EIA-232E and CCITT V.28 specifications and operate at data rates up to 230 kbps. Shutdown and Enable control pins are provided on some of the products. The shutdown function on the ADM211E disables the charge pump and all transmitters and receivers. On the ADM213E the charge pump, all transmitters, and three of the five receivers are disabled. The remaining two receivers remain active thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral device begins communication. The active receivers can alert the processor which can then take the ADM213E out of the shutdown mode. Operating from a single +5 V supply, four external 0.1 µF capacitors are required. The ADM206E is available in a 24-pin SO package. The ADM207E and ADM208E are available in 24-pin DIP, SO, SSOP and TSSOP packages. The ADM211E and ADM213E are available in 28-pin SO, SSOP and TSSOP packages. All products are backward compatible with earlier ADM2xx products facilitating easy upgrading of older designs.APPLICATIONS Laptop computers Notebook computers Printers Peripherals Modems

The ADM2xx family of line drivers/receivers is intended for all EIA-232-E and V.28 communications interfaces, especially in applications where ±12 V is not available. The ADM223, ADM230L, ADM235L, ADM236L and ADM241L feature a low power shutdown mode that reduces power dissipation toless than 5 µW, making them ideally suited for battery powered equipment. Two receivers remain enabled during shutdown on the ADM223. The ADM233L and ADM235L do not require any external components and are particularly useful in applications where printed circuit board space is critical.All members of the ADM230L family, except the ADM231L and the ADM239L, include two internal charge pump voltage converters that allow operation from a single +5 V supply. These converters convert the +5 V input power to the ±10 V required for RS-232 output levels. The ADM231L and ADM239L are designed to operate from +5 V and +12 V supplies.An internal +12 V to −12 V charge pump voltage converter generates the −12 V supply. The ADM2xxL is an enhanced upgrade for the AD2xx family featuring lower power consumption, faster slew rate and operation with smaller (1 µF) capacitors.

The ADM4850 / ADM4851 / ADM4852 / ADM4853 / ADM4854 /ADM4855 / ADM4856 / ADM4857 are differential line transceiverssuitable for high speed, half-duplex and full duplex data communication on multipoint bus transmission lines. Theyare designed for balanced data transmission and comply with EIA Standards RS-485 and RS-422. The ADM4850 / ADM4851 / ADM4852 / ADM4853 are half-duplex transceivers that sharedifferential lines and have separate enable inputs for the driver and receiver. The full duplex ADM4854 / ADM4855 / ADM4856 / ADM4857 transceivers have dedicated differential line driveroutputs and receiver inputs.The devices have a 1/8-unit load receiver input impedance, which allows up to 256 transceivers on one bus. Because only onedriver must be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which ensures a logic high output level when the inputs are open or shorted.This guarantees that the receiver outputs are in a known state before communication begins and when communication ends.The driver outputs are slew rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses.Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit.The devices are fully specified over the commercial and industrial temperature ranges and are available in 8-lead SOIC (ADM4850through ADM4857), 8-lead LFCSP (ADM4850 / ADM4852 / ADM4853), and 8-lead MSOP (ADM4850 only) packages.Applications Low power RS-485 applications EMI sensitive systems DTE to DCE interfaces Industrial control Packet switching Local area networks Level translators

The ADM4850 / ADM4851 / ADM4852 / ADM4853 / ADM4854 /ADM4855 / ADM4856 / ADM4857 are differential line transceiverssuitable for high speed, half-duplex and full duplex data communication on multipoint bus transmission lines. Theyare designed for balanced data transmission and comply with EIA Standards RS-485 and RS-422. The ADM4850 / ADM4851 / ADM4852 / ADM4853 are half-duplex transceivers that sharedifferential lines and have separate enable inputs for the driver and receiver. The full duplex ADM4854 / ADM4855 / ADM4856 / ADM4857 transceivers have dedicated differential line driveroutputs and receiver inputs.The devices have a 1/8-unit load receiver input impedance, which allows up to 256 transceivers on one bus. Because only onedriver must be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which ensures a logic high output level when the inputs are open or shorted.This guarantees that the receiver outputs are in a known state before communication begins and when communication ends.The driver outputs are slew rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses.Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit.The devices are fully specified over the commercial and industrial temperature ranges and are available in 8-lead SOIC (ADM4850through ADM4857), 8-lead LFCSP (ADM4850 / ADM4852 / ADM4853), and 8-lead MSOP (ADM4850 only) packages.Applications Low power RS-485 applications EMI sensitive systems DTE to DCE interfaces Industrial control Packet switching Local area networks Level translators

The ADM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with both EIA Standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver may be enabled independently. When disabled, the outputs are tristated.The ADM485 operates from a single +5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if during fault conditions a significant temperature increase is detected in the internal driver circuitry.Up to 32 transceivers may be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and also when powered down. This minimizes the loading effect when the transceiver is not being utilized. The high impedance driver output is maintained over the entire common-mode voltage range form -7V to +12 V.The receiver contains a fail safe feature which results in a logic high output state if the inputs are unconnected (floating).The ADM485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against EDS; all diver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.The ADM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbits/s while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in an 8-pin DIL/SOIC packages.

The ADSP-21160M DSP is a SHARC processor that is optimized for applications such as telephony, medical imaging, radar/sonar electronics, communications, 3D graphics and imaging. The ADSP-21160M features a Single-Instruction-Multiple-Data (SIMD) architecture.Using two computational units (ALU, Barrel Shifter, MAC, Register files), the ADSP-21160M can have a five fold performance increase versus the ADSP-2106x on a range of DSP algorithms. It is code compatible with ADI's popular first generation ADSP-2106x SHARC DSPs. Like other SHARCs, the ADSP-21160M is a 32-bit processor that is optimized for high performance DSP applications. The ADSP-21160M includes an 80 MHz core for processing both 32-bit fixed-point and (32-bit, 40-bit) floating-point data types, a dual-ported 4 Mbit on-chip SRAM, an integrated I/O processor with multiprocessing support, and multiple internal busses to eliminate I/O bottlenecks.The ADSP-21160M is optimized for multiprocessing topologies; SHARC supports multiprocessing via link ports or an external port. In the diagram below, both cluster and link port multiprocessing is shown. Over the external port up to six 21160Ms may be connected together without any additional support logic. The arbitration for this shared bus is integrated on-chip. Each SHARC in the cluster has access to every SHARC's internal memory. Through the external port connection, optional external memory may be shared as well.The six link ports are another way to gluelessly connect a multiprocessing system. Both, the links and the cluster can be used simultaneously and systems with hundreds of SHARC DSPs can be developed using both peripherals.Maximize Speed, Minimize Size The ADSP-21160M is offered in a 27mm x 27mm 400-ball PBGA (Plastic Ball Grid Array) package 40% smaller than processors in this performance class.More Processing Per WattIn addition to small size and high performance, the 21160M's power dissipation enables new levels of MFLOPS per watt. The ADSP-21160M typical power dissipation is 2 watts, enabling 240 MFLOPS of performance per watt. This allows designers to use multiple processors on a PCI card within the PCI power limit of 25 watts. With eight 21160M DSPs, providing 480 MFLOPS each, a standard PCI card design can obtain 3.84 GFLOPS performance and leave 9 watts for other circuitry.The ADSP-21160M is supported by hundreds of readily available third-party hardware and software products and ADI's powerful VisualDSP++ development system, allowing for fast and easy development, debug and deployment.

The ADuC832 is a complete, smart transducer front end, integrating a high performance self-calibrating multichannel 12-bit ADC, dual 12-bit DACs, and programmable 8-bit MCU on a single chip.The device operates from a 32 kHz crystal with an on-chip PLL, generating a high frequency clock of 16.78 MHz. This clock is, in turn, routed through a programmable clock divider from which the MCU core clock operating frequency is generated. The microcontroller core is an 8052 and is therefore 8051 instruction set compatible with 12 core clock periods per machine cycle. 62 kB of nonvolatile Flash/EE program memory are provided on chip. There are also 4 kB of nonvolatile Flash/EE data memory, 256 bytes of RAM, and 2 kB of extended RAM integrated on chip.The ADuC832 also incorporates additional analog functionality with two 12-bit DACs, a power supply monitor, and a band gap reference. On-chip digital peripherals include two 16-bit Σ-Δ DACs, a dual-output 16-bit PWM, a watchdog timer, timeinterval counter, three timers/counters, Timer 3 for baud rate generation, and serial I/O ports (SPI, I2C®, and UART).Applications Optical networking—laser power control Base station systems Precision instrumentation, smart sensors Transient capture systems DAS and communications systems Upgrade to ADuC812 systems; runs from 32 kHz External crystal with on-chip PLL. Also available: ADuC831 pin-compatible upgrade to existing ADuC812 systems that require additional code or data memory; runs from 1 MHz to 16 MHz External crystal 

The ADuC841/ADuC842/ADuC843 are complete smart transducer front ends, that integrates a high performance self-calibrating multichannel ADC, a dual DAC, and an optimized single-cycle 20 MHz 8-bit MCU (8051 instruction set compatible)on a single chip.The ADuC841 and ADuC842 are identical with the exception of the clock oscillator circuit; the ADuC841 is clocked directly from an external crystal up to 20 MHz whereas the ADuC842 uses a 32 kHz crystal with an on-chip PLL generating a programmable core clock up to 16.78 MHz.The ADuC843 is identical to the ADuC842 except that the ADuC843 has no analog DAC outputs.The microcontroller is an optimized 8052 core offering up to 20 MIPS peak performance. Three different memory options are available offering up to 62 kBytes of nonvolatile Flash/EE program memory. Four kBytes of nonvolatile Flash/EE data memory, 256 bytes RAM, and 2 kBytes of extended RAM are also integrated on-chip. The parts also incorporate additional analog functionality with two 12-bit DACs, power supply monitor, and a band gap reference. On-chip digital peripherals include two 16-bit Σ-Δ. DACs, a dual output 16-bit PWM, a watchdog timer, a time interval counter, three timers/counters, and three serial I/O ports (SPI, I2C, and UART).On the ADuC812 and the ADuC832, the I2C and SPI interfaces share some of the same pins. For backwards compatibility, this is also the case for the ADuC841/ADuC842/ADuC843.However, there is also the option to allow SPI operate separately on P3.3, P3.4, and P3.5, while I2C uses the standard pins. The I2C interface has also been enhanced to offer repeated start, general call, and quad addressing.On-chip factory firmware supports in-circuit serial download and debug modes (via UART) as well as single-pin emulation mode via the EA pin..Applications Optical networking—laser power control Base station systems Precision instrumentation, smart sensors Transient capture systems DAS and communications systems

The ADuC841/ADuC842/ADuC843 are complete smart transducer front ends, that integrates a high performance self-calibrating multichannel ADC, a dual DAC, and an optimized single-cycle 20 MHz 8-bit MCU (8051 instruction set compatible) on a single chip.The ADuC841 and ADuC842 are identical with the exception of the clock oscillator circuit; the ADuC841 is clocked directly from an external crystal up to 20 MHz whereas the ADuC842 uses a 32 kHz crystal with an on-chip PLL generating a programmable core clock up to 16.78 MHz.The ADuC843 is identical to the ADuC842 except that the ADuC843 has no analog DAC outputs.The microcontroller is an optimized 8052 core offering up to 20 MIPS peak performance. Three different memory options are available offering up to 62 kBytes of nonvolatile Flash/EE program memory. Four kBytes of nonvolatile Flash/EE data memory, 256 bytes RAM, and 2 kBytes of extended RAM are also integrated on-chip. The parts also incorporate additional analog functionality with two 12-bit DACs, power supply monitor, and a band gap reference. On-chip digital peripherals include two 16-bit Σ-Δ. DACs, a dual output 16-bit PWM, a watchdog timer, a time interval counter, three timers/counters, and three serial I/O ports (SPI, I2C, and UART).On the ADuC812 and the ADuC832, the I2C and SPI interfaces share some of the same pins. For backwards compatibility, this is also the case for the ADuC841/ADuC842/ADuC843.However, there is also the option to allow SPI operate separately on P3.3, P3.4, and P3.5, while I2C uses the standard pins. The I2C interface has also been enhanced to offer repeated start, general call, and quad addressing.On-chip factory firmware supports in-circuit serial download and debug modes (via UART) as well as single-pin emulation mode via the EA pin.Applications Optical networking—laser power control Base station systems Precision instrumentation, smart sensors Transient capture systems DAS and communications systems