The AD9528 is a two-stage PLL with an integrated JESD204B/JESD204C SYSREF generator for multiple device synchronization. The first stage phase-locked loop (PLL) (PLL1) provides input reference conditioning by reducing the jitter present on a system clock. The second stage PLL (PLL2) provides high frequency clocks that achieve low integrated jitter as well as low broadband noise from the clock output drivers. The external VCXO provides the low noise reference required by PLL2 to achieve the restrictive phase noise and jitter requirements necessary to achieve acceptable performance. The on-chip VCO tunes from 3.450 GHz to 4.025 GHz. The integrated SYSREF generator outputs single shot, N-shot, or continuous signals synchronous to the PLL1 and PLL2 outputs to time align multiple devices.The AD9528 generates six outputs (Output 0 to Output 3, Output 12, and Output 13) with a maximum frequency of 1.25 GHz, and eight outputs with a maximum frequency of up to 1 GHz. Each output can be configured to output directly from PLL1, PLL2, or the internal SYSREF generator. Each of the 14 output channels contains a divider with coarse digital phase adjustment and an analog fine phase delay block that allows complete flexibility in timing alignment across all 14 outputs. The AD9528 can also be used as a dual input flexible buffer to distribute 14 device clock and/or SYSREF signals. At power-up, the AD9528 sends the VCXO signal directly to Output 12 and Output 13 to serve as the power-up ready clocks.APPLICATIONS High performance wireless transceivers LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs; supports JESD204B/JESD204C Low jitter, low phase noise clock distribution ATE and high performance instrumentation

The AD9680 is a dual, 14-bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed for sampling wide bandwidth analog signals of up to 2 GHz. The AD9680 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.The analog input and clock signals are differential inputs. Each ADC data output is internally connected to two digital down-converters (DDCs). Each DDC consists of up to five cascaded signal processing stages: a 12-bit frequency translator (NCO), and four half-band decimation filters. The DDCs are bypassed by default.In addition to the DDC blocks, the AD9680 has several functions that simplify the automatic gain control (AGC) function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF± and SYNCINB± input pins.The AD9680 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable, 3-wire SPI.The AD9680 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +85°C industrial temperature range. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm × 9 mm, 64-lead LFCSP.APPLICATIONS Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE General-purpose software radios Ultrawideband satellite receivers Instrumentation Radars Signals intelligence (SIGINT) DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The ADA4610-1/ADA4610-2/ADA4610-4 are precision junction field effect transistor (JFET) amplifiers that feature low input noise voltage, current noise, offset voltage, input bias current, and rail-to-rail output. The ADA4610-1 is a single amplifier, the ADA4610-2 is a dual amplifier, and the ADA4610-4 is a quad amplifier.The combination of low offset, noise, and very low input bias current makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low noise, and fast settling time, the ADA4610-1/ADA4610-2/ADA4610-4 provide superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 maintain fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. The fast slew rate and great stability with capacitive loads make the ADA4610-1/ADA4610-2/ADA4610-4 ideal for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the ADA4610-1/ADA4610-2/ ADA4610-4 great choices for audio applications.The ADA4610-1/ADA4610-2/ADA4610-4 are specified over the −40°C to +125°C extended industrial temperature range.The ADA4610-1 is available in an 8-lead SOIC package and in a 5-lead SOT-23 package. The ADA4610-2 is available in 8-lead SOIC, 8-lead MSOP, and 8-lead LFCSP packages. The ADA4610-4 is available in a 14-lead SOIC package and in a 16-lead LFCSP.Applications Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio

The ADA4610-1/ADA4610-2/ADA4610-4 are precision junction field effect transistor (JFET) amplifiers that feature low input noise voltage, current noise, offset voltage, input bias current, and rail-to-rail output. The ADA4610-1 is a single amplifier, the ADA4610-2 is a dual amplifier, and the ADA4610-4 is a quad amplifier.The combination of low offset, noise, and very low input bias current makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low noise, and fast settling time, the ADA4610-1/ADA4610-2/ADA4610-4 provide superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 maintain fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. The fast slew rate and great stability with capacitive loads make the ADA4610-1/ADA4610-2/ADA4610-4 ideal for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the ADA4610-1/ADA4610-2/ ADA4610-4 great choices for audio applications.The ADA4610-1/ADA4610-2/ADA4610-4 are specified over the −40°C to +125°C extended industrial temperature range.The ADA4610-1 is available in an 8-lead SOIC package and in a 5-lead SOT-23 package. The ADA4610-2 is available in 8-lead SOIC, 8-lead MSOP, and 8-lead LFCSP packages. The ADA4610-4 is available in a 14-lead SOIC package and in a 16-lead LFCSP.Applications Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio

The ADA4807-1 is a low power, low noise, rail-to-rail voltage feedback amplifier with exceptionally high performance. It is designed to have the lowest input noise (3.1 nV/√Hz and 0.7 pA/√Hz) among high speed, rail-to-rail amplifiers in the industry while operating on only 1 mA or less of quiescent supply current, making it ideal for a wide range of applications from battery-powered, portable instrumentation to high speed systems where component density requires lower power dissipation. The ADA4807-1 operates over a wide range of supply voltages from ±1.5 V to ±5 V, as well as from +3 V to +10 V single supplies, and includes a disable feature that allows reduction of the typical quiescent supply current to 2.4 μA when asserted.For systems with high dynamic range signals, the output voltage swings to within 50 mV of each rail, maximizing the output dynamic range, and the full, rail-to-rail input stage permits input operation up to and beyond the supply rails.The ADA4807-1 features high speed performance of 200 MHz small signal −3 dB bandwidth, a 225 V/μs slew rate, and a settling time of 47 ns to 0.1% (4 V step) with a low input offset voltage of 125 μV (maximum) and 0.7 μV/°C drift. For ±5 V supplies, the HD2 is −112 dBc and HD3 is –115 dBc for a 2 V p-p, 100 kHz output signal driving a 1 kΩ load. The low distortion and fast settling time makes this amplifier ideal for driving high speed single-supply precision ADCs with up to 18-bit resolution. The ADA4807-1 delivers this excellent performance while consuming 1 mA or less of quiescent.The ADA4807-1 (single) is available in space-saving 6-lead SC70 and 6-lead SOT-23 packages, and each operates over the −40°C to +125°C industrial temperature range.Applications High speed, battery operated systems High component density systems High resolution analog-to-digital converter (ADC) drivers Portable test instruments Active filters

The ADF4355-3 allows the implementation of fractional-N orinteger-N phase-locked loop (PLL) frequency synthesizers whenused with an external loop filter and an external referencefrequency. A series of frequency dividers at the output provideoperation from 51.5625 MHz to 6600 MHz.The ADF4355-3 has an integrated VCO with a fundamentaloutput frequency ranging from 3300 MHz to 6600 MHz. Inaddition, the VCO frequency is connected to divide by 1, 2, 4, 8,16, 32, or 64 circuits that allow the user to generate RF outputfrequencies as low as 51.5625 MHz. For applications that requireisolation, the RF output stage can be muted. The mute functionis both pin- and software-controllable.Control of all on-chip registers is through a simple 3-wire interface.The ADF4355-3 operates with analog, digital, charge pump, andVCO power supplies ranging from 3.1515 V to 3.4485 V. TheADF4355-3 also contains hardware and software power-downmodes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation

The ADF5355 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference frequency. The wideband microwave VCO design permits frequency operation from 6.8 GHz to 13.6 GHz at one radio frequency (RF) output. A series of frequency dividers at another frequency output permits operation from 54 MHz to 6800 MHz.The ADF5355 has an integrated VCO with a fundamental output frequency ranging from 3400 MHz to 6800 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate RF output frequencies as low as 54 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin and software controllable.Control of all on-chip registers is through a simple 3-wire interface. The ADF5355 operates with analog and digital power supplies ranging from 3.15 V to 3.45 V, with charge pump and VCO supplies from 4.75 V to 5.25 V. The ADF5355 also contains hardware and software power-down modes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation

The ADF7030-1 is a fully integrated, radio transceiver achieving high performance at very low power. The ADF7030-1 is ideally suited for applications that require long range, network robustness, and long battery life. It is suitable for applications that operate in the ISM, SRD, and licensed frequency bands at 169.4 MHz to 169.6 MHz, 426 MHz to 470 MHz, and 863 MHz to 960 MHz. It provides extensive support for standards-based protocols like IEEE802.15.4g while also providing flexibility to support a wide range of proprietary protocols.The highly configurable low intermediate frequency (IF) receiver supports a large range of receiver channel bandwidths from 2.6 kHz to 406 kHz. This range of receiver channel bandwidths allows the ADF7030-1 to support ultranarrow-band, narrow-band, and wideband channel spacing.The ADF7030-1 features two independent PAs supporting output power ranges of −20 dBm to +13 dBm and −20 dBm to +17 dBm. The PAs support ultrafine adjustment of the power with a step resolution of 0.1 dB. The PA output power is exceptionally robust over temperature and voltage. The PAs have an automatic power ramp control to limit spectral splatter to meet regulatory standards.The ADF7030-1 features an on-chip ARM® Cortex®-M0 processor that performs radio control, radio calibration, and packet management. Cortex-M0 eases the processing burden of the host processor because the ADF7030-1 integrates the lower layers of a typical communication protocol stack. This internal processor also permits the download and execution of Analog Devices, Inc., provided firmware modules that can extend the functionality of the ADF7030-1.The ADF7030-1 has two packet modes: generic packet mode and IEEE802.15.4g mode. In generic packet mode, the packet format is highly flexible and fully programmable, thereby ensuring its compatibility with proprietary packet formats. In IEEE802.15.4g packet mode, the packet format conforms to the IEEE802.15.4g standard. FEC, as per the IEEE802.15.4g standard, is also supported.The ADF7030-1 operates with a power supply range of 2.2 V to 3.6 V and has very low power consumption in both Tx and Rx modes, enabling long lifetimes in battery-operated systems. An ultralow power deep sleep mode achieves a typical current of 10 nA with the configuration memory retained.A complete wireless solution can be built using a small number of external discrete components and a host processor (typically a microcontroller). The host processor can configure the ADF7030-1 using a simple command-based protocol over a standard 4-wire SPI interface. A single-byte command transitions the radio between states or performs a radio function.The ADF7030-1 is available in two package types: a 6 mm × 6 mm, 40-lead LFCSP and a 7 mm × 7 mm, 48-lead LQFP. Both package types use NiPdAu plating to mitigate against silver migration in high humidity applications. The ADF7030-1 operating temperature range is −40°C to +85°C.For Figure 13 to Figure 19, Figure 30, Figure 42, Figure 60, Figure 61, and Figure 75 in the Typical Performance Characteristics section, PA_COARSE is a programmable value that provides a coarse adjustment of the PA output power. This value can be programmed in the range of 1 to 6 for PA1, and from 1 to 10 for PA2. PA_FINE is a programmable value that provides a fine adjustment of the PA output power. This value can be programmed in the range of 3 to 127 for both PA1 and PA2. PA_MICRO is a programmable value that provides a microadjustment (typically <0.1 dB) of the PA output power. This value can be programmed in the range of 1 to 31 for both PA1 and PA2. PAOLDO_VOUT_CON is a programmable value that configures the internal LDO voltage that provides bias for the PA. For additional information on these bit settings, see the ADF7030-1 Software Reference Manual, which is the detailed programming guide for the device.Applications IEEE 802.15.4g (MR-FSK PHY)  Wireless M-Bus (EN 13757-4) Smart metering Security and building automation  Active tag asset tracking Industrial control Wireless sensor networks (WSNs)

The ADIS16495 is a complete inertial system that includes a triaxis gyroscope and a triaxis accelerometer. Each inertial sensor in the ADIS16495 combines industry leading iMEMS® technology with signal conditioning that optimizes dynamic performance. The factory calibration characterizes each sensor for sensitivity, bias, alignment, and linear acceleration (gyroscope bias). As a result, each sensor has its own dynamic compensation formulas that provide accurate sensor measurements.The ADIS16495 provides a simple, cost effective method for integrating accurate, multiaxis inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. All necessary motion testing and calibration are part of the production process at the factory, greatly reducing system integration time. Tight orthogonal alignment simplifies inertial frame alignment in navigation systems. The serial peripheral interface (SPI) and register structure provide a simple interface for data collection and configuration control.The footprint and connector system of the ADIS16495 enable a simple upgrade from the ADIS16375, ADIS16480, ADIS16485, ADIS16488A, and ADIS16490. The ADIS16495 is available in an aluminum package that is approximately 47 mm × 44 mm × 14 mm and includes a standard connector interface.Applications Precision instrumentation, stabilization Guidance, navigation, control Avionics, unmanned vehicles Precision autonomous machines, robotics

The ADM2795E is a 5 kV rms signal isolated RS-485 transceiver that features up to ±42 V of ac/dc peak bus overvoltage fault protection on the RS-485 bus pins. The device integrates Analog Devices, Inc., iCoupler® technology to combine a 3-channel isolator, RS-485transceiver, and IEC electromagnetic compatibility (EMC) transient protection in a single package. The ADM2795E is aRS-485/RS-422 transceiver that integrates IEC 61000-4-5 Level 4surge protection, allowing up to ±4 kV protection on the RS-485bus pins (A and B). The device has IEC 61000-4-4 Level 4 EFTprotection up to ±2 kV and IEC 61000-4-2 Level 4 ESD protection on the bus pins, allowing this device to withstand up to ±15 kV on the transceiver interface pins without latching up. This device has an extended common-mode input range of ±25 V to improve data communication reliability in noisy environments. TheADM2795E is capable of operating over wide power supply ranges, with a 1.7 V to 5.5 V VDD1 power supply range, allowing interfacing to low voltage logic supplies. The ADM2795E is also fully TIA/EIA RS-485/RS-422 compliant when operated over a3 V to 5.5 V VDD2 power supply. The device is fully characterizedover an extended operating temperature range of −40°C to +125°C,and is available in a 16-lead, wide-body SOIC package.Applications Heating, ventilation, and air conditioning (HVAC) networks Industrial field buses Building automation Utility networks