The AD9229 is a 50 or 65 MSPS quad 12-bit, analog–to–digital converter with serial LVDS outputs. An on–chip track–and–hold circuit is designed for low cost, low power, small size and ease of use. The product operates up to a 65 MSPS conversion rate and is optimized for outstanding dynamic performance where a small package size is critical.The ADC requires a single +3 V power supply. No external reference or driver components are required for many applications. A separate output power supply pin supports LVDS compatible serial digital output levels.The ADC automatically multiplies up the sample rate clock for the appropriate LVDS serial data rate. This data clock output (DCO) provides operation up to 390 MHz and supports double-data rate operation (DDR). An MSB trigger or Frame clock is also provided to signal a new output byte. Power down is supported, and the ADC consumes 3 mW when enabled.Fabricated on an advanced CMOS process, the AD9229 is available in a 48-pin chip scale 7 mm x 7 mm package (48-LFCSP) specified over the industrial temperature range (–40°C to +85°C).ApplicationsDigital beam forming systems for ultrasound Wireless and wired broadband communications Communication test equipment

The AD9880 offers designers the flexibility of an analog interface and High-Definition Multimedia Interface (HDMI™) receiver integrated on a single chip. Also included is support for High bandwidth Digital Content Protection (HDCP).ANALOG INTERFACEThe AD9880 is a complete 8-bit 150 MSPS monolithic analog interface optimized for capturing Component Video (YPbPr) and RGB graphics signals. Its 150 MSPS encode rate capability and full power analog bandwidth of 300 MHz supports all HDTV formats (up to 1080p) and FPD resolutions up to SXGA (1280 × 1024 at 75 Hz).The analog interface includes a 150 MHz triple ADC with internal 1.25V reference, a Phase Locked Loop (PLL), and programmable gain, offset, and clamp control. The user provides only 1.8V and 3.3V power supply, analog input, and Hsync. Three-state CMOS outputs may be powered from 1.8V to 3.3V. The AD9880’s on-chip PLL generates a pixel clock from Hsync. Pixel clock output frequencies range from 12 MHz to 150 MHz. PLL clock jitter is typically less than 500 ps p-p at 150 MHz. The AD9880 also offers full sync processing for composite sync and Sync-on-Green (SOG) applications.DIGITAL INTERFACEThe AD9880 contains a HDMI v1.1 compatible receiver and supports all HDTV formats (up to 1080p) and display resolutions up to SXGA (1280 × 1024 at 75 Hz). The receiver features an intra-pair skew tolerance of up to one full clock cycle. With the inclusion of HDCP, displays may now receive encrypted video content. The AD9880 allows for authentication of a video receiver, decryption of encoded data at the receiver, and renewability of that authentication during transmission as specified by the HDCP v1.1 protocol.Fabricated in an advanced CMOS process, the AD9880 is provided in a space-saving 100-lead LQFP surface-mount Pb-free plastic package and is specified over the 0 ºC to 70 ºC temperature range.APPLICATIONS Advanced TV HDTV Projectors LCD Monitor

The AD9911 is a complete direct digital synthesizer (DDS).This device includes a high speed DAC with excellent widebandand narrowband spurious-free dynamic range (SFDR) as well asthree auxiliary DDS cores without assigned digital-to-analogconverters (DACs). These auxiliary channels are used for spurreduction, multitone generation, or test-tone modulation.The AD9911 is the first DDS to incorporate SpurKillertechnology and multitone generation capability. Multitonemode enables the generation up to four concurrent carriers;frequency, phase and amplitude can be independentlyprogrammed. Multitone generation can be used for systemtests, such as inter-modulation distortion and receiver blockersensitivity. SpurKilling enables customers to improve SFDRperformance by reducing the magnitude of harmoniccomponents and/or the aliases of those harmonic components.Test-tone modulation efficiently enables sine wave modulationof amplitude on the output signal using one of the auxiliaryDDS cores.The AD9911 can perform modulation of frequency, phase, oramplitude (FSK, PSK, ASK). Modulation is implemented bystoring profiles in the register bank and applying data to theprofile pins. In addition, the AD9911 supports linear sweep offrequency, phase, or amplitude for applications such as radarand instrumentation.The DDS acts as a high resolution frequency divider with theREF_CLK as the input and the DAC providing the output. TheREF_CLK input can be driven directly or used in combinationwith an integrated REF_CLK multiplier (PLL). The REF_CLKinput also features an oscillator circuit to support an externalcrystal as the REF_CLK source. The crystal can be used incombination with the REF_CLK multiplier.The AD9911 I/O port offers multiple configurations to providesignificant flexibility. The I/O port offers an SPI-compatiblemode of operation that is virtually identical to the SPI operationfound in earlier Analog Devices DDS products.Flexibility is provided by four data pins (Pin SDIO_0,Pin SDIO_1, Pin SDIO_2, and Pin SDIO_3) that allow fourprogrammable modes of I/O operation.The DAC output is supply referenced and must be terminatedinto AVDD by a resistor and an AVDD center-tapped transformer.The DAC has its own programmable reference to enabledifferent full-scale currents.The DDS core (the AVDD pins and the DVDD pins) is poweredby a 1.8 V supply. The digital I/O interface (SPI) operates at3.3 V and requires that the Pin DVDD_I/O (Pin 49) beconnected to 3.3 V. Applications Agile local oscillator Test and measurement equipment Commercial and amateur radio exciter Radar and sonar Test-tone generation Fast frequency hopping Clock generation

The AD9954 is a direct digital synthesizer (DDS) that uses advanced technology, coupled with an internal high speed, high performance DAC to form a complete, digitally programmable, high frequency synthesizer capable of generating a frequency-agile analog output sinusoidal waveform at up to 160 MHz. The AD9954 enables fast frequency hopping coupled with fine tuning of both frequency (0.01 Hz or better) and phase (0.022° granularity).The AD9954 is programmed via a high speed serial I/O port. The device includes static RAM to support flexible frequency sweep capability in several modes, plus a user-defined linear sweep mode of operation. Also included is an on-chip high speed comparator for applications requiring a square wave output. An on-chip oscillator and PLL circuitry provide users with multiple approaches to generate the device’s system clock.The AD9954 is specified to operate over the extended industrial temperature range.Applications Agile LO frequency synthesis Programmable clock generators FM chirp source for radar and scanning systems Automotive radars Test and measurement equipment Acousto-optic device drivers

The AD9957 functions as a universal I/Q modulator and agileupconverter for communications systems where cost, size, powerconsumption, and dynamic performance are critical. TheAD9957 integrates a high speed, direct digital synthesizer(DDS), a high performance, high speed, 14-bit digital-to-analogconverter (DAC), clock multiplier circuitry, digital filters, andother DSP functions onto a single chip. It provides basebandupconversion for data transmission in a wired or wirelesscommunications system.The AD9957 is the third offering in a family of quadraturedigital upconverters (QDUCs) that includes the AD9857 andAD9856. It offers performance gains in operating speed, powerconsumption, and spectral performance. Unlike its predecessors,it supports a 16-bit serial input mode for I/Q baseband data.The device can alternatively be programmed to operate either asa single tone, sinusoidal source or as an interpolating DAC.The reference clock input circuitry includes a crystal oscillator,a high speed, divide-by-two input, and a low noise PLL formultiplication of the reference clock frequency.The user interface to the control functions includes a serial porteasily configured to interface to the SPORT of the Blackfin®DSP and profile pins to enable fast and easy shift keying of anysignal parameter (phase, frequency, or amplitude).Applications HFC data, telephony, and video modems Wireless base station transmissions Broadband communications transmissions Internet telephony

The ADCMP604 / ADCMP605 are very fast comparators fabricated on the Analog Devices, Inc. proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE − 0.5 V to VCCI + 0.2 V, low noise, LVDS-compatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shut-down inputs.The devices offer 1.5 ns propagation delays with 1 ps rms random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps.A flexible power supply scheme allows the devices to operate with a single 2.5 V positive supply and a −0.5 V to +2.7 V input signal range up to a 5.5 V positive supply with a −0.5 V to +5.7 V input signal range. Split input/output supplies, with no sequencing restrictions on the ADCMP605, support a wide input signal range with greatly reduced power consumption.The LVDS-compatible output stage is designed to drive any standard LVDS input. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option.The ADCMP604 is available in a 6-lead SC70 package, and the ADCMP605 is available in a 12-lead LFCSP.APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE)

The ADF4154 is a fractional-N frequency synthesizer that implements local oscillators in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registersdefine an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A key feature of the ADF4154 is the fast-lock mode with a builtintimer. The user can program a predetermined count-down time value so that the PLL will remain in wide bandwidth mode, instead of having to control this time externally.Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V, and can be powered down when not in use.

The ADG1208 and ADG1209 are monolithic, iCMOS® analogmultiplexers comprising eight single channels and four differentialchannels, respectively. The ADG1208 switches one of eight inputsto a common output as determined by the 3-bit binary addresslines A0, A1, and A2. The ADG1209 switches one of fourdifferential inputs to a common differential output as determinedby the 2-bit binary address lines A0 and A1. An EN input onboth devices enable or disable the device. When disabled, allchannels are switched off. When on, each channel conductsequally well in both directions and has an input signal rangethat extends to the supplies.The iCMOS (industrial CMOS) modular manufacturingprocess combines high voltage CMOS (complementary metal-oxidesemiconductor) and bipolar technologies. It enables thedevelopment of a wide range of high performance analog ICscapable of 33 V operation in a footprint that no other generationof high voltage devices has been able to achieve. Unlike analogICs using conventional CMOS processes, iCMOS componentscan tolerate high supply voltages while providing increasedperformance, dramatically lower power consumption, andreduced package size.The ultralow capacitance and exceptionally low charge injectionof these multiplexers make them ideal solutions for data acquisitionand sample-and-hold applications, where low glitch and fastsettling are required. There is minimum chargeinjection over the entire signal range of the device. iCMOSconstruction also ensures ultralow power dissipation, making theds ideally suited for portable and battery-powered instruments.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The ADG3300 is a bidirectional logic level translator that contains eight bidirectional channels. It can be used in multivoltage digital system applications such as data transfer between a low voltage DSP/controller and a higher voltage device. The internal architecture allows the device to perform bidirectional logic level translation without an additional signal to set the direction of the translation.The voltage applied to VCCA sets the logic levels on the A side of the device, while VCCY sets the levels on the Y side. For proper operation, VCCA must always be less than VCCY. The VCCA-compatible logic signals applied to the A side of the device appear as VCCY-compatible levels on the Y side. Similarly, VCCY-compatible logic levels applied to the Y side of the device appear as VCCA-compatible logic levels on the A side.The enable pin provides three-state operation of the Y side pins. When the enable pin (EN) is pulled low, the A1 to A8 pins are internally pulled down by 6 kΩ resistors, while the Y terminals are in the high impedance state. The EN pin is referred to VCCA supply voltage and driven high for normal operation.The ADG3300 is available in a compact 20-lead TSSOP package, and it is guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and extended −40°C to +85°C temperature range.PRODUCT HIGHLIGHTS Bidirectional level translation. Fully guaranteed over the 1.15 V to 5.5 V supply range. No direction pin. 20-lead TSSOP package.APPLICATIONS Low Voltage ASIC Level Translation Smart Card Readers Cell Phones and Cell Phone Cradles Portable Communications Devices Telecommunications Equipment Network Switches and Routers Storage Systems (SAN/NAS) Computing/Server Applications GPS Portable POS Systems Low Cost Serial Interfaces

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