2 A, Ultralow Noise, High PSRR, Adjustable Output, RF Linear Regulator Features: Input voltage range: 2.3 V to 5.5 V Adjustable output voltage range (VOUT): 1.2 V to 3.3 V Maximum load current: 2 A Low noise 0.9 μV rms total integrated noise from 100 Hz to 100 kHz 1.6 μV rms total integrated noise from 10 Hz to 100 kHz Noise spectral density: 1.7 nV/√Hz from 10 kHz to 1 MHz Power supply rejection ratio (PSRR) 68 dB from 1 kHz to 100 kHz 45 dB at 1 MHz Dropout voltage: 200 mV typical at IOUT = 2 A, VOUT = 3.3 V Initial accuracy: ±0.6% at ILOAD = 10 mA Accuracy over line, load, and temperature: ±1.5% See data sheet for additional features

18 GHz to 44 GHz, GaAs, pHEMT, MMIC, 1/2 W Power Amplifier Features: Output P1dB: 29 dBm PSAT: 29.5 dBm Gain: 23.5 dB Output IP3: 38 dBm Supply voltage: 5 V at 800 mA Integrated power detector 50 Ω matched input/output Die size: 2.750 mm × 1.805 mm × 0.102 mm

18 GHz to 44 GHz, GaAs, pHEMT, MMIC, 1/2 W Power Amplifier Features: Output P1dB: 29 dBm PSAT: 29.5 dBm Gain: 23.5 dB Output IP3: 38 dBm Supply voltage: 5 V at 800 mA Integrated power detector 50 Ω matched input/output Die size: 2.750 mm × 1.805 mm × 0.102 mm

Ultra-Low-Noise, High-Accuracy 4.096V Voltage Reference Features: Maximum temperature coefficient (TCVOUT): 0.8 ppm/°C (D grade 0°C to 70°C) 1 ppm/°C (C grade 0°C to 70°C) 2 ppm/°C (B grade −40°C to +125°C) 4 ppm/°C (A grade 40°C to +125°C) Output noise (0.1 Hz to 10 Hz): 1 μV p-p at VOUT of 2.048 V typical Initial output voltage error: B, C, D grade: ±0.02% (maximum) Input voltage range: 3 V to 15 V Operating temperature: A grade and B grade: −40°C to +125°C C grade: 0°C to +70°C Output current: +10 mA source/−10 mA sink Low quiescent current: 950 μA (maximum) Low dropout voltage: 300 mV at 2 mA (VOUT ≥ 3 V) 8-lead SOIC package and LCC package AEC-Q100 qualified for automotive applications Long-term drift: 8 ppm typical at 4500 hours

Ultra-Low-Noise, High-Accuracy 5.0V Voltage Reference Features: Maximum temperature coefficient (TCVOUT): 0.8 ppm/°C (D grade 0°C to 70°C) 1 ppm/°C (C grade 0°C to 70°C) 2 ppm/°C (B grade −40°C to +125°C) 4 ppm/°C (A grade 40°C to +125°C) Output noise (0.1 Hz to 10 Hz): 1 μV p-p at VOUT of 2.048 V typical Initial output voltage error: B, C, D grade: ±0.02% (maximum) Input voltage range: 3 V to 15 V Operating temperature: A grade and B grade: −40°C to +125°C C grade: 0°C to +70°C Output current: +10 mA source/−10 mA sink Low quiescent current: 950 μA (maximum) Low dropout voltage: 300 mV at 2 mA (VOUT ≥ 3 V) 8-lead SOIC package and LCC package AEC-Q100 qualified for automotive applications Long-term drift: 8 ppm typical at 4500 hours

Silicon SPDT Switch, Reflective, 9 kHz to 44 GHz Features: Ultrawideband frequency range: 9 kHz to 44 GHz Reflective design Low insertion loss with impedance match 0.9 dB typical to 18 GHz 1.4 dB typical to 40 GHz 1.6 dB typical to 44 GHz Low insertion loss without impedance match 0.9 dB typical to 18 GHz 1.7 dB typical to 40 GHz 2.2 dB typical to 44 GHz High input linearity P1dB: 27.5 dBm typical IP3: 50 dBm typical High RF input power handling Through path: 27 dBm Hot switching: 27 dBm No low frequency spurious RF settling time (50% VCTL to 0.1 dB final RF output): 3.4 μs 12-terminal, 2.25 mm × 2.25 mm LGA package Pin compatible with the ADRF5024 fast switching version

Silicon SPDT Switch, Nonreflective, 100 MHz to 44 GHz Features: Ultrawideband frequency range: 100 MHz to 44 GHz Nonreflective design Low insertion loss: 1.2 dB to 18 GHz 1.7 dB to 26 GHz 2.4 dB to 40 GHz 3.8 dB to 44 GHz High isolation 55 dB to 18 GHz 53 dB to 26 GHz 50 dB to 40 GHz 45 dB to 44 GHz High input linearity P1dB: 27 dBm typical IP3: 53 dBm typical High power handling 24 dBm insertion loss path 24 dBm isolation path All off state control No low frequency spurious signals 0.1 dB RF settling time: 40 ns typical 20-terminal, 3 mm × 3 mm LGA package Pin compatible with ADRF5027, low frequency cutoff versionADRF5026-EP supports defense and aerospace applications (AQEC standard) Download ADRF5026-EP data sheet (pdf) Supports defense and aerospace applications (AQEC standard) Military temperature range (−55°C to +105°C) Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available on request V62/21601 DSCC Drawing Number

Nonreflective, 9 kHz to 44 GHz Silicon SP4T Switch Features: Ultrawideband frequency range: 9 kHz to 44 GHz Nonreflective 50 Ω design Low insertion loss: 1.5 dB at 18 GHz 2.4 dB at 40 GHz 2.5 dB at 44 GHz High isolation: 44 dB at 18 GHz 39 dB at 40 GHz 36 dB at 44 GHz High input linearity: P0.1dB: 26 dBm typical IP3: 48 dBm typical High power handling 24 dBm through path 24 dBm terminated path All off state control Logic select control No low frequency spurs Settling time (0.1 dB final RF output): 6 μs 24-terminal, 3 mm × 3 mm LGA package Pin compatible with ADRF5042, fast switching version

Silicon SPDT Switch, Reflective, 35 GHz to 44 GHz Features:Reflective design Low insertion loss: 1.8 dB at 44 GHz High isolation: 28 dB at 44 GHz High input linearity 0.1 dB power compression (P0.1dB): 37 dBm Third-order intercept (IP3): 52 dBm High RF power handling: 28 dBm average 36 dBm peak Single supply operation: 3.3V Internal negative voltage generator (NVG) RF settling time (0.1 dB final RF output): 45 ns 20-terminal, 3 mm × 3 mm, land grid array package Pin compatible with the ADRF5300: 24 GHz - 32 GHz

0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Features:Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match 2.1 dB up to 18 GHz 2.9 dB up to 26 GHz 4.8 dB up to 40 GHz Attenuation accuracy with impedance match ±(0.10 + 1.0% of attenuation state) up to 18 GHz ±(0.15 + 0.8% of attenuation state) up to 26 GHz ±(0.35 + 2.5% of attenuation state) up to 40 GHz Typical step error with impedance match ±0.18 dB up to 18 GHz ±0.23 dB up to 26 GHz ±0.51 dB up to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 27 dBm IP3: 50 dBm typical High RF input power handling: 27 dBm average, 30 dBm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF settling time (0.1 dB of final RF output): 250 ns 24-terminal, 4 mm × 4 mm LGA package Pin compatible with ADRF5720, low frequency cutoff version