The AD7768/AD7768-4 are 8-channel and 4-channel 24-bit, simultaneous sampling, sigma-delta (Σ-Δ) analog-to-digital converters (ADCs) with power scaling and 110.8 kHz bandwidth. The devices have a Σ-Δ modulator and digital filter per channel, which enables synchronized sampling of ac and dc signals.The AD7768/AD7768-4 achieve 108 dB dynamic range at amaximum input bandwidth of 110.8 kHz, combined with typicalperformance of ±2 ppm integral nonlinearity (INL), ±50 μVoffset error, and ±30 ppm gain error. The AD7768/AD7768-4 user can trade off input bandwidth,output data rate, and power dissipation, and select one of threepower modes to optimize for noise targets and power consumption. The flexibility of the AD7768/AD7768-4 allows them to become reusable platforms for low power dc and highperformance ac measurement modules. The AD7768/AD7768-4 have three modes: fast mode (256 kSPS maximum, 110.8 kHz input bandwidth, 51.5 mW per channel),median mode (128 kSPS maximum, 55.4 kHz input bandwidth,27.5 mW per channel) and low power mode (32 kSPS maximum, 13.8 kHz input bandwidth, 9.375 mW per channel).The AD7768/AD7768-4 offer extensive digital filteringcapabilities, such as a wideband, low ±0.005 dB pass-bandripple, antialiasing low-pass filter with sharp roll-off, and 105 dB attenuation at the Nyquist frequency.Frequency domain measurements can use the wideband linear phase filter. This filter has a flat pass band (±0.005 dB ripple)from dc to 102.4 kHz at 256 kSPS, from dc to 51.2 kHz at 128 kSPS, or from dc to 12.8 kHz at 32 kSPS. The AD7768/AD7768-4 also offer sinc response via a sinc5 filter, a low latency path for low bandwidth, and low noisemeasurements. The wideband and sinc5 filters can be selected and run on a per channel basis. Within these filter options, the user can improve the dynamicrange by selecting from decimation rates of ×32, ×64, ×128,×256, ×512, and ×1024. The ability to vary the decimation filtering optimizes noise performance to the required inputbandwidth.Embedded analog functionality on each ADC channel makesdesign easier, such as a precharge buffer on each analog inputthat reduces analog input current and a precharge reference buffer per channel reduces input current and glitches on thereference input terminals.The device operates with a 5 V AVDD1A and AVDD1B supply,a 2.25 V to 5.0 V AVDD2A and AVDD2B supply, and a 2.5 V to 3.3 V or 1.8 V IOVDD supply (see the 1.8 V IOVDD Operationsection for specific requirements for operating at 1.8 V IOVDD).The device requires an external reference; the absolute inputreference voltage range is 1 V to AVDD1 − AVSS.The specified operating temperature range is −40°C to +105°C. The device is housed in a 10 mm × 10 mm, 64-lead low profile quad flat package (LQFP) with a 12 mm × 12 mm printed circuit board (PCB) footprint.APPLICATIONS Data acquisition systems: USB/PXI/Ethernet Instrumentation and industrial control loops Audio test and measurement Vibration and asset condition monitoring 3-phase power quality analysis Sonar High precision medical electroencephalogram (EEG)/electromyography (EMG)/electrocardiogram (ECG)

The AD7779 is an 8-channel, simultaneous sampling ADC.There are eight full Σ-Δ ADCs on chip. The AD7779 providesan ultralow input current to allow direct sensor connection. Eachinput channel has a programmable gain stage allowing gains of1, 2, 4, and 8 to map lower amplitude sensor outputs into thefull-scale ADC input range, maximizing the dynamic range ofthe signal chain. The AD7779 accepts VREF from 1 V up to 3.6 V.The analog inputs accept unipolar (0 V to VREF/GAIN) or truebipolar (±VREF/GAIN/2 V) analog input signals with 3.3 V or±1.65 V analog supply voltages. The analog inputs can beconfigured to accept true differential, pseudo differential, or singleendedsignals to match different sensor output configurations.Each channel contains an ADC modulator and a sinc3, lowlatency digital filter. An SRC is provided to allow fine resolutioncontrol over the AD7779 ODR. This control can be used inapplications where the ODR resolution is required to maintaincoherency with 0.01 Hz changes in the line frequency. The SRCis programmable through the serial port interface (SPI). TheAD7779 implements two different interfaces: a data outputinterface and SPI control interface. The ADC data outputinterface is dedicated to transmitting the ADC conversionresults from the AD7779 to the processor. The SPI interfaceis used to write to and read from the AD7779 configurationregisters and for the control and reading of data from the SARADC. The SPI interface can also be configured to output theΣ-Δ conversion data.The AD7779 includes a 12-bit SAR ADC. This ADC can be usedfor AD7779 diagnostics without having to decommission one ofthe Σ-Δ ADC channels dedicated to system measurement functions.With the use of an external multiplexer, which can becontrolled through the three general-purpose inputs/outputs pins(GPIOs), and signal conditioning, the SAR ADC can be used tovalidate the Σ-Δ ADC measurements in applications wherefunctional safety is required. In addition, the AD7779 SAR ADCincludes an internal multiplexer to sense internal nodes.The AD7779 contains a 2.5 V reference and reference buffer.The reference has a typical temperature coefficient of 10 ppm/°C.The AD7779 offers two modes of operation: high resolutionmode and low power mode. High resolution mode provides ahigher dynamic range while consuming 10.75 mW per channel;low power mode consumes just 3.37 mW per channel at areduced dynamic range specification.The specified operating temperature range is −40°C to +105°C,although the device is operational up to +125°C.APPLICATIONS Circuit breakers General-purpose data acquisition Electroencephalography (EEG) Industrial process control

The AD7915/AD7916 are 16-bit, successive approximation, analog-to-digital converters (ADCs) that operate from a single power supply, VDD. They contain a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, the AD7915/AD7916 sample the voltage difference between the IN+ and IN− pins. The voltages on these pins typically swing in opposite phases between 0 V and VREF. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. The power consumption of the AD7915/AD7916 scales linearly with throughput.The AD7915/AD7916 are serial peripheral interface (SPI) compatible, which features the ability, using the SDI input, to daisy-chain several ADCs on a single 3-wire bus. They are compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic using the separate VIO supply.The AD7915/AD7916 are available in a 10-lead MSOP or a 10-lead LFCSP with operation specified from −40°C to +125°C.APPLICATIONS Automated test equipment Data acquisition systems Medical instruments Machine automation

The AD8209A is a single-supply difference amplifier ideal for amplifying and low-pass filtering small differential voltages in the presence of a large common-mode voltage. The input common-mode voltage range extends from −2 V to +50 V at a single 5 V supply. The AD8209A is qualified per AEC-Q100 specifications. The amplifier offers enhanced input overvoltage and ESD protection, and includes electromagnetic interference (EMI) filtering.Automotive applications demand robust, precision components for improved system control. The AD8209A provides excellent ac and dc performance, minimizing errors in the application. Typical offset and gain drift in the MSOP package are less than 5 μV/°C and −5 ppm/°C, respectively. The device also delivers a minimum common-mode rejection ratio (CMRR) of 80 dB from dc to 10 kHz.The AD8209A features an externally accessible 100 kΩ resistor at the output of the preamplifier (A1) that can be used for low-pass filtering and for establishing gains other than 14 V/V.Applications High-side current sensing Motor controls Solenoid controls Power management Low-side current sensing Diagnostic protection

The AD9162 is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2× interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm × 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers

The AD9234 is a dual, 12-bit, 1 GSPS/500 MSPS ADC. The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed for sampling wide bandwidth analog signals. The AD9234 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth buffered inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. Each ADC data output is internally connected to an optional decimate-by-2 block. The AD9234 has several functions that simplify the automatic gain control (AGC) function in a communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9234 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the acceptable lane rate of the receiving logic device and the sampling rate of the ADC. Multiple device synchronization is supported through the SYSREF± and SYNCINB± input pins.The AD9234 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable 3-wire SPI.The AD9234 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +85°C industrial temperature range. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Low power consumption analog core, 12-bit, 1.0 GSPS dual analog-to-digital converter (ADC) with 1.5 W per channel. Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm × 9 mm 64-lead LFCSP. Pin compatible with the AD9680 14-bit, 1 GSPS dual ADC.APPLICATIONS Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE Point-to-point radio systems Digital predistortion observation path General-purpose software radios Ultrawideband satellite receiver Instrumentation (spectrum analyzers, network analyzers, integrated RF test solutions) Digital oscilloscopes High speed data acquisition systems DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The AD9528 is a two-stage PLL with an integrated JESD204B/JESD204C SYSREF generator for multiple device synchronization. The first stage phase-locked loop (PLL) (PLL1) provides input reference conditioning by reducing the jitter present on a system clock. The second stage PLL (PLL2) provides high frequency clocks that achieve low integrated jitter as well as low broadband noise from the clock output drivers. The external VCXO provides the low noise reference required by PLL2 to achieve the restrictive phase noise and jitter requirements necessary to achieve acceptable performance. The on-chip VCO tunes from 3.450 GHz to 4.025 GHz. The integrated SYSREF generator outputs single shot, N-shot, or continuous signals synchronous to the PLL1 and PLL2 outputs to time align multiple devices.The AD9528 generates six outputs (Output 0 to Output 3, Output 12, and Output 13) with a maximum frequency of 1.25 GHz, and eight outputs with a maximum frequency of up to 1 GHz. Each output can be configured to output directly from PLL1, PLL2, or the internal SYSREF generator. Each of the 14 output channels contains a divider with coarse digital phase adjustment and an analog fine phase delay block that allows complete flexibility in timing alignment across all 14 outputs. The AD9528 can also be used as a dual input flexible buffer to distribute 14 device clock and/or SYSREF signals. At power-up, the AD9528 sends the VCXO signal directly to Output 12 and Output 13 to serve as the power-up ready clocks.APPLICATIONS High performance wireless transceivers LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs; supports JESD204B/JESD204C Low jitter, low phase noise clock distribution ATE and high performance instrumentation

The AD9680 is a dual, 14-bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed for sampling wide bandwidth analog signals of up to 2 GHz. The AD9680 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.The analog input and clock signals are differential inputs. Each ADC data output is internally connected to two digital down-converters (DDCs). Each DDC consists of up to five cascaded signal processing stages: a 12-bit frequency translator (NCO), and four half-band decimation filters. The DDCs are bypassed by default.In addition to the DDC blocks, the AD9680 has several functions that simplify the automatic gain control (AGC) function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF± and SYNCINB± input pins.The AD9680 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable, 3-wire SPI.The AD9680 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +85°C industrial temperature range. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm × 9 mm, 64-lead LFCSP.APPLICATIONS Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE General-purpose software radios Ultrawideband satellite receivers Instrumentation Radars Signals intelligence (SIGINT) DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The ADA4610-1/ADA4610-2/ADA4610-4 are precision junction field effect transistor (JFET) amplifiers that feature low input noise voltage, current noise, offset voltage, input bias current, and rail-to-rail output. The ADA4610-1 is a single amplifier, the ADA4610-2 is a dual amplifier, and the ADA4610-4 is a quad amplifier.The combination of low offset, noise, and very low input bias current makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low noise, and fast settling time, the ADA4610-1/ADA4610-2/ADA4610-4 provide superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 maintain fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. The fast slew rate and great stability with capacitive loads make the ADA4610-1/ADA4610-2/ADA4610-4 ideal for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the ADA4610-1/ADA4610-2/ ADA4610-4 great choices for audio applications.The ADA4610-1/ADA4610-2/ADA4610-4 are specified over the −40°C to +125°C extended industrial temperature range.The ADA4610-1 is available in an 8-lead SOIC package and in a 5-lead SOT-23 package. The ADA4610-2 is available in 8-lead SOIC, 8-lead MSOP, and 8-lead LFCSP packages. The ADA4610-4 is available in a 14-lead SOIC package and in a 16-lead LFCSP.Applications Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio

The ADA4610-1/ADA4610-2/ADA4610-4 are precision junction field effect transistor (JFET) amplifiers that feature low input noise voltage, current noise, offset voltage, input bias current, and rail-to-rail output. The ADA4610-1 is a single amplifier, the ADA4610-2 is a dual amplifier, and the ADA4610-4 is a quad amplifier.The combination of low offset, noise, and very low input bias current makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low noise, and fast settling time, the ADA4610-1/ADA4610-2/ADA4610-4 provide superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 maintain fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. The fast slew rate and great stability with capacitive loads make the ADA4610-1/ADA4610-2/ADA4610-4 ideal for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the ADA4610-1/ADA4610-2/ ADA4610-4 great choices for audio applications.The ADA4610-1/ADA4610-2/ADA4610-4 are specified over the −40°C to +125°C extended industrial temperature range.The ADA4610-1 is available in an 8-lead SOIC package and in a 5-lead SOT-23 package. The ADA4610-2 is available in 8-lead SOIC, 8-lead MSOP, and 8-lead LFCSP packages. The ADA4610-4 is available in a 14-lead SOIC package and in a 16-lead LFCSP.Applications Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio