Precision 1.7 g, 5 g, 18 g Dual-Axis iMEMS Accelerometer Features: High performance dual-axis accelerometer on a single IC chip 5 mm × 5 mm × 2 mm LCC package 1 mg resolution at 60 Hz Low power: 700 µA at VS = 5 V (typical) High zero g bias stability High sensitivity accuracy –40°C to +125°C temperature range X and Y axes aligned to within 0.1° (typical) BW adjustment with a single capacitor Single-supply operation 3500 g shock survival RoHS-compliant Compatible with Sn/Pb- and Pb-free solder processes

The AD5761R/AD5721R are single channel, 16-/12-bit serialinput, voltage output, digital-to-analog converters (DACs).They operate from single supply voltages from +4.75 V to+30 V or dual supply voltages from −16.5 V to 0 V VSS and+4.75 V to +16.5 V VDD. The integrated output amplifier,reference buffer, and reference provide a very easy to use,universal solution.The devices offer guaranteed monotonicity, integral nonlinearity(INL) of ±2 LSB maximum, 35 nV/√Hz noise, and 7.5 μs settlingtime on selected ranges.The AD5761R/AD5721R use a serial interface that operates atclock rates of up to 50 MHz and are compatible with DSP andmicrocontroller interface standards. Double buffering allows theasynchronous updating of the DAC output. The input codingis user-selectable twos complement or straight binary. Theasynchronous reset function resets all registers to their defaultstate. The output range is user selectable, via the RA[2:0] bitsin the control register.The devices available in a 3 mm × 3 mm LFCSP package and a16-lead TSSOP package offer guaranteed specifications over the−40°C to +125°C industrial temperature range.Applications Industrial automation Instrumentation, data acquisition Open-/closed-loop servo control, process control Programmable logic controllers

DATA CONVERSION DEVELOPMENT KITS - ADC;

The AD9172 is a high performance, dual, 16-bit digital-to-analog converter (DAC) that supports DAC sample rates to 12.6 GSPS. The device features an 8-lane, 15 Gbps JESD204B data input port, a high performance, on-chip DAC clock multiplier, and digital signal processing capabilities targeted at single-band and multiband direct to radio frequency (RF) wireless applications.The AD9172 features three complex data input channels per RF DAC that are bypassable. Each data input channel includes a configurable gain stage, an interpolation filter, and a channel numerically controlled oscillator (NCO) for flexible, multiband frequency planning. The device supports up to a 1.5 GSPS complex data rate per input channel and is capable of aggregating multiple complex input data streams up to a maximum complex data rate of 1.5 GSPS. Additionally, the AD9172 supports ultrawide bandwidth modes bypassing the channelizers to provide maximum data rates of up to 3.08 GSPS (with 16-bit resolution) and 4.1 GSPS (with 12-bit resolution).The AD9172 is available in a 144-ball BGA_ED package.PRODUCT HIGHLIGHTS Supports single-band and multiband wireless applications with three bypassable complex data input channels per RF DAC at a maximum complex input data rate of 1.5 GSPS. One independent NCO per input channel. Ultrawide bandwidth channel bypass modes supporting up to 3 GSPS data rates with 16-bit resolution and 4 GSPS with 12-bit resolution. Low power dual converter decreases the amount of power consumption needed in high bandwidth and multichannel applications.APPLICATIONS Wireless communications infrastructure Multiband base station radios Microwave/E-band backhaul systems Instrumentation, automatic test equipment (ATE) Radars and jammers

Up to 1GHz SHARC+ DSP with 640KB L1, 1024KB Shared L2 SRAM, 120-lead LQFP_EP Features:SHARC+ Core infrastructure 800MHz (max) or 1GHz (max) Core clock frequency 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedMemory 1024KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases Advanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 4x Precision Clock Generators 24 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin 4x I2C, 2x UARTs 6x General Purpose Timer, 1x General Purpose Counter 2x Watchdog Timers 2-ch 12bit Housekeeping ADCs 22 GPIO pins, 24 DAI pins Thermal SensorPackage 14mm x 14mm 120-lead LQFP_EAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications

The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of <1 ppm. Thisfrequency agile PLL allows the ADF7020-1 to be used infrequency-hopping spread spectrum (FHSS) systems. The VCOoperates at twice the fundamental frequency to reduce spuriousemissions and frequency pulling problems.The transmitter output power is programmable in 63 steps from?20 dBm to +13 dBm. The transceiver RF frequency, channelspacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of2.3 V to 3.6 V and can be powered down when not in useA low IF architecture is used in the receiver (200 kHz),minimizing power consumption and the external componentcount and avoiding interference problems at low frequencies.The ADF7020-1 supports a wide variety of programmablefeatures, including Rx linearity, sensitivity, and IF bandwidth,allowing the user to trade off receiver sensitivity and selectivityfor current consumption, depending on the application. Thereceiver also features a patent-pending automatic frequencycontrol (AFC) loop, allowing the PLL to compensate forfrequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperaturesensor, an external analog input, the battery voltage, or theRSSI signal, which provides savings on an ADC in someapplications. The temperature sensor is accurate to ?10?C overthe full operating temperature range of ?40?C to +85?C. Thisaccuracy can be improved by doing a 1-point calibration atroom temperature and storing the result in memory.Applications Low cost wireless data transfer Wireless medical applications Remote control/security systems Wireless metering Keyless entry Home automation Process and building control

The ADCLK854 is a 1.2 GHz/250 MHz LVDS/CMOS fanout buffer optimized for low jitter and low power operation. Possible configurations range from 12 LVDS to 24 CMOS outputs, including combinations of LVDS and CMOS outputs. Three control lines are used to determine whether fixed blocks of outputs (three banks of four) are LVDS or CMOS outputs.The ADCLK854 offers two selectable inputs and a sleep mode feature. The IN_SEL pin state determines which input is fanned out to all the outputs. The SLEEP pin enables a sleep mode to power down the device.The inputs accept various types of single-ended and differential logic levels including LVPECL, LVDS, HSTL, CML, and CMOS. Table 8 provides interface options for each type of connection.This device is available in a 48-pin LFCSP package. It is specified for operation over the standard industrial temperature range of −40°C to +85°C.APPLICATIONSLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation

The AD5272 / AD5274 are single-channel, 1024-/256-position digital rheostats that combine industry leading variable resistor performance with nonvolatile memory (NVM) in a compact package.The AD5272 / AD5274 ensure less than 1% end-to-end resistor tolerance error and offer 50-times programmable (50-TP) memory.The guaranteed industry leading low resistor tolerance error feature simplifies open-loop applications as well as precision calibration and tolerance matching applications.The AD5272 / AD5274 device wiper settings are controllable through the I2C-compatible digital interface. Unlimited adjustments are allowed before programming the resistance value into the 50-TP memory. The AD5272 / AD5274 do not require any external voltage supply to facilitate fuse blow and there are 50 opportunities for permanent programming. During 50-TP activation, a permanent blow fuse command freezes the wiper position (analogous to placing epoxy on a mechanical trimmer).The AD5272 / AD5274 are available in a 3 mm × 3 mm 10-lead LFCSP package and in a 10-lead MSOP package. The parts are guaranteed to operate over the extended industrial temperature range of −40°C to +125°C.APPLICATIONS Mechanical rheostat replacements Op-amp: variable gain control Instrumentation: gain, offset adjustment Programmable voltage to current conversions Programmable filters, delays, time constants Programmable power supply Sensor calibration

The ADF4360-3 is a fully integrated integer-N synthesizer andvoltage controlled oscillator (VCO). The ADF4360-3 is designedfor a center frequency of 1750 MHz. In addition, there is adivide-by-2 option available, whereby the user gets an RF output of between 800 MHz and 975 MHz. Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V and can be powered down when not in use.?

5.7 kV RMS 500kbps Half Duplex Signal and Power Isolated RS-485 Transceiver with 15 kV IEC ESD Features: 5.7 kV rms isolated RS-485/RS-422 transceiver Low radiated emissions, integrated, isolated dc-to-dc converter Passes EN 55032 Class B with margin on a 2-layer PCB Cable invert smart feature Correct reversed cable connection on A, B, Y, and Z bus pins while maintaining full receiver fail-safe feature ESD protection on RS-485 A, B, Y, and Z pins 12 kV IEC61000-4-2 contact discharge 15 kV IEC61000-4-2 air discharge High speed 25 Mbps data rate (ADM2865E/ADM2867E) Low speed 500 kbps data rate for EMI control (ADM2861E/ADM2863E) Flexible power supplies Input VCC supply of 3 V to 5.5 V Logic VIO supply of 1.7 V to 5.5 V VSEL pin to select VISO supply of 5 V (VCC > 4.5 V) or 3.3 V PROFIBUS compliant for 5 V VISO Wide operating temperature range: −40°C to +105°C High common-mode transient immunity: 250 kV/μs Short-circuit, open-circuit, and floating input receiver fail-safe Supports 192 bus nodes (72 k receiver input impedance) Full hot swap support (glitch free power-up/power-down) Safety and regulatory approvals (pending) CSA Component Acceptance Notice 5A, DIN V VDE V 0884-11, UL 1577, CQC11-471543-2012, IEC 61010-1 Complies with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E) 28-lead, fine pitch SOIC_W package (10.15 mm 10.05 mm) with >8.0 mm creepage and clearance