I2C CMOS 8 X 12 Analog Switch Array with Dual/Single Supplies Features: I2C compatible interface  3.4 MHz high speed I2C option 32-lead LFCSP_VQ  (5 mm × 5 mm) Double-buffered input logic  Simultaneous update of multiple switches Up to 300 MHz bandwidth Fully specified at dual ±5 V/single +12 V operation On resistance 35 Ω maximum Low quiescent current < 20 μA Qualified for automotive applications

DIVIDERS 20V/US TO-100-10; No. of Multipliers / Dividers:1; No. of Amplifiers:4 Amplifier; Supply Voltage Min:8V; Supply Voltage Max:18V; Slew Rate:20V/µs; Digital IC Case:TO-100; No. of Pins:10Pins; Operating Temperature Min:-25°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:AD632 Series; MSL:-; SVHC:No SVHC (20-Jun-2016); No. of Amplifiers:4Amplifiers

Low Cost Analog Multiplier Features: 4-quadrant multiplication Low cost, 8-lead SOIC and PDIP packages Complete—no external components required Laser-trimmed accuracy and stability Total error within 2% of full scale Differential high impedance X and Y inputs High impedance unity-gain summing input Laser-trimmed 10 V scaling referenceSupports defense and aerospace applications (AQEC standard) Download AD633-EP data sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/18603 DSCC Drawing Number

Single Channel, 16-Bit, Current Source & Voltage Output DAC, HART Connectivity Features: 16-bit resolution and monotonicity Current output ranges: 4 mA to 20 mA, 0 mA to 20 mA, or 0 mA to 24 mA ±0.01% FSR typical total unadjusted error (TUE) ±3 ppm FSR/°C output drift Voltage output ranges: 0 V to 5 V, 0 V to 10 V, ±5 V, or ±10 V 10% overrange ±0.01% FSR typical TUE ±2 ppm FSR/°C output drift Flexible serial digital interface On-chip output fault detection On-chip reference: 10 ppm/°C maximum Optional regulated DVCC output Asynchronous clear function Power supply range AVDD: 10.8 V to 40 V AVSS: −26.4 V to −3 V/0 V Current loop compliance voltage: AVDD – 2.5 V Temperature range: −40°C to +105°C TSSOP and LFCSP packages

Compact, 600 mA, 3 MHz, Step-Down DC-to-DC Converter

+3.3 V/+5 V Multiplying 12-Bit DACs

The AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance. Three independent LVPECL and two LVDS clock outputs operate to 1.2 GHz and 800 MHz respectively. Optional CMOS clock outputs available to 250 MHz. Each output has a programmable divider, which may be bypassed or set to divide by any integer up to 32.Each divider allows the user to change the phase of one clock output relative to another clock output. This phase select functions as a coarse timing adjustment. One output also features a programmable delay element with a user-selected, fullscale range to 10 ns. This fine tuning delay block is programmed with a 5-bit word, which gives the user 32 possible delays from which to choose.The AD9512 is ideally suited for data converter clocking applications where maximum converter performance is achieved with sub-picosecond jitter encode signals.The AD9512 is available in a 48-lead LFCSP and is specified from -40?C to +85?C. The part may be run from a single 3.3 V supply. ApplicationsLow jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDS, DDC, DUC, MxFE? ConvertersWireless infrastructure transceiversHigh performance instrumentationBroadband infrastructure

Digital Potentiometer ICs 7-BIT RDAC WITH UP/DWN CONTROL

IC IF DIGITIZING SUBSYSTEM 48LQFP; IC Function:IF Digitizing Subsystem; Supply Voltage Min:2.7V; Supply Voltage Max:3.6V; IC Package Type:LQFP; No. of Pins:48Pins; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:-; Automotive Qualification Standard:-; MSL:MSL 3 - 168 hours; SVHC:No SVHC (20-Jun-2016)

Quad 16-/14-/12-Bit nanoDAC+ with 2 ppm/C Reference, I2C Interface