The AD5689/AD5687 members of the nanoDAC+™ family arelow power, dual, 16-/12-bit, buffered voltage output digital-to-analogconverters (DACs). The devices include a gain select pingiving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). TheAD5689/AD5687 operate from a single 2.7 V to 5.5 V supply, areguaranteed monotonic by design, and exhibit less than 0.1% FSRgain error and 1.5 mV offset error performance. Both devices areavailable in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5689/AD5687 also incorporate a power-on reset circuitand a RSTSEL pin that ensures that the DAC outputs power upto zero scale or midscale and remain there until a valid writetakes place. Each part contains a per channel power-down featurethat reduces the current consumption of the device to 4 µA at3 V while in power-down mode.The AD5689/AD5687 uses a versatile serial peripheral interfacethat operates at clock rates up to 50 MHz. Both devices containa VLOGIC pin that is intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5689 (16-bit): ±2 LSB maximum Excellent DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options. 3 mm × 3 mm, 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5693R / AD5692R / AD5691R / AD5693, members of thenanoDAC+® family, are low power, single-channel, 16-/14-/12-bitbuffered voltage output DACs. The devices, except the AD5693,include an enabled by default internal 2.5 V reference, offering2 ppm/°C drift. The output span can be programmed to be 0 V toVREF or 0 V to 2 × VREF. All devices operate from a single 2.7 V to5.5 V supply and are guaranteed monotonic by design. Thedevices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP ora 10-lead MSOP.The internal power-on reset circuit ensures that the DAC registeris written to zero scale at power-up while the internal outputbuffer is configured in normal mode. The AD5693R / AD5692R /  AD5691R / AD5693 contain a power-down mode that reduces thecurrent consumption of the device to 2 μA (maximum) at 5 V andprovides software selectable output loads.The AD5693R / AD5692R / AD5691R / AD5693 use an I2Cinterface. Some device options also include an asynchronousRESET pin and a VLOGIC pin, allowing 1.8 V compatibility.Product Highlights High relative accuracy (INL): ±2 LSB maximum (AD5693R/AD5693, 16-bit). Low drift, 2.5 V on-chip reference: 2 ppm/°C typical and 5 ppm/°C maximum temperature coefficient. 2 mm × 2 mm, 8-lead LFCSP and 10-lead MSOP. Applications Process controls Data acquisition systems Digital gain and offset adjustment Programmable voltage sources Optical modules

The AD5693R / AD5692R / AD5691R / AD5693, members of thenanoDAC+® family, are low power, single-channel, 16-/14-/12-bitbuffered voltage output DACs. The devices, except the AD5693,include an enabled by default internal 2.5 V reference, offering2 ppm/°C drift. The output span can be programmed to be 0 V toVREF or 0 V to 2 × VREF. All devices operate from a single 2.7 V to5.5 V supply and are guaranteed monotonic by design. Thedevices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP ora 10-lead MSOP.The internal power-on reset circuit ensures that the DAC registeris written to zero scale at power-up while the internal outputbuffer is configured in normal mode. The AD5693R / AD5692R /  AD5691R / AD5693 contain a power-down mode that reduces thecurrent consumption of the device to 2 μA (maximum) at 5 V andprovides software selectable output loads.The AD5693R / AD5692R / AD5691R / AD5693 use an I2Cinterface. Some device options also include an asynchronousRESET pin and a VLOGIC pin, allowing 1.8 V compatibility.Product Highlights High relative accuracy (INL): ±2 LSB maximum (AD5693R/AD5693, 16-bit). Low drift, 2.5 V on-chip reference: 2 ppm/°C typical and 5 ppm/°C maximum temperature coefficient. 2 mm × 2 mm, 8-lead LFCSP and 10-lead MSOP. Applications Process controls Data acquisition systems Digital gain and offset adjustment Programmable voltage sources Optical modules

The AD5694, a member of the nanoDAC+™ family, is a low power, quad, 16-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 0V to VREF (gain = 1) or 0V to 2.VREF (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP package and in a TSSOP package.The AD5696 incorporates a power-on reset circuit and a RSTSEL pin; the RSTSEL pin ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. The part contains a per-channel power-down feature that reduces the current consumption of the device in power-down mode to 4 µA at 3 V.The AD5696 uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz and includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). (12-bit): ±1 LSB maximum Excellent DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options. 3 mm × 3 mm, 16-lead LFCSP 16-lead TSSOPApplications Digital gain and offset adjustment Programmable attenuators Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5694R is a low power, quad, 16-bit buffered voltage output DAC. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5694R also incorporates a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain there until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.The AD5694R uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz, and includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5694R (12-bit): ±1 LSB maximum. Low Drift 2.5 V On-Chip Reference. 2 ppm/°C typical temperature coefficient. 5 ppm/°C maximum temperature coefficient. Two Package Options. 3 mm × 3 mm, 16-lead LFCSP. 16-lead TSSOP.Applications Optical transceivers Base-station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5696, a member of the nanoDAC+™ family, is a low power, quad, 16-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 0V to VREF (gain = 1) or 0V to 2VREF (gain = 2) The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP package and in a TSSOP package.The AD5696 incorporates a power-on reset circuit and a RSTSEL pin; the RSTSEL pin ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. The part contains a per-channel power-down feature that reduces the current consumption of the device in power-down mode to 4 µA at 3 V.The AD5696 uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz and includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Hightlights High Relative Accuracy (INL): ±2 LSB maximum Excellent DC Performance: Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options: 3 mm × 3 mm, 16-lead LFCSP and 16-lead TSSOPApplications Digital gain and offset adjustment Programmable attenuators Process control (PLC I/O cards) Industrial automation Data acquisition systems

The ADA4945-1 is a low noise, low distortion, fully differential amplifier with two selectable power modes. The device operates over a broad power supply range of 3 V to 10 V. The low dc offset, dc offset drift, and excellent dynamic performance of the ADA4945-1 makes it well suited for a variety of data acquisition and signal processing applications. The device is an ideal choice for driving high resolution, high performance successive approximation register (SAR) and Σ-Δ analog-to-digital converters (ADCs) on 4 mA of quiescent current (full power mode). The device can also be selected to operate on 1.4 mA of quiescent current (low power mode) to scale the power consumption to the desired performance necessary for an ADC drive application. The adjustable common-mode voltage allows the ADA4945-1 to match the input common-mode voltage of multiple ADCs. The internal common-mode feedback loop provides exceptional output balance, as well as suppression of even order harmonic distortion products.With the ADA4945-1, differential gain configurations are achieved with a simple external feedback network of four resistors determining the closed-loop gain of the amplifier. The ADA4945-1 is fabricated using Analog Devices, Inc., proprietary, silicon germanium (SiGe), complementary bipolar process, enabling the device to achieve low levels of distortion with an input voltage noise of only 1.8 nV/√Hz (full power mode).The ADA4945-1 is available in a RoHS-complaint, 3 mm × 3 mm, 16-lead LFCSP. The ADA4945-1 is specified to operate from −40°C to +125°C.Applications Low power Σ-Δ, PulSAR®, and SAR ADC drivers Single-ended to differential converters Differential buffers Medical imaging Process control Portable electronics

The ADAU1850 is a codec with three inputs and one output that incorporates one digital signal processor. The path from the analog input to the DSP core to the analog output is optimized for low latency and is ideal for noise canceling earphones. With the addition of a few passive components, the ADAU1850 provides a complete headset solution.The ADAU1850 is provided in a small, 28-ball, 2.957 mm × 1.757 mm wafer level chip scale package (WLCSP).APPLICATIONS Noise canceling handsets, headsets, and headphones Bluetooth active noise canceling (ANC) handsets, headsets, and headphones Personal navigation devices Digital still and video cameras Musical instrument effect processors Multimedia speaker systems Smartphones

The ADL8105 is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic high electron mobility transistor (pHEMT), low noise wideband amplifier that operates from 5 GHz to 20 GHz.The ADL8105 provides a typical gain of 27 dB at 12 GHz to 17 GHz, a 1.8 dB typical noise figure from 12 GHz to 17 GHz, a typical output third-order intercept (OIP3) of 30.5 dBm at 12 GHz to 17 GHz, and a saturated output power (PSAT) of up to 20.5 dBm, requiring only 90 mA from a 5 V supply voltage. The power dissipation can be lowered at the expense of OIP3 and output power (POUT). The ADL8105 also features inputs and outputs that are internally matched to 50 Ω. The RFIN and RFOUT pins are internally ac-coupled, and the bias inductor is also integrated, making it ideal for surface-mounted technology (SMT)-based, high capacity microwave radio applications.The ADL8105 is housed in an RoHS-compliant, 2 mm × 2 mm, 8-lead LFCSP package.APPLICATIONSTelecommunicationsSatellite communicationsMilitary radarWeather radarElectronic warfareInstrumentation

The ADN4622/ADN4624 are quad-channel, signal isolated, low-voltage differential signaling (LVDS) buffers that operate at up to 2.5 Gbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler® technology, enhanced for high-speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high-speed signals such as current-mode logic (CML).The ADN4622/ADN4624 include a refresh mechanism to monitor the input and output states and ensure they remain the same in the absence of data transitions. For lower power consumption and high-speed operation with low jitter, the LVDS and isolator circuits rely on 1.8 V supplies. The ADN4622/ADN4624 are fully specified over a wide industrial temperature range and are available in a 28-lead, wide-body, finer pitch SOIC_W_FP package with 8.3 mm creepage and clearance (for 5.7 kV rms or 8 kVPEAK surge and impulse voltages and reinforced insulation at AC mains voltages) or 6 mm × 6 mm LFCSP package with 1.27 mm creepage and clearance (for basic/functional isolation).APPLICATIONS Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links Multi-gigabit SERDES Board-to-board optical replacement (for example, short reach fiber)