Low Noise Single-Ended to Differential Converter/ADC Driver Features: Rail-to-Rail Input and Outputs Fast Settling Time: 240ns, 0.01%, 8VP-P Output Step 1.9nV/√Hz Input-Referred Op Amp Noise High Impedance Input –3dB Bandwidth: 33MHz 2.7V to 12V Supply Operation No External Gain Resistors Required 4.8mA Supply Current Low Power Shutdown Low Distortion (HD2/HD3): –102dBc/–97dBc at 100kHz, VOUTDIFF = 4VP-P Low Offset Voltage: ±400μV Max High DC Linearity: <±1LSB, 16-Bit, 8VP-P Low Input Current Noise: 1.1pA/√Hz 3mm × 3mm 8-Pin DFN and 8-Lead MSOP Packages

The AD9154 is a quad, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.4 GSPS, permitting multicarrier generation up to the Nyquist frequency in baseband mode. The AD9154 includes features optimized for direct conversion transmit applications including complex digital modulation, input signal power detection, and gain, phase, and offset compensation. The DAC outputs are?optimized to interface seamlessly with the ADRF6720-27 radio?frequency quadrature modulator (AQM) from Analog Devices,?Inc. In mix mode, the AD9154 DAC can reconstruct carriers in the second and third Nyquist Zones. A serial port interface (SPI)?provides the programming/readback of internal parameters. The full-scale output current can be programmed over a range of 4 mA to 20 mA. The AD9154 is available in two different?88-lead LFCSP packages.PRODUCT HIGHLIGHTS? Ultrawide signal bandwidth enables emerging wideband and multiband wireless applications. Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies. JESD204B Subclass 1 support simplifies multichip synchronization. Small package size with a 12 mm ? 12 mm footprint.APPLICATIONS Wireless communications Multicarrier LTE and GSM base stations Wideband repeaters Software defined radios Wideband communications Point to point microwave radio Transmit diversity, multiple input/multiple output (MIMO) Instrumentation Automated test equipment

RF AMPLIFIERS ROHS COMPLIANT: YES

ISOLATION AMPLIFIER;

Digital to Analog Converters - DAC 12-BIT SERIAL INPUT DAC

Precision 1.7 g, 5 g, 18 g Dual-Axis iMEMS Accelerometer Features: High performance dual-axis accelerometer on a single IC chip 5 mm × 5 mm × 2 mm LCC package 1 mg resolution at 60 Hz Low power: 700 µA at VS = 5 V (typical) High zero g bias stability High sensitivity accuracy –40°C to +125°C temperature range X and Y axes aligned to within 0.1° (typical) BW adjustment with a single capacitor Single-supply operation 3500 g shock survival RoHS-compliant Compatible with Sn/Pb- and Pb-free solder processes

The AD5761R/AD5721R are single channel, 16-/12-bit serialinput, voltage output, digital-to-analog converters (DACs).They operate from single supply voltages from +4.75 V to+30 V or dual supply voltages from −16.5 V to 0 V VSS and+4.75 V to +16.5 V VDD. The integrated output amplifier,reference buffer, and reference provide a very easy to use,universal solution.The devices offer guaranteed monotonicity, integral nonlinearity(INL) of ±2 LSB maximum, 35 nV/√Hz noise, and 7.5 μs settlingtime on selected ranges.The AD5761R/AD5721R use a serial interface that operates atclock rates of up to 50 MHz and are compatible with DSP andmicrocontroller interface standards. Double buffering allows theasynchronous updating of the DAC output. The input codingis user-selectable twos complement or straight binary. Theasynchronous reset function resets all registers to their defaultstate. The output range is user selectable, via the RA[2:0] bitsin the control register.The devices available in a 3 mm × 3 mm LFCSP package and a16-lead TSSOP package offer guaranteed specifications over the−40°C to +125°C industrial temperature range.Applications Industrial automation Instrumentation, data acquisition Open-/closed-loop servo control, process control Programmable logic controllers

DATA CONVERSION DEVELOPMENT KITS - ADC;

The AD9172 is a high performance, dual, 16-bit digital-to-analog converter (DAC) that supports DAC sample rates to 12.6 GSPS. The device features an 8-lane, 15 Gbps JESD204B data input port, a high performance, on-chip DAC clock multiplier, and digital signal processing capabilities targeted at single-band and multiband direct to radio frequency (RF) wireless applications.The AD9172 features three complex data input channels per RF DAC that are bypassable. Each data input channel includes a configurable gain stage, an interpolation filter, and a channel numerically controlled oscillator (NCO) for flexible, multiband frequency planning. The device supports up to a 1.5 GSPS complex data rate per input channel and is capable of aggregating multiple complex input data streams up to a maximum complex data rate of 1.5 GSPS. Additionally, the AD9172 supports ultrawide bandwidth modes bypassing the channelizers to provide maximum data rates of up to 3.08 GSPS (with 16-bit resolution) and 4.1 GSPS (with 12-bit resolution).The AD9172 is available in a 144-ball BGA_ED package.PRODUCT HIGHLIGHTS Supports single-band and multiband wireless applications with three bypassable complex data input channels per RF DAC at a maximum complex input data rate of 1.5 GSPS. One independent NCO per input channel. Ultrawide bandwidth channel bypass modes supporting up to 3 GSPS data rates with 16-bit resolution and 4 GSPS with 12-bit resolution. Low power dual converter decreases the amount of power consumption needed in high bandwidth and multichannel applications.APPLICATIONS Wireless communications infrastructure Multiband base station radios Microwave/E-band backhaul systems Instrumentation, automatic test equipment (ATE) Radars and jammers

Up to 1GHz SHARC+ DSP with 640KB L1, 1024KB Shared L2 SRAM, 120-lead LQFP_EP Features:SHARC+ Core infrastructure 800MHz (max) or 1GHz (max) Core clock frequency 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedMemory 1024KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases Advanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 4x Precision Clock Generators 24 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin 4x I2C, 2x UARTs 6x General Purpose Timer, 1x General Purpose Counter 2x Watchdog Timers 2-ch 12bit Housekeeping ADCs 22 GPIO pins, 24 DAI pins Thermal SensorPackage 14mm x 14mm 120-lead LQFP_EAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications